1/* $FreeBSD$ */ 2 3/*- 4 * Copyright (c) 2005, 2006 Damien Bergamini <damien.bergamini@free.fr> 5 * Copyright (c) 2006 Niall O'Higgins <niallo@openbsd.org> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20#define RT2573_NOISE_FLOOR -95 21 22#define RT2573_TX_DESC_SIZE (sizeof (struct rum_tx_desc)) 23#define RT2573_RX_DESC_SIZE (sizeof (struct rum_rx_desc)) 24 25#define RT2573_CONFIG_NO 1 26#define RT2573_IFACE_INDEX 0 27 28#define RT2573_MCU_CNTL 0x01 29#define RT2573_WRITE_MAC 0x02 30#define RT2573_READ_MAC 0x03 31#define RT2573_WRITE_MULTI_MAC 0x06 32#define RT2573_READ_MULTI_MAC 0x07 33#define RT2573_READ_EEPROM 0x09 34#define RT2573_WRITE_LED 0x0a 35 36/* 37 * WME registers. 38 */ 39#define RT2573_AIFSN_CSR 0x0400 40#define RT2573_CWMIN_CSR 0x0404 41#define RT2573_CWMAX_CSR 0x0408 42#define RT2573_TXOP01_CSR 0x040C 43#define RT2573_TXOP23_CSR 0x0410 44#define RT2573_MCU_CODE_BASE 0x0800 45 46/* 47 * H/w encryption/decryption support 48 */ 49#define KEY_SIZE (IEEE80211_KEYBUF_SIZE + IEEE80211_MICBUF_SIZE) 50#define RT2573_ADDR_MAX 64 51#define RT2573_SKEY_MAX 4 52 53#define RT2573_SKEY(vap, kidx) (0x1000 + ((vap) * RT2573_SKEY_MAX + \ 54 (kidx)) * KEY_SIZE) 55#define RT2573_PKEY(id) (0x1200 + (id) * KEY_SIZE) 56 57#define RT2573_ADDR_ENTRY(id) (0x1a00 + (id) * 8) 58 59/* 60 * Shared memory area 61 */ 62#define RT2573_HW_BCN_BASE(id) (0x2400 + (id) * 0x100) 63 64/* 65 * Control and status registers. 66 */ 67#define RT2573_MAC_CSR0 0x3000 68#define RT2573_MAC_CSR1 0x3004 69#define RT2573_MAC_CSR2 0x3008 70#define RT2573_MAC_CSR3 0x300c 71#define RT2573_MAC_CSR4 0x3010 72#define RT2573_MAC_CSR5 0x3014 73#define RT2573_MAC_CSR6 0x3018 74#define RT2573_MAC_CSR7 0x301c 75#define RT2573_MAC_CSR8 0x3020 76#define RT2573_MAC_CSR9 0x3024 77#define RT2573_MAC_CSR10 0x3028 78#define RT2573_MAC_CSR11 0x302c 79#define RT2573_MAC_CSR12 0x3030 80#define RT2573_MAC_CSR13 0x3034 81#define RT2573_MAC_CSR14 0x3038 82#define RT2573_MAC_CSR15 0x303c 83#define RT2573_TXRX_CSR0 0x3040 84#define RT2573_TXRX_CSR1 0x3044 85#define RT2573_TXRX_CSR2 0x3048 86#define RT2573_TXRX_CSR3 0x304c 87#define RT2573_TXRX_CSR4 0x3050 88#define RT2573_TXRX_CSR5 0x3054 89#define RT2573_TXRX_CSR6 0x3058 90#define RT2573_TXRX_CSR7 0x305c 91#define RT2573_TXRX_CSR8 0x3060 92#define RT2573_TXRX_CSR9 0x3064 93#define RT2573_TXRX_CSR10 0x3068 94#define RT2573_TXRX_CSR11 0x306c 95#define RT2573_TXRX_CSR12 0x3070 96#define RT2573_TXRX_CSR13 0x3074 97#define RT2573_TXRX_CSR14 0x3078 98#define RT2573_TXRX_CSR15 0x307c 99#define RT2573_PHY_CSR0 0x3080 100#define RT2573_PHY_CSR1 0x3084 101#define RT2573_PHY_CSR2 0x3088 102#define RT2573_PHY_CSR3 0x308c 103#define RT2573_PHY_CSR4 0x3090 104#define RT2573_PHY_CSR5 0x3094 105#define RT2573_PHY_CSR6 0x3098 106#define RT2573_PHY_CSR7 0x309c 107#define RT2573_SEC_CSR0 0x30a0 108#define RT2573_SEC_CSR1 0x30a4 109#define RT2573_SEC_CSR2 0x30a8 110#define RT2573_SEC_CSR3 0x30ac 111#define RT2573_SEC_CSR4 0x30b0 112#define RT2573_SEC_CSR5 0x30b4 113#define RT2573_STA_CSR0 0x30c0 114#define RT2573_STA_CSR1 0x30c4 115#define RT2573_STA_CSR2 0x30c8 116#define RT2573_STA_CSR3 0x30cc 117#define RT2573_STA_CSR4 0x30d0 118#define RT2573_STA_CSR5 0x30d4 119 120/* possible values for register RT2573_ADDR_MODE */ 121#define RT2573_MODE_MASK 0x7 122#define RT2573_MODE_NOSEC 0 123#define RT2573_MODE_WEP40 1 124#define RT2573_MODE_WEP104 2 125#define RT2573_MODE_TKIP 3 126#define RT2573_MODE_AES_CCMP 4 127#define RT2573_MODE_CKIP40 5 128#define RT2573_MODE_CKIP104 6 129 130/* possible flags for register RT2573_MAC_CSR1 */ 131#define RT2573_RESET_ASIC (1 << 0) 132#define RT2573_RESET_BBP (1 << 1) 133#define RT2573_HOST_READY (1 << 2) 134 135/* possible flags for register MAC_CSR5 */ 136#define RT2573_NUM_BSSID_MSK(n) (((n * 3) & 3) << 16) 137 138/* possible flags for register MAC_CSR11 */ 139#define RT2573_AUTO_WAKEUP (1 << 15) 140#define RT2573_TBCN_EXP(n) ((n) << 8) 141#define RT2573_TBCN_EXP_MAX 0x7f 142#define RT2573_TBCN_DELAY(t) (t) 143#define RT2573_TBCN_DELAY_MAX 0xff 144 145/* possible flags for register TXRX_CSR0 */ 146/* Tx filter flags are in the low 16 bits */ 147#define RT2573_AUTO_TX_SEQ (1 << 15) 148/* Rx filter flags are in the high 16 bits */ 149#define RT2573_DISABLE_RX (1 << 16) 150#define RT2573_DROP_CRC_ERROR (1 << 17) 151#define RT2573_DROP_PHY_ERROR (1 << 18) 152#define RT2573_DROP_CTL (1 << 19) 153#define RT2573_DROP_NOT_TO_ME (1 << 20) 154#define RT2573_DROP_TODS (1 << 21) 155#define RT2573_DROP_VER_ERROR (1 << 22) 156#define RT2573_DROP_MULTICAST (1 << 23) 157#define RT2573_DROP_BROADCAST (1 << 24) 158#define RT2573_DROP_ACKCTS (1 << 25) 159 160/* possible flags for register TXRX_CSR4 */ 161#define RT2573_ACKCTS_PWRMGT (1 << 16) 162#define RT2573_SHORT_PREAMBLE (1 << 18) 163#define RT2573_MRR_ENABLED (1 << 19) 164#define RT2573_MRR_CCK_FALLBACK (1 << 22) 165#define RT2573_LONG_RETRY(max) ((max) << 24) 166#define RT2573_LONG_RETRY_MASK (0xf << 24) 167#define RT2573_SHORT_RETRY(max) ((max) << 28) 168#define RT2573_SHORT_RETRY_MASK (0xf << 28) 169 170/* possible flags for register TXRX_CSR9 */ 171#define RT2573_TSF_TIMER_EN (1 << 16) 172#define RT2573_TSF_SYNC_MODE(x) (((x) & 0x3) << 17) 173#define RT2573_TSF_SYNC_MODE_DIS 0 174#define RT2573_TSF_SYNC_MODE_STA 1 175#define RT2573_TSF_SYNC_MODE_IBSS 2 176#define RT2573_TSF_SYNC_MODE_HOSTAP 3 177#define RT2573_TBTT_TIMER_EN (1 << 19) 178#define RT2573_BCN_TX_EN (1 << 20) 179 180/* possible flags for register PHY_CSR0 */ 181#define RT2573_PA_PE_2GHZ (1 << 16) 182#define RT2573_PA_PE_5GHZ (1 << 17) 183 184/* possible flags for register PHY_CSR3 */ 185#define RT2573_BBP_READ (1 << 15) 186#define RT2573_BBP_BUSY (1 << 16) 187/* possible flags for register PHY_CSR4 */ 188#define RT2573_RF_20BIT (20 << 24) 189#define RT2573_RF_BUSY (1U << 31) 190 191/* LED values */ 192#define RT2573_LED_RADIO (1 << 8) 193#define RT2573_LED_G (1 << 9) 194#define RT2573_LED_A (1 << 10) 195#define RT2573_LED_ON 0x1e1e 196#define RT2573_LED_OFF 0x0 197 198/* USB vendor requests */ 199#define RT2573_MCU_SLEEP 7 200#define RT2573_MCU_RUN 8 201#define RT2573_MCU_WAKEUP 9 202 203#define RT2573_SMART_MODE (1 << 0) 204 205#define RT2573_BBPR94_DEFAULT 6 206 207#define RT2573_BBP_WRITE (1 << 15) 208 209/* dual-band RF */ 210#define RT2573_RF_5226 1 211#define RT2573_RF_5225 3 212/* single-band RF */ 213#define RT2573_RF_2528 2 214#define RT2573_RF_2527 4 215 216#define RT2573_BBP_VERSION 0 217 218struct rum_tx_desc { 219 uint32_t flags; 220#define RT2573_TX_BURST (1 << 0) 221#define RT2573_TX_VALID (1 << 1) 222#define RT2573_TX_MORE_FRAG (1 << 2) 223#define RT2573_TX_NEED_ACK (1 << 3) 224#define RT2573_TX_TIMESTAMP (1 << 4) 225#define RT2573_TX_OFDM (1 << 5) 226#define RT2573_TX_IFS_SIFS (1 << 6) 227#define RT2573_TX_LONG_RETRY (1 << 7) 228#define RT2573_TX_TKIPMIC (1 << 8) 229#define RT2573_TX_KEY_PAIR (1 << 9) 230#define RT2573_TX_KEY_ID(id) (((id) & 0x3f) << 10) 231#define RT2573_TX_CIP_MODE(m) ((m) << 29) 232 233 uint16_t wme; 234#define RT2573_QID(v) (v) 235#define RT2573_AIFSN(v) ((v) << 4) 236#define RT2573_LOGCWMIN(v) ((v) << 8) 237#define RT2573_LOGCWMAX(v) ((v) << 12) 238 239 uint8_t hdrlen; 240 uint8_t xflags; 241#define RT2573_TX_HWSEQ (1 << 4) 242 243 uint8_t plcp_signal; 244 uint8_t plcp_service; 245#define RT2573_PLCP_LENGEXT 0x80 246 247 uint8_t plcp_length_lo; 248 uint8_t plcp_length_hi; 249 250 uint32_t iv; 251 uint32_t eiv; 252 253 uint8_t offset; 254 uint8_t qid; 255 uint8_t txpower; 256#define RT2573_DEFAULT_TXPOWER 0 257 258 uint8_t reserved; 259} __packed; 260 261struct rum_rx_desc { 262 uint32_t flags; 263#define RT2573_RX_BUSY (1 << 0) 264#define RT2573_RX_DROP (1 << 1) 265#define RT2573_RX_UC2ME (1 << 2) 266#define RT2573_RX_MC (1 << 3) 267#define RT2573_RX_BC (1 << 4) 268#define RT2573_RX_MYBSS (1 << 5) 269#define RT2573_RX_CRC_ERROR (1 << 6) 270#define RT2573_RX_OFDM (1 << 7) 271 272#define RT2573_RX_DEC_MASK (3 << 8) 273#define RT2573_RX_DEC_OK (0 << 8) 274 275#define RT2573_RX_IV_ERROR (1 << 8) 276#define RT2573_RX_MIC_ERROR (2 << 8) 277#define RT2573_RX_KEY_ERROR (3 << 8) 278 279#define RT2573_RX_KEY_PAIR (1 << 28) 280 281#define RT2573_RX_CIP_MASK (7 << 29) 282#define RT2573_RX_CIP_MODE(m) ((m) << 29) 283 284 uint8_t rate; 285 uint8_t rssi; 286 uint8_t reserved1; 287 uint8_t offset; 288 uint32_t iv; 289 uint32_t eiv; 290 uint32_t reserved2[2]; 291} __packed; 292 293#define RT2573_RF1 0 294#define RT2573_RF2 2 295#define RT2573_RF3 1 296#define RT2573_RF4 3 297 298#define RT2573_EEPROM_MACBBP 0x0000 299#define RT2573_EEPROM_ADDRESS 0x0004 300#define RT2573_EEPROM_ANTENNA 0x0020 301#define RT2573_EEPROM_CONFIG2 0x0022 302#define RT2573_EEPROM_BBP_BASE 0x0026 303#define RT2573_EEPROM_TXPOWER 0x0046 304#define RT2573_EEPROM_FREQ_OFFSET 0x005e 305#define RT2573_EEPROM_RSSI_2GHZ_OFFSET 0x009a 306#define RT2573_EEPROM_RSSI_5GHZ_OFFSET 0x009c 307