1/*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer,
12 *    without modification.
13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
14 *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
15 *    redistribution must be conditioned upon including a substantially
16 *    similar Disclaimer requirement for further binary redistribution.
17 *
18 * NO WARRANTY
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
21 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
22 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
23 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
24 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
27 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
29 * THE POSSIBILITY OF SUCH DAMAGES.
30 */
31
32#include <sys/cdefs.h>
33__FBSDID("$FreeBSD: releng/12.0/sys/dev/ath/if_ath_pci.c 336069 2018-07-07 15:55:58Z imp $");
34
35/*
36 * PCI/Cardbus front-end for the Atheros Wireless LAN controller driver.
37 */
38#include "opt_ath.h"
39
40#include <sys/param.h>
41#include <sys/systm.h>
42#include <sys/malloc.h>
43#include <sys/module.h>
44#include <sys/kernel.h>
45#include <sys/lock.h>
46#include <sys/mutex.h>
47#include <sys/errno.h>
48
49#include <machine/bus.h>
50#include <machine/resource.h>
51#include <sys/bus.h>
52#include <sys/rman.h>
53
54#include <sys/socket.h>
55
56#include <net/if.h>
57#include <net/if_media.h>
58#include <net/if_arp.h>
59#include <net/ethernet.h>
60
61#include <net80211/ieee80211_var.h>
62
63#include <dev/ath/if_athvar.h>
64
65#include <dev/pci/pcivar.h>
66#include <dev/pci/pcireg.h>
67
68/* For EEPROM firmware */
69#ifdef	ATH_EEPROM_FIRMWARE
70#include <sys/linker.h>
71#include <sys/firmware.h>
72#endif	/* ATH_EEPROM_FIRMWARE */
73
74/*
75 * PCI glue.
76 */
77
78struct ath_pci_softc {
79	struct ath_softc	sc_sc;
80	struct resource		*sc_sr;		/* memory resource */
81	struct resource		*sc_irq;	/* irq resource */
82	void			*sc_ih;		/* interrupt handler */
83};
84
85/*
86 * XXX eventually this should be some system level definition
87 * so modules will have probe/attach information like USB.
88 * But for now..
89 */
90struct pci_device_id {
91	int vendor_id;
92	int device_id;
93
94	int sub_vendor_id;
95	int sub_device_id;
96
97	int driver_data;
98
99	int match_populated:1;
100	int match_vendor_id:1;
101	int match_device_id:1;
102	int match_sub_vendor_id:1;
103	int match_sub_device_id:1;
104};
105
106#define	PCI_VDEVICE(v, s) \
107	.vendor_id = (v), \
108	.device_id = (s), \
109	.match_populated = 1, \
110	.match_vendor_id = 1, \
111	.match_device_id = 1
112
113#define	PCI_DEVICE_SUB(v, d, dv, ds) \
114	.match_populated = 1, \
115	.vendor_id = (v), .match_vendor_id = 1, \
116	.device_id = (d), .match_device_id = 1, \
117	.sub_vendor_id = (dv), .match_sub_vendor_id = 1, \
118	.sub_device_id = (ds), .match_sub_device_id = 1
119
120#define	PCI_VENDOR_ID_ATHEROS		0x168c
121#define	PCI_VENDOR_ID_SAMSUNG		0x144d
122#define	PCI_VENDOR_ID_AZWAVE		0x1a3b
123#define	PCI_VENDOR_ID_FOXCONN		0x105b
124#define	PCI_VENDOR_ID_ATTANSIC		0x1969
125#define	PCI_VENDOR_ID_ASUSTEK		0x1043
126#define	PCI_VENDOR_ID_DELL		0x1028
127#define	PCI_VENDOR_ID_QMI		0x1a32
128#define	PCI_VENDOR_ID_LENOVO		0x17aa
129#define	PCI_VENDOR_ID_HP		0x103c
130
131#include "if_ath_pci_devlist.h"
132
133/*
134 * Attempt to find a match for the given device in
135 * the given device table.
136 *
137 * Returns the device structure or NULL if no matching
138 * PCI device is found.
139 */
140static const struct pci_device_id *
141ath_pci_probe_device(device_t dev, const struct pci_device_id *dev_table, int nentries)
142{
143	int i;
144	int vendor_id, device_id;
145	int sub_vendor_id, sub_device_id;
146
147	vendor_id = pci_get_vendor(dev);
148	device_id = pci_get_device(dev);
149	sub_vendor_id = pci_get_subvendor(dev);
150	sub_device_id = pci_get_subdevice(dev);
151
152	for (i = 0; i < nentries; i++) {
153		/* Don't match on non-populated (eg empty) entries */
154		if (! dev_table[i].match_populated)
155			continue;
156
157		if (dev_table[i].match_vendor_id &&
158		    (dev_table[i].vendor_id != vendor_id))
159			continue;
160		if (dev_table[i].match_device_id &&
161		    (dev_table[i].device_id != device_id))
162			continue;
163		if (dev_table[i].match_sub_vendor_id &&
164		    (dev_table[i].sub_vendor_id != sub_vendor_id))
165			continue;
166		if (dev_table[i].match_sub_device_id &&
167		    (dev_table[i].sub_device_id != sub_device_id))
168			continue;
169
170		/* Match */
171		return (&dev_table[i]);
172	}
173
174	return (NULL);
175}
176
177#define	BS_BAR	0x10
178#define	PCIR_RETRY_TIMEOUT	0x41
179#define	PCIR_CFG_PMCSR		0x48
180
181#define	DEFAULT_CACHESIZE	32
182
183static void
184ath_pci_setup(device_t dev)
185{
186	uint8_t cz;
187
188	/* XXX TODO: need to override the _system_ saved copies of this */
189
190	/*
191	 * If the cache line size is 0, force it to a reasonable
192	 * value.
193	 */
194	cz = pci_read_config(dev, PCIR_CACHELNSZ, 1);
195	if (cz == 0) {
196		pci_write_config(dev, PCIR_CACHELNSZ,
197		    DEFAULT_CACHESIZE / 4, 1);
198	}
199
200	/* Override the system latency timer */
201	pci_write_config(dev, PCIR_LATTIMER, 0xa8, 1);
202
203	/* If a PCI NIC, force wakeup */
204#ifdef	ATH_PCI_WAKEUP_WAR
205	/* XXX TODO: don't do this for non-PCI (ie, PCIe, Cardbus!) */
206	if (1) {
207		uint16_t pmcsr;
208		pmcsr = pci_read_config(dev, PCIR_CFG_PMCSR, 2);
209		pmcsr |= 3;
210		pci_write_config(dev, PCIR_CFG_PMCSR, pmcsr, 2);
211		pmcsr &= ~3;
212		pci_write_config(dev, PCIR_CFG_PMCSR, pmcsr, 2);
213	}
214#endif
215
216	/*
217	 * Disable retry timeout to keep PCI Tx retries from
218	 * interfering with C3 CPU state.
219	 */
220	pci_write_config(dev, PCIR_RETRY_TIMEOUT, 0, 1);
221}
222
223static int
224ath_pci_probe(device_t dev)
225{
226	const char* devname;
227
228	devname = ath_hal_probe(pci_get_vendor(dev), pci_get_device(dev));
229	if (devname != NULL) {
230		device_set_desc(dev, devname);
231		return BUS_PROBE_DEFAULT;
232	}
233	return ENXIO;
234}
235
236static int
237ath_pci_attach(device_t dev)
238{
239	struct ath_pci_softc *psc = device_get_softc(dev);
240	struct ath_softc *sc = &psc->sc_sc;
241	int error = ENXIO;
242	int rid;
243#ifdef	ATH_EEPROM_FIRMWARE
244	const struct firmware *fw = NULL;
245	const char *buf;
246#endif
247	const struct pci_device_id *pd;
248
249	sc->sc_dev = dev;
250
251	/* Do this lookup anyway; figure out what to do with it later */
252	pd = ath_pci_probe_device(dev, ath_pci_id_table, nitems(ath_pci_id_table));
253	if (pd)
254		sc->sc_pci_devinfo = pd->driver_data;
255
256	/*
257	 * Enable bus mastering.
258	 */
259	pci_enable_busmaster(dev);
260
261	/*
262	 * Setup other PCI bus configuration parameters.
263	 */
264	ath_pci_setup(dev);
265
266	/*
267	 * Setup memory-mapping of PCI registers.
268	 */
269	rid = BS_BAR;
270	psc->sc_sr = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
271					    RF_ACTIVE);
272	if (psc->sc_sr == NULL) {
273		device_printf(dev, "cannot map register space\n");
274		goto bad;
275	}
276	sc->sc_st = (HAL_BUS_TAG) rman_get_bustag(psc->sc_sr);
277	sc->sc_sh = (HAL_BUS_HANDLE) rman_get_bushandle(psc->sc_sr);
278	/*
279	 * Mark device invalid so any interrupts (shared or otherwise)
280	 * that arrive before the HAL is setup are discarded.
281	 */
282	sc->sc_invalid = 1;
283
284	ATH_LOCK_INIT(sc);
285	ATH_PCU_LOCK_INIT(sc);
286	ATH_RX_LOCK_INIT(sc);
287	ATH_TX_LOCK_INIT(sc);
288	ATH_TXSTATUS_LOCK_INIT(sc);
289
290	/*
291	 * Arrange interrupt line.
292	 */
293	rid = 0;
294	psc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
295					     RF_SHAREABLE|RF_ACTIVE);
296	if (psc->sc_irq == NULL) {
297		device_printf(dev, "could not map interrupt\n");
298		goto bad1;
299	}
300	if (bus_setup_intr(dev, psc->sc_irq,
301			   INTR_TYPE_NET | INTR_MPSAFE,
302			   NULL, ath_intr, sc, &psc->sc_ih)) {
303		device_printf(dev, "could not establish interrupt\n");
304		goto bad2;
305	}
306
307	/*
308	 * Setup DMA descriptor area.
309	 */
310	if (bus_dma_tag_create(bus_get_dma_tag(dev),	/* parent */
311			       1, 0,			/* alignment, bounds */
312			       BUS_SPACE_MAXADDR_32BIT,	/* lowaddr */
313			       BUS_SPACE_MAXADDR,	/* highaddr */
314			       NULL, NULL,		/* filter, filterarg */
315			       0x3ffff,			/* maxsize XXX */
316			       ATH_MAX_SCATTER,		/* nsegments */
317			       0x3ffff,			/* maxsegsize XXX */
318			       BUS_DMA_ALLOCNOW,	/* flags */
319			       NULL,			/* lockfunc */
320			       NULL,			/* lockarg */
321			       &sc->sc_dmat)) {
322		device_printf(dev, "cannot allocate DMA tag\n");
323		goto bad3;
324	}
325
326#ifdef	ATH_EEPROM_FIRMWARE
327	/*
328	 * If there's an EEPROM firmware image, load that in.
329	 */
330	if (resource_string_value(device_get_name(dev), device_get_unit(dev),
331	    "eeprom_firmware", &buf) == 0) {
332		if (bootverbose)
333			device_printf(dev, "%s: looking up firmware @ '%s'\n",
334			    __func__, buf);
335
336		fw = firmware_get(buf);
337		if (fw == NULL) {
338			device_printf(dev, "%s: couldn't find firmware\n",
339			    __func__);
340			goto bad4;
341		}
342
343		device_printf(dev, "%s: EEPROM firmware @ %p\n",
344		    __func__, fw->data);
345		sc->sc_eepromdata =
346		    malloc(fw->datasize, M_TEMP, M_WAITOK | M_ZERO);
347		if (! sc->sc_eepromdata) {
348			device_printf(dev, "%s: can't malloc eepromdata\n",
349			    __func__);
350			goto bad4;
351		}
352		memcpy(sc->sc_eepromdata, fw->data, fw->datasize);
353		firmware_put(fw, 0);
354	}
355#endif /* ATH_EEPROM_FIRMWARE */
356
357	error = ath_attach(pci_get_device(dev), sc);
358	if (error == 0)					/* success */
359		return 0;
360
361#ifdef	ATH_EEPROM_FIRMWARE
362bad4:
363#endif
364	bus_dma_tag_destroy(sc->sc_dmat);
365bad3:
366	bus_teardown_intr(dev, psc->sc_irq, psc->sc_ih);
367bad2:
368	bus_release_resource(dev, SYS_RES_IRQ, 0, psc->sc_irq);
369bad1:
370	bus_release_resource(dev, SYS_RES_MEMORY, BS_BAR, psc->sc_sr);
371
372	ATH_TXSTATUS_LOCK_DESTROY(sc);
373	ATH_PCU_LOCK_DESTROY(sc);
374	ATH_RX_LOCK_DESTROY(sc);
375	ATH_TX_LOCK_DESTROY(sc);
376	ATH_LOCK_DESTROY(sc);
377
378bad:
379	return (error);
380}
381
382static int
383ath_pci_detach(device_t dev)
384{
385	struct ath_pci_softc *psc = device_get_softc(dev);
386	struct ath_softc *sc = &psc->sc_sc;
387
388	/* check if device was removed */
389	sc->sc_invalid = !bus_child_present(dev);
390
391	/*
392	 * Do a config read to clear pre-existing pci error status.
393	 */
394	(void) pci_read_config(dev, PCIR_COMMAND, 4);
395
396	ath_detach(sc);
397
398	bus_generic_detach(dev);
399	bus_teardown_intr(dev, psc->sc_irq, psc->sc_ih);
400	bus_release_resource(dev, SYS_RES_IRQ, 0, psc->sc_irq);
401
402	bus_dma_tag_destroy(sc->sc_dmat);
403	bus_release_resource(dev, SYS_RES_MEMORY, BS_BAR, psc->sc_sr);
404
405	if (sc->sc_eepromdata)
406		free(sc->sc_eepromdata, M_TEMP);
407
408	ATH_TXSTATUS_LOCK_DESTROY(sc);
409	ATH_PCU_LOCK_DESTROY(sc);
410	ATH_RX_LOCK_DESTROY(sc);
411	ATH_TX_LOCK_DESTROY(sc);
412	ATH_LOCK_DESTROY(sc);
413
414	return (0);
415}
416
417static int
418ath_pci_shutdown(device_t dev)
419{
420	struct ath_pci_softc *psc = device_get_softc(dev);
421
422	ath_shutdown(&psc->sc_sc);
423	return (0);
424}
425
426static int
427ath_pci_suspend(device_t dev)
428{
429	struct ath_pci_softc *psc = device_get_softc(dev);
430
431	ath_suspend(&psc->sc_sc);
432
433	return (0);
434}
435
436static int
437ath_pci_resume(device_t dev)
438{
439	struct ath_pci_softc *psc = device_get_softc(dev);
440
441	/*
442	 * Suspend/resume resets the PCI configuration space.
443	 */
444	ath_pci_setup(dev);
445
446	ath_resume(&psc->sc_sc);
447
448	return (0);
449}
450
451static device_method_t ath_pci_methods[] = {
452	/* Device interface */
453	DEVMETHOD(device_probe,		ath_pci_probe),
454	DEVMETHOD(device_attach,	ath_pci_attach),
455	DEVMETHOD(device_detach,	ath_pci_detach),
456	DEVMETHOD(device_shutdown,	ath_pci_shutdown),
457	DEVMETHOD(device_suspend,	ath_pci_suspend),
458	DEVMETHOD(device_resume,	ath_pci_resume),
459
460	{ 0,0 }
461};
462static driver_t ath_pci_driver = {
463	"ath",
464	ath_pci_methods,
465	sizeof (struct ath_pci_softc)
466};
467static	devclass_t ath_devclass;
468DRIVER_MODULE(if_ath_pci, pci, ath_pci_driver, ath_devclass, 0, 0);
469MODULE_VERSION(if_ath_pci, 1);
470MODULE_DEPEND(if_ath_pci, wlan, 1, 1, 1);		/* 802.11 media layer */
471MODULE_DEPEND(if_ath_pci, ath_main, 1, 1, 1);	/* if_ath driver */
472MODULE_DEPEND(if_ath_pci, ath_hal, 1, 1, 1);	/* ath HAL */
473