1/*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2008-2010 Atheros Communications Inc.
5 * Copyright (c) 2010-2011 Adrian Chadd, Xenion Pty Ltd.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * $FreeBSD: releng/12.0/sys/dev/ath/ath_hal/ar9002/ar9285_phy.c 326255 2017-11-27 14:52:40Z pfg $
29 */
30#include "opt_ah.h"
31
32#include "ah.h"
33#include "ah_internal.h"
34#include "ah_devid.h"
35#include "ah_eeprom_v4k.h"
36
37#include "ar9002/ar9280.h"
38#include "ar9002/ar9285.h"
39#include "ar5416/ar5416reg.h"
40#include "ar5416/ar5416phy.h"
41#include "ar9002/ar9285phy.h"
42#include "ar9002/ar9285_phy.h"
43
44void
45ar9285_antdiv_comb_conf_get(struct ath_hal *ah, HAL_ANT_COMB_CONFIG *antconf)
46{
47	uint32_t regval;
48
49	regval = OS_REG_READ(ah, AR_PHY_MULTICHAIN_GAIN_CTL);
50	antconf->main_lna_conf = (regval & AR_PHY_9285_ANT_DIV_MAIN_LNACONF) >>
51				  AR_PHY_9285_ANT_DIV_MAIN_LNACONF_S;
52	antconf->alt_lna_conf = (regval & AR_PHY_9285_ANT_DIV_ALT_LNACONF) >>
53				 AR_PHY_9285_ANT_DIV_ALT_LNACONF_S;
54	antconf->fast_div_bias = (regval & AR_PHY_9285_FAST_DIV_BIAS) >>
55				  AR_PHY_9285_FAST_DIV_BIAS_S;
56	antconf->antdiv_configgroup = DEFAULT_ANTDIV_CONFIG_GROUP;
57}
58
59void
60ar9285_antdiv_comb_conf_set(struct ath_hal *ah, HAL_ANT_COMB_CONFIG *antconf)
61{
62	uint32_t regval;
63
64	regval = OS_REG_READ(ah, AR_PHY_MULTICHAIN_GAIN_CTL);
65	regval &= ~(AR_PHY_9285_ANT_DIV_MAIN_LNACONF |
66		    AR_PHY_9285_ANT_DIV_ALT_LNACONF |
67		    AR_PHY_9285_FAST_DIV_BIAS);
68	regval |= ((antconf->main_lna_conf << AR_PHY_9285_ANT_DIV_MAIN_LNACONF_S)
69		   & AR_PHY_9285_ANT_DIV_MAIN_LNACONF);
70	regval |= ((antconf->alt_lna_conf << AR_PHY_9285_ANT_DIV_ALT_LNACONF_S)
71		   & AR_PHY_9285_ANT_DIV_ALT_LNACONF);
72	regval |= ((antconf->fast_div_bias << AR_PHY_9285_FAST_DIV_BIAS_S)
73		   & AR_PHY_9285_FAST_DIV_BIAS);
74
75	OS_REG_WRITE(ah, AR_PHY_MULTICHAIN_GAIN_CTL, regval);
76}
77
78/*
79 * Check whether combined + fast antenna diversity should be enabled.
80 *
81 * This enables software-driven RX antenna diversity based on RX
82 * RSSI + antenna config packet sampling.
83 */
84HAL_BOOL
85ar9285_check_div_comb(struct ath_hal *ah)
86{
87	uint8_t ant_div_ctl1;
88	HAL_EEPROM_v4k *ee = AH_PRIVATE(ah)->ah_eeprom;
89        const MODAL_EEP4K_HEADER *pModal = &ee->ee_base.modalHeader;
90
91#if 0
92	/* For now, simply disable this until it's better debugged. -adrian */
93	return AH_FALSE;
94#endif
95
96	if (! AR_SREV_KITE(ah))
97		return AH_FALSE;
98
99	if (pModal->version < 3)
100		return AH_FALSE;
101
102	ant_div_ctl1 = pModal->antdiv_ctl1;
103	if ((ant_div_ctl1 & 0x1) && ((ant_div_ctl1 >> 3) & 0x1))
104		return AH_TRUE;
105
106	return AH_FALSE;
107}
108