1/*-
2 * SPDX-License-Identifier: ISC
3 *
4 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
5 * Copyright (c) 2002-2004 Atheros Communications, Inc.
6 *
7 * Permission to use, copy, modify, and/or distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
10 *
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 *
19 * $FreeBSD: releng/12.0/sys/dev/ath/ath_hal/ar5210/ar5210phy.h 326695 2017-12-08 15:57:29Z pfg $
20 */
21#ifndef _DEV_ATH_AR5210PHY_H
22#define _DEV_ATH_AR5210PHY_H
23
24/*
25 * Definitions for the PHY on the Atheros AR5210 parts.
26 */
27
28/* PHY Registers */
29#define	AR_PHY_BASE		0x9800		/* PHY register base */
30#define	AR_PHY(_n)		(AR_PHY_BASE + ((_n)<<2))
31
32#define	AR_PHY_FRCTL		0x9804		/* PHY frame control */
33#define	AR_PHY_TURBO_MODE	0x00000001	/* PHY turbo mode */
34#define	AR_PHY_TURBO_SHORT	0x00000002	/* PHY turbo short symbol */
35#define	AR_PHY_TIMING_ERR	0x01000000	/* Detect PHY timing error */
36#define	AR_PHY_PARITY_ERR	0x02000000	/* Detect signal parity err */
37#define	AR_PHY_ILLRATE_ERR	0x04000000	/* Detect PHY illegal rate */
38#define	AR_PHY_ILLLEN_ERR	0x08000000	/* Detect PHY illegal length */
39#define	AR_PHY_SERVICE_ERR	0x20000000	/* Detect PHY nonzero service */
40#define	AR_PHY_TXURN_ERR	0x40000000	/* DetectPHY TX underrun */
41#define	AR_PHY_FRCTL_BITS \
42	"\20\1TURBO_MODE\2TURBO_SHORT\30TIMING_ERR\31PARITY_ERR\32ILLRATE_ERR"\
43	"\33ILLEN_ERR\35SERVICE_ERR\36TXURN_ERR"
44
45#define	AR_PHY_AGC		0x9808		/* PHY AGC command */
46#define	AR_PHY_AGC_DISABLE	0x08000000	/* Disable PHY AGC */
47#define	AR_PHY_AGC_BITS	"\20\33DISABLE"
48
49#define	AR_PHY_CHIPID		0x9818		/* PHY chip revision */
50
51#define	AR_PHY_ACTIVE		0x981c		/* PHY activation */
52#define	AR_PHY_ENABLE		0x00000001	/* activate PHY */
53#define	AR_PHY_DISABLE		0x00000002	/* deactivate PHY */
54#define	AR_PHY_ACTIVE_BITS	"\20\1ENABLE\2DISABLE"
55
56#define	AR_PHY_AGCCTL		0x9860		/* PHY calibration and noise floor */
57#define	AR_PHY_AGC_CAL		0x00000001	/* PHY internal calibration */
58#define	AR_PHY_AGC_NF		0x00000002	/* calc PHY noise-floor */
59#define	AR_PHY_AGCCTL_BITS	"\20\1CAL\2NF"
60
61#endif /* _DEV_ATH_AR5210PHY_H */
62