1#ifndef __AR9300_FREEBSD_INC_H__ 2#define __AR9300_FREEBSD_INC_H__ 3 4/* 5 * Define some configuration entries for the AR9300 HAL, so #if entries 6 * don't have to be removed. 7 */ 8#define ATH_DRIVER_SIM 0 /* SIM */ 9#define ATH_WOW 0 /* Wake on Wireless */ 10#define ATH_SUPPORT_MCI 1 /* MCI btcoex */ 11#define ATH_SUPPORT_AIC 0 /* XXX to do with btcoex? */ 12#define AH_NEED_TX_DATA_SWAP 0 /* TX descriptor swap? */ 13#define AH_NEED_RX_DATA_SWAP 0 /* TX descriptor swap? */ 14#define ATH_SUPPORT_WIRESHARK 0 /* Radiotap HAL code */ 15#define AH_SUPPORT_WRITE_EEPROM 0 /* EEPROM write support */ 16#define ATH_SUPPORT_WAPI 0 /* China WAPI support */ 17#define ATH_ANT_DIV_COMB 1 /* Antenna combining */ 18#define ATH_SUPPORT_RAW_ADC_CAPTURE 0 /* Raw ADC capture support */ 19#define ATH_TRAFFIC_FAST_RECOVER 0 /* XXX not sure yet */ 20#define ATH_SUPPORT_SPECTRAL 1 /* Spectral scan support */ 21#define ATH_BT_COEX 1 /* Enable BT Coex code */ 22#define ATH_PCIE_ERROR_MONITOR 0 /* ??? */ 23#define ATH_SUPPORT_CRDC 0 /* ??? */ 24#define ATH_LOW_POWER_ENABLE 0 /* ??? */ 25#define ATH_SUPPORT_VOW_DCS 0 /* Video over wireless dynamic channel select */ 26#define REMOVE_PKT_LOG 1 27#define ATH_VC_MODE_PROXY_STA 0 /* Azimuth + proxysta? */ 28#define ATH_GEN_RANDOMNESS 0 29#define __PKT_SERIOUS_ERRORS__ 0 30#define HAL_INTR_REFCOUNT_DISABLE 1 /* XXX wha? And atomics in the HAL!? */ 31#define UMAC_SUPPORT_SMARTANTENNA 0 /* sigh.. */ 32#define ATH_SMARTANTENNA_DISABLE_JTAG 0 33#define ATH_SUPPORT_WIRESHARK 0 34#define ATH_SUPPORT_WIFIPOS 0 35#define ATH_SUPPORT_PAPRD 1 36#define ATH_SUPPORT_TxBF 0 37#define AH_PRIVATE_DIAG 1 38#define ATH_SUPPORT_KEYPLUMB_WAR 0 39 40/* XXX need to reverify these; they came in with qcamain */ 41#define ATH_SUPPORT_FAST_CC 0 42#define ATH_SUPPORT_RADIO_RETENTION 0 43#define ATH_SUPPORT_CAL_REUSE 0 44 45#define ATH_WOW_OFFLOAD 0 46 47#define HAL_NO_INTERSPERSED_READS 48 49/* Required or things will probe/attach, but not work right */ 50#define AH_SUPPORT_OSPREY 1 51#define AH_SUPPORT_POSEIDON 1 52#define AH_SUPPORT_AR9300 1 53 54/* These are the embedded boards */ 55#ifdef AH_SUPPORT_AR9330 56#define AH_SUPPORT_HORNET 1 57#endif /* AH_SUPPORT_AR9330 */ 58#ifdef AH_SUPPORT_AR9340 59#define AH_SUPPORT_WASP 1 60#endif /* AH_SUPPORT_AR9340 */ 61#ifdef AH_SUPPORT_QCA9550 62#define AH_SUPPORT_SCORPION 1 63#endif /* AH_SUPPORT_QCA9550 */ 64#ifdef AH_SUPPORT_QCA9530 65#define AH_SUPPORT_HONEYBEE 1 66#endif /* AH_SUPPORT_QCA9530 */ 67#define FIX_NOISE_FLOOR 1 68 69/* XXX this needs to be removed! No atomics in the HAL! */ 70typedef int os_atomic_t; /* XXX shouldn't do atomics here! */ 71#define OS_ATOMIC_INC(a) (*a)++ 72#define OS_ATOMIC_DEC(a) (*a)-- 73 74/* 75 * HAL definitions which aren't necessarily for public consumption (yet). 76 */ 77 78enum { 79 HAL_TRUE_CHIP = 1, 80 HAL_MAC_TO_MAC_EMU, 81 HAL_MAC_BB_EMU, 82}; 83 84/* HAL_KEY_TYPE */ 85enum { 86 HAL_KEY_PROXY_STA_MASK = 0x10, 87}; 88 89typedef enum { 90 HAL_SMPS_DEFAULT = 0, 91 HAL_SMPS_SW_CTRL_LOW_PWR, /* Software control, low power setting */ 92 HAL_SMPS_SW_CTRL_HIGH_PWR, /* Software control, high power setting */ 93 HAL_SMPS_HW_CTRL /* Hardware Control */ 94} HAL_SMPS_MODE; 95 96/* 97 * Green Tx, Based on different RSSI of Received Beacon thresholds, 98 * using different tx power by modified register tx power related values. 99 * The thresholds are decided by system team. 100 */ 101#define GreenTX_thres1 56 /* in dB */ 102#define GreenTX_thres2 36 /* in dB */ 103 104typedef enum { 105 HAL_RSSI_TX_POWER_NONE = 0, 106 HAL_RSSI_TX_POWER_SHORT = 1, /* short range, reduce OB/DB bias current and disable PAL */ 107 HAL_RSSI_TX_POWER_MIDDLE = 2, /* middle range, reduce OB/DB bias current and PAL is enabled */ 108 HAL_RSSI_TX_POWER_LONG = 3, /* long range, orig. OB/DB bias current and PAL is enabled */ 109} HAL_RSSI_TX_POWER; 110 111struct dfs_pulse { 112 u_int32_t rp_numpulses ; /* Num of pulses in radar burst */ 113 u_int32_t rp_pulsedur; /* Duration of each pulse in usecs */ 114 u_int32_t rp_pulsefreq; /* Frequency of pulses in burst */ 115 u_int32_t rp_max_pulsefreq; /* Frequency of pulses in burst */ 116 u_int32_t rp_patterntype; /* fixed or variable pattern type*/ 117 u_int32_t rp_pulsevar; /* Time variation of pulse duration for 118 matched filter (single-sided) in usecs */ 119 u_int32_t rp_threshold; /* Threshold for MF output to indicate 120 radar match */ 121 u_int32_t rp_mindur; /* Min pulse duration to be considered for 122 this pulse type */ 123 u_int32_t rp_maxdur; /* Max pusle duration to be considered for 124 this pulse type */ 125 u_int32_t rp_rssithresh; /* Minimum rssi to be considered a radar pulse */ 126 u_int32_t rp_meanoffset; /* Offset for timing adjustment */ 127 int32_t rp_rssimargin; /* rssi threshold margin. In Turbo Mode HW reports rssi 3dBm */ 128 /* lower than in non TURBO mode. 129 This will be used to offset that diff.*/ 130 u_int32_t rp_ignore_pri_window; 131 u_int32_t rp_pulseid; /* Unique ID for identifying filter */ 132}; 133 134struct dfs_staggered_pulse { 135 u_int32_t rp_numpulses; /* Num of pulses in radar burst */ 136 u_int32_t rp_pulsedur; /* Duration of each pulse in usecs */ 137 u_int32_t rp_min_pulsefreq; /* Frequency of pulses in burst */ 138 u_int32_t rp_max_pulsefreq; /* Frequency of pulses in burst */ 139 u_int32_t rp_patterntype; /* fixed or variable pattern type*/ 140 u_int32_t rp_pulsevar; /* Time variation of pulse duration for 141 matched filter (single-sided) in usecs */ 142 u_int32_t rp_threshold; /* Thershold for MF output to indicateC 143 radar match */ 144 u_int32_t rp_mindur; /* Min pulse duration to be considered for 145 this pulse type */ 146 u_int32_t rp_maxdur; /* Max pusle duration to be considered for 147 this pulse type */ 148 u_int32_t rp_rssithresh; /* Minimum rssi to be considered a radar pulse */ 149 u_int32_t rp_meanoffset; /* Offset for timing adjustment */ 150 int32_t rp_rssimargin; /* rssi threshold margin. In Turbo Mode HW reports rssi 3dBm */ 151 /* lower than in non TURBO mode. This will be used to offset that diff.*/ 152 u_int32_t rp_pulseid; /* Unique ID for identifying filter */ 153 }; 154 155struct dfs_bin5pulse { 156 u_int32_t b5_threshold; /* Number of bin5 pulses to indicate detection */ 157 u_int32_t b5_mindur; /* Min duration for a bin5 pulse */ 158 u_int32_t b5_maxdur; /* Max duration for a bin5 pulse */ 159 u_int32_t b5_timewindow; /* Window over which to count bin5 pulses */ 160 u_int32_t b5_rssithresh; /* Min rssi to be considered a pulse */ 161 u_int32_t b5_rssimargin; /* rssi threshold margin. In Turbo Mode HW reports rssi 3dB */ 162}; 163 164/* 165 * Noise power data definitions 166 * units are: 4 x dBm - NOISE_PWR_DATA_OFFSET (e.g. -25 = (-25/4 - 90) = -96.25 dBm) 167 * range (for 6 signed bits) is (-32 to 31) + offset => -122dBm to -59dBm 168 * resolution (2 bits) is 0.25dBm 169 */ 170#define NOISE_PWR_DATA_OFFSET -90 /* dbm - all pwr report data is represented offset by this */ 171#define INT_2_NOISE_PWR_DBM(_p) (((_p) - NOISE_PWR_DATA_OFFSET) << 2) 172#define NOISE_PWR_DBM_2_INT(_p) ((((_p) + 3) >> 2) + NOISE_PWR_DATA_OFFSET) 173#define NOISE_PWR_DBM_2_DEC(_p) (((-(_p)) & 3) * 25) 174#define N2DBM(_x,_y) ((((_x) - NOISE_PWR_DATA_OFFSET) << 2) - (_y)/25) 175/* SPECTRAL SCAN defines end */ 176 177typedef struct halvowstats { 178 u_int32_t tx_frame_count; 179 u_int32_t rx_frame_count; 180 u_int32_t rx_clear_count; 181 u_int32_t cycle_count; 182 u_int32_t ext_cycle_count; 183} HAL_VOWSTATS; 184 185/* 186 * Weight table configurations. 187 */ 188#define AR9300_BT_WGHT 0xcccc4444 189#define AR9300_STOMP_ALL_WLAN_WGHT0 0xfffffff0 190#define AR9300_STOMP_ALL_WLAN_WGHT1 0xfffffff0 191#define AR9300_STOMP_LOW_WLAN_WGHT0 0x88888880 192#define AR9300_STOMP_LOW_WLAN_WGHT1 0x88888880 193#define AR9300_STOMP_NONE_WLAN_WGHT0 0x00000000 194#define AR9300_STOMP_NONE_WLAN_WGHT1 0x00000000 195#define AR9300_STOMP_ALL_FORCE_WLAN_WGHT0 0xffffffff // Stomp BT even when WLAN is idle 196#define AR9300_STOMP_ALL_FORCE_WLAN_WGHT1 0xffffffff 197#define AR9300_STOMP_LOW_FORCE_WLAN_WGHT0 0x88888888 // Stomp BT even when WLAN is idle 198#define AR9300_STOMP_LOW_FORCE_WLAN_WGHT1 0x88888888 199 200#define JUPITER_STOMP_ALL_WLAN_WGHT0 0x01017d01 201#define JUPITER_STOMP_ALL_WLAN_WGHT1 0x41414101 202#define JUPITER_STOMP_ALL_WLAN_WGHT2 0x41414101 203#define JUPITER_STOMP_ALL_WLAN_WGHT3 0x41414141 204#define JUPITER_STOMP_LOW_WLAN_WGHT0 0x01017d01 205#define JUPITER_STOMP_LOW_WLAN_WGHT1 0x3b3b3b01 206#define JUPITER_STOMP_LOW_WLAN_WGHT2 0x3b3b3b01 207#define JUPITER_STOMP_LOW_WLAN_WGHT3 0x3b3b3b3b 208#define JUPITER_STOMP_LOW_FTP_WLAN_WGHT0 0x01017d01 209#define JUPITER_STOMP_LOW_FTP_WLAN_WGHT1 0x013b0101 210#define JUPITER_STOMP_LOW_FTP_WLAN_WGHT2 0x3b3b0101 211#define JUPITER_STOMP_LOW_FTP_WLAN_WGHT3 0x3b3b013b 212#define JUPITER_STOMP_NONE_WLAN_WGHT0 0x01017d01 213#define JUPITER_STOMP_NONE_WLAN_WGHT1 0x01010101 214#define JUPITER_STOMP_NONE_WLAN_WGHT2 0x01010101 215#define JUPITER_STOMP_NONE_WLAN_WGHT3 0x01010101 216#define JUPITER_STOMP_ALL_FORCE_WLAN_WGHT0 0x01017d7d 217#define JUPITER_STOMP_ALL_FORCE_WLAN_WGHT1 0x7d7d7d01 218#define JUPITER_STOMP_ALL_FORCE_WLAN_WGHT2 0x7d7d7d7d 219#define JUPITER_STOMP_ALL_FORCE_WLAN_WGHT3 0x7d7d7d7d 220#define JUPITER_STOMP_LOW_FORCE_WLAN_WGHT0 0x01013b3b 221#define JUPITER_STOMP_LOW_FORCE_WLAN_WGHT1 0x3b3b3b01 222#define JUPITER_STOMP_LOW_FORCE_WLAN_WGHT2 0x3b3b3b3b 223#define JUPITER_STOMP_LOW_FORCE_WLAN_WGHT3 0x3b3b3b3b 224 225#define MCI_CONCUR_TX_WLAN_WGHT1_MASK 0xff000000 226#define MCI_CONCUR_TX_WLAN_WGHT1_MASK_S 24 227#define MCI_CONCUR_TX_WLAN_WGHT2_MASK 0x00ff0000 228#define MCI_CONCUR_TX_WLAN_WGHT2_MASK_S 16 229#define MCI_CONCUR_TX_WLAN_WGHT3_MASK 0x000000ff 230#define MCI_CONCUR_TX_WLAN_WGHT3_MASK_S 0 231#define MCI_CONCUR_TX_WLAN_WGHT3_MASK2 0x00ff0000 232#define MCI_CONCUR_TX_WLAN_WGHT3_MASK2_S 16 233 234#define MCI_QUERY_BT_VERSION_VERBOSE 0 235#define MCI_LINKID_INDEX_MGMT_PENDING 1 236 237#define HAL_MCI_FLAG_DISABLE_TIMESTAMP 0x00000001 /* Disable time stamp */ 238 239/* 240 * The values below come from the system team test result. 241 * For Jupiter, BT tx power level is from 0(-20dBm) to 6(4dBm). 242 * Lowest WLAN tx power would be in bit[23:16] of dword 1. 243 */ 244static const u_int32_t mci_concur_tx_max_pwr[4][8] = 245 { /* No limit */ 246 {0x7f7f7f7f, 0x7f7f7f7f, 0x7f7f7f7f, 0x7f7f7f7f, 247 0x7f7f7f7f, 0x7f7f7f7f, 0x7f7f7f7f, 0x7f7f7f7f}, 248 /* 11G */ 249 {0x16161616, 0x12121516, 0x12121212, 0x12121212, 250 0x12121212, 0x12121212, 0x12121212, 0x7f121212}, 251 /* HT20 */ 252 {0x15151515, 0x14141515, 0x14141414, 0x14141414, 253 0x14141414, 0x14141414, 0x14141414, 0x7f141414}, 254 /* HT40 */ 255 {0x10101010, 0x10101010, 0x10101010, 0x10101010, 256 0x10101010, 0x10101010, 0x10101010, 0x7f101010}}; 257#define ATH_MCI_CONCUR_TX_LOWEST_PWR_MASK 0x00ff0000 258#define ATH_MCI_CONCUR_TX_LOWEST_PWR_MASK_S 16 259 260#endif /* __AR9300_FREEBSD_INC_H__ */ 261