1/*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2016 Nicole Graziano <nicole@nextbsd.org>
5 * All rights reserved.
6 * Copyright (c) 2021 Rubicon Communications, LLC (Netgate)
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 *    notice, this list of conditions and the following disclaimer in the
15 *    documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 *
29 * $FreeBSD$
30 */
31
32
33#ifdef HAVE_KERNEL_OPTION_HEADERS
34#include "opt_device_polling.h"
35#endif
36
37#include <sys/param.h>
38#include <sys/systm.h>
39#ifdef DDB
40#include <sys/types.h>
41#include <ddb/ddb.h>
42#endif
43#include <sys/buf_ring.h>
44#include <sys/bus.h>
45#include <sys/endian.h>
46#include <sys/kernel.h>
47#include <sys/kthread.h>
48#include <sys/malloc.h>
49#include <sys/mbuf.h>
50#include <sys/module.h>
51#include <sys/rman.h>
52#include <sys/smp.h>
53#include <sys/socket.h>
54#include <sys/sockio.h>
55#include <sys/sysctl.h>
56#include <sys/taskqueue.h>
57#include <sys/eventhandler.h>
58#include <machine/bus.h>
59#include <machine/resource.h>
60
61#include <net/bpf.h>
62#include <net/ethernet.h>
63#include <net/if.h>
64#include <net/if_var.h>
65#include <net/if_arp.h>
66#include <net/if_dl.h>
67#include <net/if_media.h>
68#include <net/iflib.h>
69
70#include <net/if_types.h>
71#include <net/if_vlan_var.h>
72
73#include <netinet/in_systm.h>
74#include <netinet/in.h>
75#include <netinet/if_ether.h>
76#include <netinet/ip.h>
77#include <netinet/ip6.h>
78#include <netinet/tcp.h>
79#include <netinet/udp.h>
80
81#include <machine/in_cksum.h>
82#include <dev/led/led.h>
83#include <dev/pci/pcivar.h>
84#include <dev/pci/pcireg.h>
85
86#include "igc_api.h"
87#include "igc_i225.h"
88#include "ifdi_if.h"
89
90
91#ifndef _IGC_H_DEFINED_
92#define _IGC_H_DEFINED_
93
94
95/* Tunables */
96
97/*
98 * IGC_MAX_TXD: Maximum number of Transmit Descriptors
99 * Valid Range: 128-4096
100 * Default Value: 1024
101 *   This value is the number of transmit descriptors allocated by the driver.
102 *   Increasing this value allows the driver to queue more transmits. Each
103 *   descriptor is 16 bytes.
104 *   Since TDLEN should be multiple of 128bytes, the number of transmit
105 *   desscriptors should meet the following condition.
106 *      (num_tx_desc * sizeof(struct igc_tx_desc)) % 128 == 0
107 */
108#define IGC_MIN_TXD		128
109#define IGC_MAX_TXD		4096
110#define IGC_DEFAULT_TXD          1024
111#define IGC_DEFAULT_MULTI_TXD	4096
112#define IGC_MAX_TXD		4096
113
114/*
115 * IGC_MAX_RXD - Maximum number of receive Descriptors
116 * Valid Range: 128-4096
117 * Default Value: 1024
118 *   This value is the number of receive descriptors allocated by the driver.
119 *   Increasing this value allows the driver to buffer more incoming packets.
120 *   Each descriptor is 16 bytes.  A receive buffer is also allocated for each
121 *   descriptor. The maximum MTU size is 16110.
122 *   Since TDLEN should be multiple of 128bytes, the number of transmit
123 *   desscriptors should meet the following condition.
124 *      (num_tx_desc * sizeof(struct igc_tx_desc)) % 128 == 0
125 */
126#define IGC_MIN_RXD		128
127#define IGC_MAX_RXD		4096
128#define IGC_DEFAULT_RXD		1024
129#define IGC_DEFAULT_MULTI_RXD	4096
130#define IGC_MAX_RXD		4096
131
132/*
133 * IGC_TIDV_VAL - Transmit Interrupt Delay Value
134 * Valid Range: 0-65535 (0=off)
135 * Default Value: 64
136 *   This value delays the generation of transmit interrupts in units of
137 *   1.024 microseconds. Transmit interrupt reduction can improve CPU
138 *   efficiency if properly tuned for specific network traffic. If the
139 *   system is reporting dropped transmits, this value may be set too high
140 *   causing the driver to run out of available transmit descriptors.
141 */
142#define IGC_TIDV_VAL		64
143
144/*
145 * IGC_TADV_VAL - Transmit Absolute Interrupt Delay Value
146 * Valid Range: 0-65535 (0=off)
147 * Default Value: 64
148 *   This value, in units of 1.024 microseconds, limits the delay in which a
149 *   transmit interrupt is generated. Useful only if IGC_TIDV is non-zero,
150 *   this value ensures that an interrupt is generated after the initial
151 *   packet is sent on the wire within the set amount of time.  Proper tuning,
152 *   along with IGC_TIDV_VAL, may improve traffic throughput in specific
153 *   network conditions.
154 */
155#define IGC_TADV_VAL		64
156
157/*
158 * IGC_RDTR_VAL - Receive Interrupt Delay Timer (Packet Timer)
159 * Valid Range: 0-65535 (0=off)
160 * Default Value: 0
161 *   This value delays the generation of receive interrupts in units of 1.024
162 *   microseconds.  Receive interrupt reduction can improve CPU efficiency if
163 *   properly tuned for specific network traffic. Increasing this value adds
164 *   extra latency to frame reception and can end up decreasing the throughput
165 *   of TCP traffic. If the system is reporting dropped receives, this value
166 *   may be set too high, causing the driver to run out of available receive
167 *   descriptors.
168 *
169 *   CAUTION: When setting IGC_RDTR to a value other than 0, adapters
170 *            may hang (stop transmitting) under certain network conditions.
171 *            If this occurs a WATCHDOG message is logged in the system
172 *            event log. In addition, the controller is automatically reset,
173 *            restoring the network connection. To eliminate the potential
174 *            for the hang ensure that IGC_RDTR is set to 0.
175 */
176#define IGC_RDTR_VAL		0
177
178/*
179 * Receive Interrupt Absolute Delay Timer
180 * Valid Range: 0-65535 (0=off)
181 * Default Value: 64
182 *   This value, in units of 1.024 microseconds, limits the delay in which a
183 *   receive interrupt is generated. Useful only if IGC_RDTR is non-zero,
184 *   this value ensures that an interrupt is generated after the initial
185 *   packet is received within the set amount of time.  Proper tuning,
186 *   along with IGC_RDTR, may improve traffic throughput in specific network
187 *   conditions.
188 */
189#define IGC_RADV_VAL		64
190
191/*
192 * This parameter controls whether or not autonegotation is enabled.
193 *              0 - Disable autonegotiation
194 *              1 - Enable  autonegotiation
195 */
196#define DO_AUTO_NEG		true
197
198/* Tunables -- End */
199
200#define AUTONEG_ADV_DEFAULT	(ADVERTISE_10_HALF | ADVERTISE_10_FULL | \
201				ADVERTISE_100_HALF | ADVERTISE_100_FULL | \
202				ADVERTISE_1000_FULL | ADVERTISE_2500_FULL)
203
204#define AUTO_ALL_MODES		0
205
206/*
207 * Micellaneous constants
208 */
209#define MAX_NUM_MULTICAST_ADDRESSES     128
210#define IGC_FC_PAUSE_TIME		0x0680
211
212#define IGC_TXPBSIZE		20408
213#define IGC_PKTTYPE_MASK	0x0000FFF0
214#define IGC_DMCTLX_DCFLUSH_DIS	0x80000000  /* Disable DMA Coalesce Flush */
215
216#define IGC_RX_PTHRESH			8
217#define IGC_RX_HTHRESH			8
218#define IGC_RX_WTHRESH			4
219
220#define IGC_TX_PTHRESH			8
221#define IGC_TX_HTHRESH			1
222
223/*
224 * TDBA/RDBA should be aligned on 16 byte boundary. But TDLEN/RDLEN should be
225 * multiple of 128 bytes. So we align TDBA/RDBA on 128 byte boundary. This will
226 * also optimize cache line size effect. H/W supports up to cache line size 128.
227 */
228#define IGC_DBA_ALIGN			128
229
230#define IGC_MSIX_BAR			3
231
232/* Defines for printing debug information */
233#define DEBUG_INIT  0
234#define DEBUG_IOCTL 0
235#define DEBUG_HW    0
236
237#define INIT_DEBUGOUT(S)            if (DEBUG_INIT)  printf(S "\n")
238#define INIT_DEBUGOUT1(S, A)        if (DEBUG_INIT)  printf(S "\n", A)
239#define INIT_DEBUGOUT2(S, A, B)     if (DEBUG_INIT)  printf(S "\n", A, B)
240#define IOCTL_DEBUGOUT(S)           if (DEBUG_IOCTL) printf(S "\n")
241#define IOCTL_DEBUGOUT1(S, A)       if (DEBUG_IOCTL) printf(S "\n", A)
242#define IOCTL_DEBUGOUT2(S, A, B)    if (DEBUG_IOCTL) printf(S "\n", A, B)
243#define HW_DEBUGOUT(S)              if (DEBUG_HW) printf(S "\n")
244#define HW_DEBUGOUT1(S, A)          if (DEBUG_HW) printf(S "\n", A)
245#define HW_DEBUGOUT2(S, A, B)       if (DEBUG_HW) printf(S "\n", A, B)
246
247#define IGC_MAX_SCATTER			40
248#define IGC_VFTA_SIZE			128
249#define IGC_TSO_SIZE			65535
250#define IGC_TSO_SEG_SIZE		4096	/* Max dma segment size */
251#define IGC_CSUM_OFFLOAD	(CSUM_IP | CSUM_IP_UDP | CSUM_IP_TCP | \
252				 CSUM_IP_SCTP | CSUM_IP6_UDP | CSUM_IP6_TCP | \
253				 CSUM_IP6_SCTP)	/* Offload bits in mbuf flag */
254
255struct igc_adapter;
256
257struct igc_int_delay_info {
258	struct igc_adapter *adapter;	/* Back-pointer to the adapter struct */
259	int offset;			/* Register offset to read/write */
260	int value;			/* Current value in usecs */
261};
262
263/*
264 * The transmit ring, one per tx queue
265 */
266struct tx_ring {
267        struct igc_adapter	*adapter;
268	struct igc_tx_desc	*tx_base;
269	uint64_t                tx_paddr;
270	qidx_t			*tx_rsq;
271	uint8_t			me;
272	qidx_t			tx_rs_cidx;
273	qidx_t			tx_rs_pidx;
274	qidx_t			tx_cidx_processed;
275	/* Interrupt resources */
276	void                    *tag;
277	struct resource         *res;
278        unsigned long		tx_irq;
279
280	/* Saved csum offloading context information */
281	int			csum_flags;
282	int			csum_lhlen;
283	int			csum_iphlen;
284
285	int			csum_thlen;
286	int			csum_mss;
287	int			csum_pktlen;
288
289	uint32_t		csum_txd_upper;
290	uint32_t		csum_txd_lower; /* last field */
291};
292
293/*
294 * The Receive ring, one per rx queue
295 */
296struct rx_ring {
297        struct igc_adapter      *adapter;
298        struct igc_rx_queue     *que;
299        u32                     me;
300        u32                     payload;
301        union igc_rx_desc_extended	*rx_base;
302        uint64_t                rx_paddr;
303
304        /* Interrupt resources */
305        void                    *tag;
306        struct resource         *res;
307
308        /* Soft stats */
309        unsigned long		rx_irq;
310        unsigned long		rx_discarded;
311        unsigned long		rx_packets;
312        unsigned long		rx_bytes;
313};
314
315struct igc_tx_queue {
316	struct igc_adapter      *adapter;
317        u32                     msix;
318	u32			eims;		/* This queue's EIMS bit */
319	u32                     me;
320	struct tx_ring          txr;
321};
322
323struct igc_rx_queue {
324	struct igc_adapter     *adapter;
325	u32                    me;
326	u32                    msix;
327	u32                    eims;
328	struct rx_ring         rxr;
329	u64                    irqs;
330	struct if_irq          que_irq;
331};
332
333/* Our adapter structure */
334struct igc_adapter {
335	if_t		ifp;
336	struct igc_hw	hw;
337
338        if_softc_ctx_t shared;
339        if_ctx_t ctx;
340#define tx_num_queues shared->isc_ntxqsets
341#define rx_num_queues shared->isc_nrxqsets
342#define intr_type shared->isc_intr
343	/* FreeBSD operating-system-specific structures. */
344	struct igc_osdep osdep;
345	device_t	dev;
346	struct cdev	*led_dev;
347
348        struct igc_tx_queue *tx_queues;
349        struct igc_rx_queue *rx_queues;
350        struct if_irq   irq;
351
352	struct resource *memory;
353	struct resource *flash;
354	struct resource	*ioport;
355
356	struct resource	*res;
357	void		*tag;
358	u32		linkvec;
359	u32		ivars;
360
361	struct ifmedia	*media;
362	int		msix;
363	int		if_flags;
364	int		igc_insert_vlan_header;
365	u32		ims;
366
367	u32		flags;
368	/* Task for FAST handling */
369	struct grouptask link_task;
370
371        u32		txd_cmd;
372
373        u32             tx_process_limit;
374        u32             rx_process_limit;
375	u32		rx_mbuf_sz;
376
377	/* Management and WOL features */
378	u32		wol;
379
380	/* Multicast array memory */
381	u8		*mta;
382
383	/* Info about the interface */
384	u16		link_active;
385	u16		fc;
386	u16		link_speed;
387	u16		link_duplex;
388	u32		smartspeed;
389	u32		dmac;
390	int		link_mask;
391
392	u64		que_mask;
393
394	struct igc_int_delay_info tx_int_delay;
395	struct igc_int_delay_info tx_abs_int_delay;
396	struct igc_int_delay_info rx_int_delay;
397	struct igc_int_delay_info rx_abs_int_delay;
398	struct igc_int_delay_info tx_itr;
399
400	/* Misc stats maintained by the driver */
401	unsigned long	dropped_pkts;
402	unsigned long	link_irq;
403	unsigned long	rx_overruns;
404	unsigned long	watchdog_events;
405
406	struct igc_hw_stats stats;
407	u16		vf_ifp;
408};
409
410void igc_dump_rs(struct igc_adapter *);
411
412#define IGC_RSSRK_SIZE	4
413#define IGC_RSSRK_VAL(key, i)		(key[(i) * IGC_RSSRK_SIZE] | \
414					 key[(i) * IGC_RSSRK_SIZE + 1] << 8 | \
415					 key[(i) * IGC_RSSRK_SIZE + 2] << 16 | \
416					 key[(i) * IGC_RSSRK_SIZE + 3] << 24)
417#endif /* _IGC_H_DEFINED_ */
418