1/*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2008 Stanislav Sedov <stas@FreeBSD.org>.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 *
27 * $FreeBSD: releng/12.0/sys/dev/ae/if_aevar.h 326255 2017-11-27 14:52:40Z pfg $
28 */
29
30#ifndef IF_AEVAR_H
31#define IF_AEVAR_H
32
33/*
34 * Supported chips identifiers.
35*/
36#define	VENDORID_ATTANSIC	0x1969
37#define	DEVICEID_ATTANSIC_L2	0x2048
38
39/* How much to wait for reset to complete (10 microsecond units). */
40#define	AE_RESET_TIMEOUT	100
41
42/* How much to wait for device to enter idle state (100 microsecond units). */
43#define	AE_IDLE_TIMEOUT		100
44
45/* How much to wait for MDIO to do the work (2 microsecond units). */
46#define	AE_MDIO_TIMEOUT		10
47
48/* How much to wait for VPD reading operation to complete (2 ms units). */
49#define AE_VPD_TIMEOUT		10
50
51/* How much to wait for send operation to complete (HZ units). */
52#define	AE_TX_TIMEOUT		5
53
54/* Default PHY address. */
55#define	AE_PHYADDR_DEFAULT	0
56
57/* Tx packet descriptor header format. */
58typedef struct ae_txd {
59	uint16_t	len;
60	uint16_t	vlan;
61} __packed ae_txd_t;
62
63/* Tx status descriptor format. */
64typedef struct ae_txs {
65	uint16_t	len;
66	uint16_t	flags;
67} __packed ae_txs_t;
68
69/* Rx packet descriptor format. */
70typedef struct ae_rxd {
71	uint16_t	len;
72	uint16_t	flags;
73	uint16_t	vlan;
74	uint16_t	__pad;
75	uint8_t		data[1528];
76} __packed ae_rxd_t;
77
78/* Statistics. */
79typedef struct ae_stats {
80	uint32_t	rx_bcast;
81	uint32_t	rx_mcast;
82	uint32_t	rx_pause;
83	uint32_t	rx_ctrl;
84	uint32_t	rx_crcerr;
85	uint32_t	rx_codeerr;
86	uint32_t	rx_runt;
87	uint32_t	rx_frag;
88	uint32_t	rx_trunc;
89	uint32_t	rx_align;
90	uint32_t	tx_bcast;
91	uint32_t	tx_mcast;
92	uint32_t	tx_pause;
93	uint32_t	tx_ctrl;
94	uint32_t	tx_defer;
95	uint32_t	tx_excdefer;
96	uint32_t	tx_singlecol;
97	uint32_t	tx_multicol;
98	uint32_t	tx_latecol;
99	uint32_t	tx_abortcol;
100	uint32_t	tx_underrun;
101} ae_stats_t;
102
103/* Software state structure. */
104typedef struct ae_softc	{
105	struct ifnet		*ifp;
106	device_t		dev;
107	device_t		miibus;
108	struct resource		*mem[1];
109	struct resource_spec	*spec_mem;
110	struct resource		*irq[1];
111	struct resource_spec	*spec_irq;
112	void			*intrhand;
113
114	struct mtx		mtx;
115
116	uint8_t			eaddr[ETHER_ADDR_LEN];
117	uint8_t			flags;
118	int			if_flags;
119
120	struct callout		tick_ch;
121
122	/* Tasks. */
123	struct task		int_task;
124	struct task		link_task;
125	struct taskqueue	*tq;
126
127	/* DMA tags. */
128	bus_dma_tag_t		dma_parent_tag;
129	bus_dma_tag_t		dma_rxd_tag;
130	bus_dma_tag_t		dma_txd_tag;
131	bus_dma_tag_t		dma_txs_tag;
132	bus_dmamap_t		dma_rxd_map;
133	bus_dmamap_t		dma_txd_map;
134	bus_dmamap_t		dma_txs_map;
135
136	bus_addr_t		dma_rxd_busaddr;
137	bus_addr_t		dma_txd_busaddr;
138	bus_addr_t		dma_txs_busaddr;
139
140	char			*rxd_base_dma;	/* Start of allocated area. */
141	ae_rxd_t		*rxd_base;	/* Start of RxD ring. */
142	char			*txd_base;	/* Start of TxD ring. */
143	ae_txs_t		*txs_base;	/* Start of TxS ring. */
144
145	/* Ring pointers. */
146	unsigned int		rxd_cur;
147	unsigned int		txd_cur;
148	unsigned int		txs_cur;
149	unsigned int		txs_ack;
150	unsigned int		txd_ack;
151
152	int			tx_inproc;	/* Active Tx frames in ring. */
153	int			wd_timer;
154
155	ae_stats_t		stats;
156} ae_softc_t;
157
158#define	AE_LOCK(_sc)		mtx_lock(&(_sc)->mtx)
159#define	AE_UNLOCK(_sc)		mtx_unlock(&(_sc)->mtx)
160#define	AE_LOCK_ASSERT(_sc)	mtx_assert(&(_sc)->mtx, MA_OWNED)
161
162#define	BUS_ADDR_LO(x)		((uint64_t) (x) & 0xFFFFFFFF)
163#define	BUS_ADDR_HI(x)		((uint64_t) (x) >> 32)
164
165#define	AE_FLAG_LINK		0x01	/* Has link. */
166#define	AE_FLAG_DETACH		0x02	/* Is detaching. */
167#define	AE_FLAG_TXAVAIL		0x04	/* Tx'es available. */
168#define	AE_FLAG_MSI		0x08	/* Using MSI. */
169#define	AE_FLAG_PMG		0x10	/* Supports PCI power management. */
170
171#endif	/* IF_AEVAR_H */
172