1/* 2 * Auvia BeOS Driver for Via VT82xx Southbridge audio 3 * 4 * Copyright (c) 2003, Jerome Duval (jerome.duval@free.fr) 5 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Tyler C. Sarna 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the NetBSD 20 * Foundation, Inc. and its contributors. 21 * 4. Neither the name of The NetBSD Foundation nor the names of its 22 * contributors may be used to endorse or promote products derived 23 * from this software without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 26 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38#ifndef _DEV_PCI_AUVIAREG_H_ 39#define _DEV_PCI_AUVIAREG_H_ 40 41// VT8233 specific registers contain a '8233_' 42 43#define AUVIA_PCICONF_JUNK 0x40 44#define AUVIA_PCICONF_ENABLES 0x00ff0000 /* reg 42 mask */ 45#define AUVIA_PCICONF_ACLINKENAB 0x00008000 /* ac link enab */ 46#define AUVIA_PCICONF_ACNOTRST 0x00004000 /* ~(ac reset) */ 47#define AUVIA_PCICONF_ACSYNC 0x00002000 /* ac sync */ 48#define AUVIA_PCICONF_ACVSR 0x00000800 /* var. samp. rate */ 49#define AUVIA_PCICONF_ACSGD 0x00000400 /* SGD enab */ 50#define AUVIA_PCICONF_ACFM 0x00000200 /* FM enab */ 51#define AUVIA_PCICONF_ACSB 0x00000100 /* SB enab */ 52 53#define AUVIA_PLAY_BASE 0x00 54#define AUVIA_RECORD_BASE 0x10 55#define AUVIA_8233_RECORD_BASE 0x60 56 57/* *_RP_* are offsets from AUVIA_PLAY_BASE or AUVIA_RECORD_BASE or AUVIA_8233_RECORD_BASE*/ 58#define AUVIA_RP_STAT 0x00 59#define AUVIA_RPSTAT_INTR 0x03 60#define AUVIA_RP_CONTROL 0x01 61#define AUVIA_RPCTRL_START 0x80 62#define AUVIA_RPCTRL_TERMINATE 0x40 63#define AUVIA_RPCTRL_AUTOSTART 0x20 64/* The following are 8233 specific */ 65#define AUVIA_RPCTRL_STOP 0x04 66#define AUVIA_RPCTRL_EOL 0x02 67#define AUVIA_RPCTRL_FLAG 0x01 68#define AUVIA_RP_MODE 0x02 /* 82c686 specific */ 69#define AUVIA_RPMODE_INTR_FLAG 0x01 70#define AUVIA_RPMODE_INTR_EOL 0x02 71#define AUVIA_RPMODE_STEREO 0x10 72#define AUVIA_RPMODE_16BIT 0x20 73#define AUVIA_RPMODE_AUTOSTART 0x80 74#define AUVIA_RP_DMAOPS_BASE 0x04 75 76#define AUVIA_8233_RP_DXS_LVOL 0x02 77#define AUVIA_8233_RP_DXS_RVOL 0x03 78#define AUVIA_8233_RP_RATEFMT 0x08 79#define AUVIA_8233_RATEFMT_48K 0xfffff 80#define AUVIA_8233_RATEFMT_STEREO 0x00100000 81#define AUVIA_8233_RATEFMT_16BIT 0x00200000 82 83#define VIA_RP_DMAOPS_COUNT 0x0c 84 85#define AUVIA_8233_MP_BASE 0x40 86 /* STAT, CONTROL, DMAOPS_BASE, DMAOPS_COUNT are valid */ 87#define AUVIA_8233_OFF_MP_FORMAT 0x02 88#define AUVIA_8233_MP_FORMAT_8BIT 0x00 89#define AUVIA_8233_MP_FORMAT_16BIT 0x80 90#define AUVIA_8233_MP_FORMAT_CHANNEL_MASK 0x70 /* 1, 2, 4, 6 */ 91#define AUVIA_8233_OFF_MP_SCRATCH 0x03 92#define AUVIA_8233_OFF_MP_STOP 0x08 93 94#define AUVIA_CODEC_CTL 0x80 95#define AUVIA_CODEC_READ 0x00800000 96#define AUVIA_CODEC_BUSY 0x01000000 97#define AUVIA_CODEC_PRIVALID 0x02000000 98#define AUVIA_CODEC_INDEX(x) ((x)<<16) 99 100#define AUVIA_SGD_SHADOW 0x84 101#define AUVIA_SGD_STAT_FLAG_MASK 0x00000007 102#define AUVIA_SGD_STAT_EOL_MASK 0x00000070 103#define AUVIA_SGD_STAT_STOP_MASK 0x00000700 104#define AUVIA_SGD_STAT_ACTIVE_MASK 0x00007000 105#define AUVIA_SGD_STAT_PLAYBACK 0x00000001 106#define AUVIA_SGD_STAT_RECORD 0x00000002 107#define AUVIA_SGD_STAT_FM 0x00000004 108#define AUVIA_SGD_STAT_ALL 0x00000007 109 110#define AUVIA_8233_SGD_STAT_SDX0_MASK 0x00000008 111#define AUVIA_8233_SGD_STAT_SDX1_MASK 0x00000080 112#define AUVIA_8233_SGD_STAT_SDX2_MASK 0x00000800 113#define AUVIA_8233_SGD_STAT_SDX3_MASK 0x00008000 114#define AUVIA_8233_SGD_STAT_MP_MASK 0x00080000 115#define AUVIA_8233_SGD_STAT_REC0_MASK 0x08000000 116#define AUVIA_8233_SGD_STAT_REC1_MASK 0x80000000 117#define AUVIA_8233_SGD_STAT_FLAG 0x00000001 118#define AUVIA_8233_SGD_STAT_EOL 0x00000002 119#define AUVIA_8233_SGD_STAT_STOP 0x00000004 120#define AUVIA_8233_SGD_STAT_ACTIVE 0x00000008 121#define AUVIA_8233_SGD_STAT_FLAG_EOL 0x00000003 122 123#define AUVIA_DMAOP_EOL 0x80000000 124#define AUVIA_DMAOP_FLAG 0x40000000 125#define AUVIA_DMAOP_STOP 0x20000000 126#define AUVIA_DMAOP_COUNT(x) ((x)&0x00FFFFFF) 127 128#endif /* _DEV_PCI_AUVIAREG_H_ */ 129