1/****************************************************************************** 2 * 3 * Name: actbl1.h - Additional ACPI table definitions 4 * 5 *****************************************************************************/ 6 7/****************************************************************************** 8 * 9 * 1. Copyright Notice 10 * 11 * Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp. 12 * All rights reserved. 13 * 14 * 2. License 15 * 16 * 2.1. This is your license from Intel Corp. under its intellectual property 17 * rights. You may have additional license terms from the party that provided 18 * you this software, covering your right to use that party's intellectual 19 * property rights. 20 * 21 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a 22 * copy of the source code appearing in this file ("Covered Code") an 23 * irrevocable, perpetual, worldwide license under Intel's copyrights in the 24 * base code distributed originally by Intel ("Original Intel Code") to copy, 25 * make derivatives, distribute, use and display any portion of the Covered 26 * Code in any form, with the right to sublicense such rights; and 27 * 28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 29 * license (with the right to sublicense), under only those claims of Intel 30 * patents that are infringed by the Original Intel Code, to make, use, sell, 31 * offer to sell, and import the Covered Code and derivative works thereof 32 * solely to the minimum extent necessary to exercise the above copyright 33 * license, and in no event shall the patent license extend to any additions 34 * to or modifications of the Original Intel Code. No other license or right 35 * is granted directly or by implication, estoppel or otherwise; 36 * 37 * The above copyright and patent license is granted only if the following 38 * conditions are met: 39 * 40 * 3. Conditions 41 * 42 * 3.1. Redistribution of Source with Rights to Further Distribute Source. 43 * Redistribution of source code of any substantial portion of the Covered 44 * Code or modification with rights to further distribute source must include 45 * the above Copyright Notice, the above License, this list of Conditions, 46 * and the following Disclaimer and Export Compliance provision. In addition, 47 * Licensee must cause all Covered Code to which Licensee contributes to 48 * contain a file documenting the changes Licensee made to create that Covered 49 * Code and the date of any change. Licensee must include in that file the 50 * documentation of any changes made by any predecessor Licensee. Licensee 51 * must include a prominent statement that the modification is derived, 52 * directly or indirectly, from Original Intel Code. 53 * 54 * 3.2. Redistribution of Source with no Rights to Further Distribute Source. 55 * Redistribution of source code of any substantial portion of the Covered 56 * Code or modification without rights to further distribute source must 57 * include the following Disclaimer and Export Compliance provision in the 58 * documentation and/or other materials provided with distribution. In 59 * addition, Licensee may not authorize further sublicense of source of any 60 * portion of the Covered Code, and must include terms to the effect that the 61 * license from Licensee to its licensee is limited to the intellectual 62 * property embodied in the software Licensee provides to its licensee, and 63 * not to intellectual property embodied in modifications its licensee may 64 * make. 65 * 66 * 3.3. Redistribution of Executable. Redistribution in executable form of any 67 * substantial portion of the Covered Code or modification must reproduce the 68 * above Copyright Notice, and the following Disclaimer and Export Compliance 69 * provision in the documentation and/or other materials provided with the 70 * distribution. 71 * 72 * 3.4. Intel retains all right, title, and interest in and to the Original 73 * Intel Code. 74 * 75 * 3.5. Neither the name Intel nor any other trademark owned or controlled by 76 * Intel shall be used in advertising or otherwise to promote the sale, use or 77 * other dealings in products derived from or relating to the Covered Code 78 * without prior written authorization from Intel. 79 * 80 * 4. Disclaimer and Export Compliance 81 * 82 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED 83 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE 84 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE, 85 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY 86 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY 87 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A 88 * PARTICULAR PURPOSE. 89 * 90 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES 91 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR 92 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT, 93 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY 94 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL 95 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS 96 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY 97 * LIMITED REMEDY. 98 * 99 * 4.3. Licensee shall not export, either directly or indirectly, any of this 100 * software or system incorporating such software without first obtaining any 101 * required license or other approval from the U. S. Department of Commerce or 102 * any other agency or department of the United States Government. In the 103 * event Licensee exports any such software from the United States or 104 * re-exports any such software from a foreign destination, Licensee shall 105 * ensure that the distribution and export/re-export of the software is in 106 * compliance with all laws, regulations, orders, or other restrictions of the 107 * U.S. Export Administration Regulations. Licensee agrees that neither it nor 108 * any of its subsidiaries will export/re-export any technical data, process, 109 * software, or service, directly or indirectly, to any country for which the 110 * United States government or any agency thereof requires an export license, 111 * other governmental approval, or letter of assurance, without first obtaining 112 * such license, approval or letter. 113 * 114 ***************************************************************************** 115 * 116 * Alternatively, you may choose to be licensed under the terms of the 117 * following license: 118 * 119 * Redistribution and use in source and binary forms, with or without 120 * modification, are permitted provided that the following conditions 121 * are met: 122 * 1. Redistributions of source code must retain the above copyright 123 * notice, this list of conditions, and the following disclaimer, 124 * without modification. 125 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 126 * substantially similar to the "NO WARRANTY" disclaimer below 127 * ("Disclaimer") and any redistribution must be conditioned upon 128 * including a substantially similar Disclaimer requirement for further 129 * binary redistribution. 130 * 3. Neither the names of the above-listed copyright holders nor the names 131 * of any contributors may be used to endorse or promote products derived 132 * from this software without specific prior written permission. 133 * 134 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 135 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 136 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 137 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 138 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 139 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 140 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 141 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 142 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 143 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 144 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 145 * 146 * Alternatively, you may choose to be licensed under the terms of the 147 * GNU General Public License ("GPL") version 2 as published by the Free 148 * Software Foundation. 149 * 150 *****************************************************************************/ 151 152#ifndef __ACTBL1_H__ 153#define __ACTBL1_H__ 154 155 156/******************************************************************************* 157 * 158 * Additional ACPI Tables 159 * 160 * These tables are not consumed directly by the ACPICA subsystem, but are 161 * included here to support device drivers and the AML disassembler. 162 * 163 ******************************************************************************/ 164 165 166/* 167 * Values for description table header signatures for tables defined in this 168 * file. Useful because they make it more difficult to inadvertently type in 169 * the wrong signature. 170 */ 171#define ACPI_SIG_AEST "AEST" /* Arm Error Source Table */ 172#define ACPI_SIG_ASF "ASF!" /* Alert Standard Format table */ 173#define ACPI_SIG_ASPT "ASPT" /* AMD Secure Processor Table */ 174#define ACPI_SIG_BERT "BERT" /* Boot Error Record Table */ 175#define ACPI_SIG_BGRT "BGRT" /* Boot Graphics Resource Table */ 176#define ACPI_SIG_BOOT "BOOT" /* Simple Boot Flag Table */ 177#define ACPI_SIG_CEDT "CEDT" /* CXL Early Discovery Table */ 178#define ACPI_SIG_CPEP "CPEP" /* Corrected Platform Error Polling table */ 179#define ACPI_SIG_CSRT "CSRT" /* Core System Resource Table */ 180#define ACPI_SIG_DBG2 "DBG2" /* Debug Port table type 2 */ 181#define ACPI_SIG_DBGP "DBGP" /* Debug Port table */ 182#define ACPI_SIG_DMAR "DMAR" /* DMA Remapping table */ 183#define ACPI_SIG_DRTM "DRTM" /* Dynamic Root of Trust for Measurement table */ 184#define ACPI_SIG_ECDT "ECDT" /* Embedded Controller Boot Resources Table */ 185#define ACPI_SIG_EINJ "EINJ" /* Error Injection table */ 186#define ACPI_SIG_ERST "ERST" /* Error Record Serialization Table */ 187#define ACPI_SIG_FPDT "FPDT" /* Firmware Performance Data Table */ 188#define ACPI_SIG_GTDT "GTDT" /* Generic Timer Description Table */ 189#define ACPI_SIG_HEST "HEST" /* Hardware Error Source Table */ 190#define ACPI_SIG_HMAT "HMAT" /* Heterogeneous Memory Attributes Table */ 191#define ACPI_SIG_HPET "HPET" /* High Precision Event Timer table */ 192#define ACPI_SIG_IBFT "IBFT" /* iSCSI Boot Firmware Table */ 193#define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table*/ 194 195#define ACPI_SIG_S3PT "S3PT" /* S3 Performance (sub)Table */ 196#define ACPI_SIG_PCCS "PCC" /* PCC Shared Memory Region */ 197 198 199/* Reserved table signatures */ 200 201#define ACPI_SIG_MATR "MATR" /* Memory Address Translation Table */ 202#define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 203 204/* 205 * These tables have been seen in the field, but no definition has been found 206 */ 207#ifdef ACPI_UNDEFINED_TABLES 208#define ACPI_SIG_ATKG "ATKG" 209#define ACPI_SIG_GSCI "GSCI" /* GMCH SCI table */ 210#define ACPI_SIG_IEIT "IEIT" 211#endif 212 213/* 214 * All tables must be byte-packed to match the ACPI specification, since 215 * the tables are provided by the system BIOS. 216 */ 217#pragma pack(1) 218 219/* 220 * Note: C bitfields are not used for this reason: 221 * 222 * "Bitfields are great and easy to read, but unfortunately the C language 223 * does not specify the layout of bitfields in memory, which means they are 224 * essentially useless for dealing with packed data in on-disk formats or 225 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 226 * this decision was a design error in C. Ritchie could have picked an order 227 * and stuck with it." Norman Ramsey. 228 * See http://stackoverflow.com/a/1053662/41661 229 */ 230 231 232/******************************************************************************* 233 * 234 * Common subtable headers 235 * 236 ******************************************************************************/ 237 238/* Generic subtable header (used in MADT, SRAT, etc.) */ 239 240typedef struct acpi_subtable_header 241{ 242 UINT8 Type; 243 UINT8 Length; 244 245} ACPI_SUBTABLE_HEADER; 246 247 248/* Subtable header for WHEA tables (EINJ, ERST, WDAT) */ 249 250typedef struct acpi_whea_header 251{ 252 UINT8 Action; 253 UINT8 Instruction; 254 UINT8 Flags; 255 UINT8 Reserved; 256 ACPI_GENERIC_ADDRESS RegisterRegion; 257 UINT64 Value; /* Value used with Read/Write register */ 258 UINT64 Mask; /* Bitmask required for this register instruction */ 259 260} ACPI_WHEA_HEADER; 261 262 263/******************************************************************************* 264 * 265 * ASF - Alert Standard Format table (Signature "ASF!") 266 * Revision 0x10 267 * 268 * Conforms to the Alert Standard Format Specification V2.0, 23 April 2003 269 * 270 ******************************************************************************/ 271 272typedef struct acpi_table_asf 273{ 274 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 275 276} ACPI_TABLE_ASF; 277 278 279/* ASF subtable header */ 280 281typedef struct acpi_asf_header 282{ 283 UINT8 Type; 284 UINT8 Reserved; 285 UINT16 Length; 286 287} ACPI_ASF_HEADER; 288 289 290/* Values for Type field above */ 291 292enum AcpiAsfType 293{ 294 ACPI_ASF_TYPE_INFO = 0, 295 ACPI_ASF_TYPE_ALERT = 1, 296 ACPI_ASF_TYPE_CONTROL = 2, 297 ACPI_ASF_TYPE_BOOT = 3, 298 ACPI_ASF_TYPE_ADDRESS = 4, 299 ACPI_ASF_TYPE_RESERVED = 5 300}; 301 302/* 303 * ASF subtables 304 */ 305 306/* 0: ASF Information */ 307 308typedef struct acpi_asf_info 309{ 310 ACPI_ASF_HEADER Header; 311 UINT8 MinResetValue; 312 UINT8 MinPollInterval; 313 UINT16 SystemId; 314 UINT32 MfgId; 315 UINT8 Flags; 316 UINT8 Reserved2[3]; 317 318} ACPI_ASF_INFO; 319 320/* Masks for Flags field above */ 321 322#define ACPI_ASF_SMBUS_PROTOCOLS (1) 323 324 325/* 1: ASF Alerts */ 326 327typedef struct acpi_asf_alert 328{ 329 ACPI_ASF_HEADER Header; 330 UINT8 AssertMask; 331 UINT8 DeassertMask; 332 UINT8 Alerts; 333 UINT8 DataLength; 334 335} ACPI_ASF_ALERT; 336 337typedef struct acpi_asf_alert_data 338{ 339 UINT8 Address; 340 UINT8 Command; 341 UINT8 Mask; 342 UINT8 Value; 343 UINT8 SensorType; 344 UINT8 Type; 345 UINT8 Offset; 346 UINT8 SourceType; 347 UINT8 Severity; 348 UINT8 SensorNumber; 349 UINT8 Entity; 350 UINT8 Instance; 351 352} ACPI_ASF_ALERT_DATA; 353 354 355/* 2: ASF Remote Control */ 356 357typedef struct acpi_asf_remote 358{ 359 ACPI_ASF_HEADER Header; 360 UINT8 Controls; 361 UINT8 DataLength; 362 UINT16 Reserved2; 363 364} ACPI_ASF_REMOTE; 365 366typedef struct acpi_asf_control_data 367{ 368 UINT8 Function; 369 UINT8 Address; 370 UINT8 Command; 371 UINT8 Value; 372 373} ACPI_ASF_CONTROL_DATA; 374 375 376/* 3: ASF RMCP Boot Options */ 377 378typedef struct acpi_asf_rmcp 379{ 380 ACPI_ASF_HEADER Header; 381 UINT8 Capabilities[7]; 382 UINT8 CompletionCode; 383 UINT32 EnterpriseId; 384 UINT8 Command; 385 UINT16 Parameter; 386 UINT16 BootOptions; 387 UINT16 OemParameters; 388 389} ACPI_ASF_RMCP; 390 391 392/* 4: ASF Address */ 393 394typedef struct acpi_asf_address 395{ 396 ACPI_ASF_HEADER Header; 397 UINT8 EpromAddress; 398 UINT8 Devices; 399 400} ACPI_ASF_ADDRESS; 401 402/******************************************************************************* 403 * 404 * ASPT - AMD Secure Processor Table (Signature "ASPT") 405 * Revision 0x1 406 * 407 * Conforms to AMD Socket SP5/SP6 Platform ASPT Rev1 Specification, 408 * 12 September 2022 409 * 410 ******************************************************************************/ 411 412typedef struct acpi_table_aspt 413{ 414 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 415 UINT32 NumEntries; 416 417} ACPI_TABLE_ASPT; 418 419 420/* ASPT subtable header */ 421 422typedef struct acpi_aspt_header 423{ 424 UINT16 Type; 425 UINT16 Length; 426 427} ACPI_ASPT_HEADER; 428 429 430/* Values for Type field above */ 431 432enum AcpiAsptType 433{ 434 ACPI_ASPT_TYPE_GLOBAL_REGS = 0, 435 ACPI_ASPT_TYPE_SEV_MBOX_REGS = 1, 436 ACPI_ASPT_TYPE_ACPI_MBOX_REGS = 2, 437 ACPI_ASPT_TYPE_UNKNOWN = 3, 438}; 439 440/* 441 * ASPT subtables 442 */ 443 444/* 0: ASPT Global Registers */ 445 446typedef struct acpi_aspt_global_regs 447{ 448 ACPI_ASPT_HEADER Header; 449 UINT32 Reserved; 450 UINT64 FeatureRegAddr; 451 UINT64 IrqEnRegAddr; 452 UINT64 IrqStRegAddr; 453 454} ACPI_ASPT_GLOBAL_REGS; 455 456 457/* 1: ASPT SEV Mailbox Registers */ 458 459typedef struct acpi_aspt_sev_mbox_regs 460{ 461 ACPI_ASPT_HEADER Header; 462 UINT8 MboxIrqId; 463 UINT8 Reserved[3]; 464 UINT64 CmdRespRegAddr; 465 UINT64 CmdBufLoRegAddr; 466 UINT64 CmdBufHiRegAddr; 467 468} ACPI_ASPT_SEV_MBOX_REGS; 469 470 471/* 2: ASPT ACPI Mailbox Registers */ 472 473typedef struct acpi_aspt_acpi_mbox_regs 474{ 475 ACPI_ASPT_HEADER Header; 476 UINT32 Reserved1; 477 UINT64 CmdRespRegAddr; 478 UINT64 Reserved2[2]; 479 480} ACPI_ASPT_ACPI_MBOX_REGS; 481 482 483/******************************************************************************* 484 * 485 * BERT - Boot Error Record Table (ACPI 4.0) 486 * Version 1 487 * 488 ******************************************************************************/ 489 490typedef struct acpi_table_bert 491{ 492 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 493 UINT32 RegionLength; /* Length of the boot error region */ 494 UINT64 Address; /* Physical address of the error region */ 495 496} ACPI_TABLE_BERT; 497 498 499/* Boot Error Region (not a subtable, pointed to by Address field above) */ 500 501typedef struct acpi_bert_region 502{ 503 UINT32 BlockStatus; /* Type of error information */ 504 UINT32 RawDataOffset; /* Offset to raw error data */ 505 UINT32 RawDataLength; /* Length of raw error data */ 506 UINT32 DataLength; /* Length of generic error data */ 507 UINT32 ErrorSeverity; /* Severity code */ 508 509} ACPI_BERT_REGION; 510 511/* Values for BlockStatus flags above */ 512 513#define ACPI_BERT_UNCORRECTABLE (1) 514#define ACPI_BERT_CORRECTABLE (1<<1) 515#define ACPI_BERT_MULTIPLE_UNCORRECTABLE (1<<2) 516#define ACPI_BERT_MULTIPLE_CORRECTABLE (1<<3) 517#define ACPI_BERT_ERROR_ENTRY_COUNT (0xFF<<4) /* 8 bits, error count */ 518 519/* Values for ErrorSeverity above */ 520 521enum AcpiBertErrorSeverity 522{ 523 ACPI_BERT_ERROR_CORRECTABLE = 0, 524 ACPI_BERT_ERROR_FATAL = 1, 525 ACPI_BERT_ERROR_CORRECTED = 2, 526 ACPI_BERT_ERROR_NONE = 3, 527 ACPI_BERT_ERROR_RESERVED = 4 /* 4 and greater are reserved */ 528}; 529 530/* 531 * Note: The generic error data that follows the ErrorSeverity field above 532 * uses the ACPI_HEST_GENERIC_DATA defined under the HEST table below 533 */ 534 535 536/******************************************************************************* 537 * 538 * BGRT - Boot Graphics Resource Table (ACPI 5.0) 539 * Version 1 540 * 541 ******************************************************************************/ 542 543typedef struct acpi_table_bgrt 544{ 545 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 546 UINT16 Version; 547 UINT8 Status; 548 UINT8 ImageType; 549 UINT64 ImageAddress; 550 UINT32 ImageOffsetX; 551 UINT32 ImageOffsetY; 552 553} ACPI_TABLE_BGRT; 554 555/* Flags for Status field above */ 556 557#define ACPI_BGRT_DISPLAYED (1) 558#define ACPI_BGRT_ORIENTATION_OFFSET (3 << 1) 559 560 561/******************************************************************************* 562 * 563 * BOOT - Simple Boot Flag Table 564 * Version 1 565 * 566 * Conforms to the "Simple Boot Flag Specification", Version 2.1 567 * 568 ******************************************************************************/ 569 570typedef struct acpi_table_boot 571{ 572 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 573 UINT8 CmosIndex; /* Index in CMOS RAM for the boot register */ 574 UINT8 Reserved[3]; 575 576} ACPI_TABLE_BOOT; 577 578 579/******************************************************************************* 580 * 581 * CDAT - Coherent Device Attribute Table 582 * Version 1 583 * 584 * Conforms to the "Coherent Device Attribute Table (CDAT) Specification 585 " (Revision 1.01, October 2020.) 586 * 587 ******************************************************************************/ 588 589typedef struct acpi_table_cdat 590{ 591 UINT32 Length; /* Length of table in bytes, including this header */ 592 UINT8 Revision; /* ACPI Specification minor version number */ 593 UINT8 Checksum; /* To make sum of entire table == 0 */ 594 UINT8 Reserved[6]; 595 UINT32 Sequence; /* Used to detect runtime CDAT table changes */ 596 597} ACPI_TABLE_CDAT; 598 599 600/* CDAT common subtable header */ 601 602typedef struct acpi_cdat_header 603{ 604 UINT8 Type; 605 UINT8 Reserved; 606 UINT16 Length; 607 608} ACPI_CDAT_HEADER; 609 610/* Values for Type field above */ 611 612enum AcpiCdatType 613{ 614 ACPI_CDAT_TYPE_DSMAS = 0, 615 ACPI_CDAT_TYPE_DSLBIS = 1, 616 ACPI_CDAT_TYPE_DSMSCIS = 2, 617 ACPI_CDAT_TYPE_DSIS = 3, 618 ACPI_CDAT_TYPE_DSEMTS = 4, 619 ACPI_CDAT_TYPE_SSLBIS = 5, 620 ACPI_CDAT_TYPE_RESERVED = 6 /* 6 through 0xFF are reserved */ 621}; 622 623 624/* Subtable 0: Device Scoped Memory Affinity Structure (DSMAS) */ 625 626typedef struct acpi_cdat_dsmas 627{ 628 UINT8 DsmadHandle; 629 UINT8 Flags; 630 UINT16 Reserved; 631 UINT64 DpaBaseAddress; 632 UINT64 DpaLength; 633 634} ACPI_CDAT_DSMAS; 635 636/* Flags for subtable above */ 637 638#define ACPI_CDAT_DSMAS_NON_VOLATILE (1 << 2) 639 640 641/* Subtable 1: Device scoped Latency and Bandwidth Information Structure (DSLBIS) */ 642 643typedef struct acpi_cdat_dslbis 644{ 645 UINT8 Handle; 646 UINT8 Flags; /* If Handle matches a DSMAS handle, the definition of this field matches 647 * Flags field in HMAT System Locality Latency */ 648 UINT8 DataType; 649 UINT8 Reserved; 650 UINT64 EntryBaseUnit; 651 UINT16 Entry[3]; 652 UINT16 Reserved2; 653 654} ACPI_CDAT_DSLBIS; 655 656 657/* Subtable 2: Device Scoped Memory Side Cache Information Structure (DSMSCIS) */ 658 659typedef struct acpi_cdat_dsmscis 660{ 661 UINT8 DsmasHandle; 662 UINT8 Reserved[3]; 663 UINT64 SideCacheSize; 664 UINT32 CacheAttributes; 665 666} ACPI_CDAT_DSMSCIS; 667 668 669/* Subtable 3: Device Scoped Initiator Structure (DSIS) */ 670 671typedef struct acpi_cdat_dsis 672{ 673 UINT8 Flags; 674 UINT8 Handle; 675 UINT16 Reserved; 676 677} ACPI_CDAT_DSIS; 678 679/* Flags for above subtable */ 680 681#define ACPI_CDAT_DSIS_MEM_ATTACHED (1 << 0) 682 683 684/* Subtable 4: Device Scoped EFI Memory Type Structure (DSEMTS) */ 685 686typedef struct acpi_cdat_dsemts 687{ 688 UINT8 DsmasHandle; 689 UINT8 MemoryType; 690 UINT16 Reserved; 691 UINT64 DpaOffset; 692 UINT64 RangeLength; 693 694} ACPI_CDAT_DSEMTS; 695 696 697/* Subtable 5: Switch Scoped Latency and Bandwidth Information Structure (SSLBIS) */ 698 699typedef struct acpi_cdat_sslbis 700{ 701 UINT8 DataType; 702 UINT8 Reserved[3]; 703 UINT64 EntryBaseUnit; 704 705} ACPI_CDAT_SSLBIS; 706 707 708/* Sub-subtable for above, SslbeEntries field */ 709 710typedef struct acpi_cdat_sslbe 711{ 712 UINT16 PortxId; 713 UINT16 PortyId; 714 UINT16 LatencyOrBandwidth; 715 UINT16 Reserved; 716 717} ACPI_CDAT_SSLBE; 718 719 720/******************************************************************************* 721 * 722 * CEDT - CXL Early Discovery Table 723 * Version 1 724 * 725 * Conforms to the "CXL Early Discovery Table" (CXL 2.0, October 2020) 726 * 727 ******************************************************************************/ 728 729typedef struct acpi_table_cedt 730{ 731 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 732 733} ACPI_TABLE_CEDT; 734 735/* CEDT subtable header (Performance Record Structure) */ 736 737typedef struct acpi_cedt_header 738{ 739 UINT8 Type; 740 UINT8 Reserved; 741 UINT16 Length; 742 743} ACPI_CEDT_HEADER; 744 745/* Values for Type field above */ 746 747enum AcpiCedtType 748{ 749 ACPI_CEDT_TYPE_CHBS = 0, 750 ACPI_CEDT_TYPE_CFMWS = 1, 751 ACPI_CEDT_TYPE_CXIMS = 2, 752 ACPI_CEDT_TYPE_RDPAS = 3, 753 ACPI_CEDT_TYPE_RESERVED = 4, 754}; 755 756/* Values for version field above */ 757 758#define ACPI_CEDT_CHBS_VERSION_CXL11 (0) 759#define ACPI_CEDT_CHBS_VERSION_CXL20 (1) 760 761/* Values for length field above */ 762 763#define ACPI_CEDT_CHBS_LENGTH_CXL11 (0x2000) 764#define ACPI_CEDT_CHBS_LENGTH_CXL20 (0x10000) 765 766/* 767 * CEDT subtables 768 */ 769 770/* 0: CXL Host Bridge Structure */ 771 772typedef struct acpi_cedt_chbs 773{ 774 ACPI_CEDT_HEADER Header; 775 UINT32 Uid; 776 UINT32 CxlVersion; 777 UINT32 Reserved; 778 UINT64 Base; 779 UINT64 Length; 780 781} ACPI_CEDT_CHBS; 782 783 784/* 1: CXL Fixed Memory Window Structure */ 785 786typedef struct acpi_cedt_cfmws 787{ 788 ACPI_CEDT_HEADER Header; 789 UINT32 Reserved1; 790 UINT64 BaseHpa; 791 UINT64 WindowSize; 792 UINT8 InterleaveWays; 793 UINT8 InterleaveArithmetic; 794 UINT16 Reserved2; 795 UINT32 Granularity; 796 UINT16 Restrictions; 797 UINT16 QtgId; 798 UINT32 InterleaveTargets[]; 799 800} ACPI_CEDT_CFMWS; 801 802typedef struct acpi_cedt_cfmws_target_element 803{ 804 UINT32 InterleaveTarget; 805 806} ACPI_CEDT_CFMWS_TARGET_ELEMENT; 807 808/* Values for Interleave Arithmetic field above */ 809 810#define ACPI_CEDT_CFMWS_ARITHMETIC_MODULO (0) 811#define ACPI_CEDT_CFMWS_ARITHMETIC_XOR (1) 812 813/* Values for Restrictions field above */ 814 815#define ACPI_CEDT_CFMWS_RESTRICT_TYPE2 (1) 816#define ACPI_CEDT_CFMWS_RESTRICT_TYPE3 (1<<1) 817#define ACPI_CEDT_CFMWS_RESTRICT_VOLATILE (1<<2) 818#define ACPI_CEDT_CFMWS_RESTRICT_PMEM (1<<3) 819#define ACPI_CEDT_CFMWS_RESTRICT_FIXED (1<<4) 820 821/* 2: CXL XOR Interleave Math Structure */ 822 823struct acpi_cedt_cxims { 824 ACPI_CEDT_HEADER Header; 825 UINT16 Reserved1; 826 UINT8 Hbig; 827 UINT8 NrXormaps; 828 UINT64 XormapList[]; 829}; 830 831/* 3: CXL RCEC Downstream Port Association Structure */ 832 833struct acpi_cedt_rdpas { 834 ACPI_CEDT_HEADER Header; 835 UINT8 Reserved1; 836 UINT16 Length; 837 UINT16 Segment; 838 UINT16 Bdf; 839 UINT8 Protocol; 840 UINT64 Address; 841}; 842 843/* Masks for bdf field above */ 844#define ACPI_CEDT_RDPAS_BUS_MASK 0xff00 845#define ACPI_CEDT_RDPAS_DEVICE_MASK 0x00f8 846#define ACPI_CEDT_RDPAS_FUNCTION_MASK 0x0007 847 848#define ACPI_CEDT_RDPAS_PROTOCOL_IO (0) 849#define ACPI_CEDT_RDPAS_PROTOCOL_CACHEMEM (1) 850 851/******************************************************************************* 852 * 853 * CPEP - Corrected Platform Error Polling table (ACPI 4.0) 854 * Version 1 855 * 856 ******************************************************************************/ 857 858typedef struct acpi_table_cpep 859{ 860 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 861 UINT64 Reserved; 862 863} ACPI_TABLE_CPEP; 864 865 866/* Subtable */ 867 868typedef struct acpi_cpep_polling 869{ 870 ACPI_SUBTABLE_HEADER Header; 871 UINT8 Id; /* Processor ID */ 872 UINT8 Eid; /* Processor EID */ 873 UINT32 Interval; /* Polling interval (msec) */ 874 875} ACPI_CPEP_POLLING; 876 877 878/******************************************************************************* 879 * 880 * CSRT - Core System Resource Table 881 * Version 0 882 * 883 * Conforms to the "Core System Resource Table (CSRT)", November 14, 2011 884 * 885 ******************************************************************************/ 886 887typedef struct acpi_table_csrt 888{ 889 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 890 891} ACPI_TABLE_CSRT; 892 893 894/* Resource Group subtable */ 895 896typedef struct acpi_csrt_group 897{ 898 UINT32 Length; 899 UINT32 VendorId; 900 UINT32 SubvendorId; 901 UINT16 DeviceId; 902 UINT16 SubdeviceId; 903 UINT16 Revision; 904 UINT16 Reserved; 905 UINT32 SharedInfoLength; 906 907 /* Shared data immediately follows (Length = SharedInfoLength) */ 908 909} ACPI_CSRT_GROUP; 910 911/* Shared Info subtable */ 912 913typedef struct acpi_csrt_shared_info 914{ 915 UINT16 MajorVersion; 916 UINT16 MinorVersion; 917 UINT32 MmioBaseLow; 918 UINT32 MmioBaseHigh; 919 UINT32 GsiInterrupt; 920 UINT8 InterruptPolarity; 921 UINT8 InterruptMode; 922 UINT8 NumChannels; 923 UINT8 DmaAddressWidth; 924 UINT16 BaseRequestLine; 925 UINT16 NumHandshakeSignals; 926 UINT32 MaxBlockSize; 927 928 /* Resource descriptors immediately follow (Length = Group Length - SharedInfoLength) */ 929 930} ACPI_CSRT_SHARED_INFO; 931 932/* Resource Descriptor subtable */ 933 934typedef struct acpi_csrt_descriptor 935{ 936 UINT32 Length; 937 UINT16 Type; 938 UINT16 Subtype; 939 UINT32 Uid; 940 941 /* Resource-specific information immediately follows */ 942 943} ACPI_CSRT_DESCRIPTOR; 944 945 946/* Resource Types */ 947 948#define ACPI_CSRT_TYPE_INTERRUPT 0x0001 949#define ACPI_CSRT_TYPE_TIMER 0x0002 950#define ACPI_CSRT_TYPE_DMA 0x0003 951 952/* Resource Subtypes */ 953 954#define ACPI_CSRT_XRUPT_LINE 0x0000 955#define ACPI_CSRT_XRUPT_CONTROLLER 0x0001 956#define ACPI_CSRT_TIMER 0x0000 957#define ACPI_CSRT_DMA_CHANNEL 0x0000 958#define ACPI_CSRT_DMA_CONTROLLER 0x0001 959 960 961/******************************************************************************* 962 * 963 * DBG2 - Debug Port Table 2 964 * Version 0 (Both main table and subtables) 965 * 966 * Conforms to "Microsoft Debug Port Table 2 (DBG2)", September 21, 2020 967 * 968 ******************************************************************************/ 969 970typedef struct acpi_table_dbg2 971{ 972 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 973 UINT32 InfoOffset; 974 UINT32 InfoCount; 975 976} ACPI_TABLE_DBG2; 977 978 979typedef struct acpi_dbg2_header 980{ 981 UINT32 InfoOffset; 982 UINT32 InfoCount; 983 984} ACPI_DBG2_HEADER; 985 986 987/* Debug Device Information Subtable */ 988 989typedef struct acpi_dbg2_device 990{ 991 UINT8 Revision; 992 UINT16 Length; 993 UINT8 RegisterCount; /* Number of BaseAddress registers */ 994 UINT16 NamepathLength; 995 UINT16 NamepathOffset; 996 UINT16 OemDataLength; 997 UINT16 OemDataOffset; 998 UINT16 PortType; 999 UINT16 PortSubtype; 1000 UINT16 Reserved; 1001 UINT16 BaseAddressOffset; 1002 UINT16 AddressSizeOffset; 1003 /* 1004 * Data that follows: 1005 * BaseAddress (required) - Each in 12-byte Generic Address Structure format. 1006 * AddressSize (required) - Array of UINT32 sizes corresponding to each BaseAddress register. 1007 * Namepath (required) - Null terminated string. Single dot if not supported. 1008 * OemData (optional) - Length is OemDataLength. 1009 */ 1010} ACPI_DBG2_DEVICE; 1011 1012/* Types for PortType field above */ 1013 1014#define ACPI_DBG2_SERIAL_PORT 0x8000 1015#define ACPI_DBG2_1394_PORT 0x8001 1016#define ACPI_DBG2_USB_PORT 0x8002 1017#define ACPI_DBG2_NET_PORT 0x8003 1018 1019/* Subtypes for PortSubtype field above */ 1020 1021#define ACPI_DBG2_16550_COMPATIBLE 0x0000 1022#define ACPI_DBG2_16550_SUBSET 0x0001 1023#define ACPI_DBG2_MAX311XE_SPI 0x0002 1024#define ACPI_DBG2_ARM_PL011 0x0003 1025#define ACPI_DBG2_MSM8X60 0x0004 1026#define ACPI_DBG2_16550_NVIDIA 0x0005 1027#define ACPI_DBG2_TI_OMAP 0x0006 1028#define ACPI_DBG2_APM88XXXX 0x0008 1029#define ACPI_DBG2_MSM8974 0x0009 1030#define ACPI_DBG2_SAM5250 0x000A 1031#define ACPI_DBG2_INTEL_USIF 0x000B 1032#define ACPI_DBG2_IMX6 0x000C 1033#define ACPI_DBG2_ARM_SBSA_32BIT 0x000D 1034#define ACPI_DBG2_ARM_SBSA_GENERIC 0x000E 1035#define ACPI_DBG2_ARM_DCC 0x000F 1036#define ACPI_DBG2_BCM2835 0x0010 1037#define ACPI_DBG2_SDM845_1_8432MHZ 0x0011 1038#define ACPI_DBG2_16550_WITH_GAS 0x0012 1039#define ACPI_DBG2_SDM845_7_372MHZ 0x0013 1040#define ACPI_DBG2_INTEL_LPSS 0x0014 1041 1042#define ACPI_DBG2_1394_STANDARD 0x0000 1043 1044#define ACPI_DBG2_USB_XHCI 0x0000 1045#define ACPI_DBG2_USB_EHCI 0x0001 1046 1047 1048/******************************************************************************* 1049 * 1050 * DBGP - Debug Port table 1051 * Version 1 1052 * 1053 * Conforms to the "Debug Port Specification", Version 1.00, 2/9/2000 1054 * 1055 ******************************************************************************/ 1056 1057typedef struct acpi_table_dbgp 1058{ 1059 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1060 UINT8 Type; /* 0=full 16550, 1=subset of 16550 */ 1061 UINT8 Reserved[3]; 1062 ACPI_GENERIC_ADDRESS DebugPort; 1063 1064} ACPI_TABLE_DBGP; 1065 1066 1067/******************************************************************************* 1068 * 1069 * DMAR - DMA Remapping table 1070 * Version 1 1071 * 1072 * Conforms to "Intel Virtualization Technology for Directed I/O", 1073 * Version 2.3, October 2014 1074 * 1075 ******************************************************************************/ 1076 1077typedef struct acpi_table_dmar 1078{ 1079 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1080 UINT8 Width; /* Host Address Width */ 1081 UINT8 Flags; 1082 UINT8 Reserved[10]; 1083 1084} ACPI_TABLE_DMAR; 1085 1086/* Masks for Flags field above */ 1087 1088#define ACPI_DMAR_INTR_REMAP (1) 1089#define ACPI_DMAR_X2APIC_OPT_OUT (1<<1) 1090#define ACPI_DMAR_X2APIC_MODE (1<<2) 1091 1092 1093/* DMAR subtable header */ 1094 1095typedef struct acpi_dmar_header 1096{ 1097 UINT16 Type; 1098 UINT16 Length; 1099 1100} ACPI_DMAR_HEADER; 1101 1102/* Values for subtable type in ACPI_DMAR_HEADER */ 1103 1104enum AcpiDmarType 1105{ 1106 ACPI_DMAR_TYPE_HARDWARE_UNIT = 0, 1107 ACPI_DMAR_TYPE_RESERVED_MEMORY = 1, 1108 ACPI_DMAR_TYPE_ROOT_ATS = 2, 1109 ACPI_DMAR_TYPE_HARDWARE_AFFINITY = 3, 1110 ACPI_DMAR_TYPE_NAMESPACE = 4, 1111 ACPI_DMAR_TYPE_SATC = 5, 1112 ACPI_DMAR_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 1113}; 1114 1115 1116/* DMAR Device Scope structure */ 1117 1118typedef struct acpi_dmar_device_scope 1119{ 1120 UINT8 EntryType; 1121 UINT8 Length; 1122 UINT16 Reserved; 1123 UINT8 EnumerationId; 1124 UINT8 Bus; 1125 1126} ACPI_DMAR_DEVICE_SCOPE; 1127 1128/* Values for EntryType in ACPI_DMAR_DEVICE_SCOPE - device types */ 1129 1130enum AcpiDmarScopeType 1131{ 1132 ACPI_DMAR_SCOPE_TYPE_NOT_USED = 0, 1133 ACPI_DMAR_SCOPE_TYPE_ENDPOINT = 1, 1134 ACPI_DMAR_SCOPE_TYPE_BRIDGE = 2, 1135 ACPI_DMAR_SCOPE_TYPE_IOAPIC = 3, 1136 ACPI_DMAR_SCOPE_TYPE_HPET = 4, 1137 ACPI_DMAR_SCOPE_TYPE_NAMESPACE = 5, 1138 ACPI_DMAR_SCOPE_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 1139}; 1140 1141typedef struct acpi_dmar_pci_path 1142{ 1143 UINT8 Device; 1144 UINT8 Function; 1145 1146} ACPI_DMAR_PCI_PATH; 1147 1148 1149/* 1150 * DMAR Subtables, correspond to Type in ACPI_DMAR_HEADER 1151 */ 1152 1153/* 0: Hardware Unit Definition */ 1154 1155typedef struct acpi_dmar_hardware_unit 1156{ 1157 ACPI_DMAR_HEADER Header; 1158 UINT8 Flags; 1159 UINT8 Reserved; 1160 UINT16 Segment; 1161 UINT64 Address; /* Register Base Address */ 1162 1163} ACPI_DMAR_HARDWARE_UNIT; 1164 1165/* Masks for Flags field above */ 1166 1167#define ACPI_DMAR_INCLUDE_ALL (1) 1168 1169 1170/* 1: Reserved Memory Definition */ 1171 1172typedef struct acpi_dmar_reserved_memory 1173{ 1174 ACPI_DMAR_HEADER Header; 1175 UINT16 Reserved; 1176 UINT16 Segment; 1177 UINT64 BaseAddress; /* 4K aligned base address */ 1178 UINT64 EndAddress; /* 4K aligned limit address */ 1179 1180} ACPI_DMAR_RESERVED_MEMORY; 1181 1182/* Masks for Flags field above */ 1183 1184#define ACPI_DMAR_ALLOW_ALL (1) 1185 1186 1187/* 2: Root Port ATS Capability Reporting Structure */ 1188 1189typedef struct acpi_dmar_atsr 1190{ 1191 ACPI_DMAR_HEADER Header; 1192 UINT8 Flags; 1193 UINT8 Reserved; 1194 UINT16 Segment; 1195 1196} ACPI_DMAR_ATSR; 1197 1198/* Masks for Flags field above */ 1199 1200#define ACPI_DMAR_ALL_PORTS (1) 1201 1202 1203/* 3: Remapping Hardware Static Affinity Structure */ 1204 1205typedef struct acpi_dmar_rhsa 1206{ 1207 ACPI_DMAR_HEADER Header; 1208 UINT32 Reserved; 1209 UINT64 BaseAddress; 1210 UINT32 ProximityDomain; 1211 1212} ACPI_DMAR_RHSA; 1213 1214 1215/* 4: ACPI Namespace Device Declaration Structure */ 1216 1217typedef struct acpi_dmar_andd 1218{ 1219 ACPI_DMAR_HEADER Header; 1220 UINT8 Reserved[3]; 1221 UINT8 DeviceNumber; 1222 union { 1223 char __pad; 1224 ACPI_FLEX_ARRAY(char, DeviceName); 1225 }; 1226 1227} ACPI_DMAR_ANDD; 1228 1229 1230/* 5: SoC Integrated Address Translation Cache (SATC) */ 1231 1232typedef struct acpi_dmar_satc 1233{ 1234 ACPI_DMAR_HEADER Header; 1235 UINT8 Flags; 1236 UINT8 Reserved; 1237 UINT16 Segment; 1238 1239} ACPI_DMAR_SATC 1240 1241; 1242/******************************************************************************* 1243 * 1244 * DRTM - Dynamic Root of Trust for Measurement table 1245 * Conforms to "TCG D-RTM Architecture" June 17 2013, Version 1.0.0 1246 * Table version 1 1247 * 1248 ******************************************************************************/ 1249 1250typedef struct acpi_table_drtm 1251{ 1252 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1253 UINT64 EntryBaseAddress; 1254 UINT64 EntryLength; 1255 UINT32 EntryAddress32; 1256 UINT64 EntryAddress64; 1257 UINT64 ExitAddress; 1258 UINT64 LogAreaAddress; 1259 UINT32 LogAreaLength; 1260 UINT64 ArchDependentAddress; 1261 UINT32 Flags; 1262 1263} ACPI_TABLE_DRTM; 1264 1265/* Flag Definitions for above */ 1266 1267#define ACPI_DRTM_ACCESS_ALLOWED (1) 1268#define ACPI_DRTM_ENABLE_GAP_CODE (1<<1) 1269#define ACPI_DRTM_INCOMPLETE_MEASUREMENTS (1<<2) 1270#define ACPI_DRTM_AUTHORITY_ORDER (1<<3) 1271 1272 1273/* 1) Validated Tables List (64-bit addresses) */ 1274 1275typedef struct acpi_drtm_vtable_list 1276{ 1277 UINT32 ValidatedTableCount; 1278 UINT64 ValidatedTables[]; 1279 1280} ACPI_DRTM_VTABLE_LIST; 1281 1282/* 2) Resources List (of Resource Descriptors) */ 1283 1284/* Resource Descriptor */ 1285 1286typedef struct acpi_drtm_resource 1287{ 1288 UINT8 Size[7]; 1289 UINT8 Type; 1290 UINT64 Address; 1291 1292} ACPI_DRTM_RESOURCE; 1293 1294typedef struct acpi_drtm_resource_list 1295{ 1296 UINT32 ResourceCount; 1297 ACPI_DRTM_RESOURCE Resources[]; 1298 1299} ACPI_DRTM_RESOURCE_LIST; 1300 1301/* 3) Platform-specific Identifiers List */ 1302 1303typedef struct acpi_drtm_dps_id 1304{ 1305 UINT32 DpsIdLength; 1306 UINT8 DpsId[16]; 1307 1308} ACPI_DRTM_DPS_ID; 1309 1310 1311/******************************************************************************* 1312 * 1313 * ECDT - Embedded Controller Boot Resources Table 1314 * Version 1 1315 * 1316 ******************************************************************************/ 1317 1318typedef struct acpi_table_ecdt 1319{ 1320 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1321 ACPI_GENERIC_ADDRESS Control; /* Address of EC command/status register */ 1322 ACPI_GENERIC_ADDRESS Data; /* Address of EC data register */ 1323 UINT32 Uid; /* Unique ID - must be same as the EC _UID method */ 1324 UINT8 Gpe; /* The GPE for the EC */ 1325 UINT8 Id[]; /* Full namepath of the EC in the ACPI namespace */ 1326 1327} ACPI_TABLE_ECDT; 1328 1329 1330/******************************************************************************* 1331 * 1332 * EINJ - Error Injection Table (ACPI 4.0) 1333 * Version 1 1334 * 1335 ******************************************************************************/ 1336 1337typedef struct acpi_table_einj 1338{ 1339 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1340 UINT32 HeaderLength; 1341 UINT8 Flags; 1342 UINT8 Reserved[3]; 1343 UINT32 Entries; 1344 1345} ACPI_TABLE_EINJ; 1346 1347 1348/* EINJ Injection Instruction Entries (actions) */ 1349 1350typedef struct acpi_einj_entry 1351{ 1352 ACPI_WHEA_HEADER WheaHeader; /* Common header for WHEA tables */ 1353 1354} ACPI_EINJ_ENTRY; 1355 1356/* Masks for Flags field above */ 1357 1358#define ACPI_EINJ_PRESERVE (1) 1359 1360/* Values for Action field above */ 1361 1362enum AcpiEinjActions 1363{ 1364 ACPI_EINJ_BEGIN_OPERATION = 0, 1365 ACPI_EINJ_GET_TRIGGER_TABLE = 1, 1366 ACPI_EINJ_SET_ERROR_TYPE = 2, 1367 ACPI_EINJ_GET_ERROR_TYPE = 3, 1368 ACPI_EINJ_END_OPERATION = 4, 1369 ACPI_EINJ_EXECUTE_OPERATION = 5, 1370 ACPI_EINJ_CHECK_BUSY_STATUS = 6, 1371 ACPI_EINJ_GET_COMMAND_STATUS = 7, 1372 ACPI_EINJ_SET_ERROR_TYPE_WITH_ADDRESS = 8, 1373 ACPI_EINJ_GET_EXECUTE_TIMINGS = 9, 1374 ACPI_EINJ_ACTION_RESERVED = 10, /* 10 and greater are reserved */ 1375 ACPI_EINJ_TRIGGER_ERROR = 0xFF /* Except for this value */ 1376}; 1377 1378/* Values for Instruction field above */ 1379 1380enum AcpiEinjInstructions 1381{ 1382 ACPI_EINJ_READ_REGISTER = 0, 1383 ACPI_EINJ_READ_REGISTER_VALUE = 1, 1384 ACPI_EINJ_WRITE_REGISTER = 2, 1385 ACPI_EINJ_WRITE_REGISTER_VALUE = 3, 1386 ACPI_EINJ_NOOP = 4, 1387 ACPI_EINJ_FLUSH_CACHELINE = 5, 1388 ACPI_EINJ_INSTRUCTION_RESERVED = 6 /* 6 and greater are reserved */ 1389}; 1390 1391typedef struct acpi_einj_error_type_with_addr 1392{ 1393 UINT32 ErrorType; 1394 UINT32 VendorStructOffset; 1395 UINT32 Flags; 1396 UINT32 ApicId; 1397 UINT64 Address; 1398 UINT64 Range; 1399 UINT32 PcieId; 1400 1401} ACPI_EINJ_ERROR_TYPE_WITH_ADDR; 1402 1403typedef struct acpi_einj_vendor 1404{ 1405 UINT32 Length; 1406 UINT32 PcieId; 1407 UINT16 VendorId; 1408 UINT16 DeviceId; 1409 UINT8 RevisionId; 1410 UINT8 Reserved[3]; 1411 1412} ACPI_EINJ_VENDOR; 1413 1414 1415/* EINJ Trigger Error Action Table */ 1416 1417typedef struct acpi_einj_trigger 1418{ 1419 UINT32 HeaderSize; 1420 UINT32 Revision; 1421 UINT32 TableSize; 1422 UINT32 EntryCount; 1423 1424} ACPI_EINJ_TRIGGER; 1425 1426/* Command status return values */ 1427 1428enum AcpiEinjCommandStatus 1429{ 1430 ACPI_EINJ_SUCCESS = 0, 1431 ACPI_EINJ_FAILURE = 1, 1432 ACPI_EINJ_INVALID_ACCESS = 2, 1433 ACPI_EINJ_STATUS_RESERVED = 3 /* 3 and greater are reserved */ 1434}; 1435 1436 1437/* Error types returned from ACPI_EINJ_GET_ERROR_TYPE (bitfield) */ 1438 1439#define ACPI_EINJ_PROCESSOR_CORRECTABLE (1) 1440#define ACPI_EINJ_PROCESSOR_UNCORRECTABLE (1<<1) 1441#define ACPI_EINJ_PROCESSOR_FATAL (1<<2) 1442#define ACPI_EINJ_MEMORY_CORRECTABLE (1<<3) 1443#define ACPI_EINJ_MEMORY_UNCORRECTABLE (1<<4) 1444#define ACPI_EINJ_MEMORY_FATAL (1<<5) 1445#define ACPI_EINJ_PCIX_CORRECTABLE (1<<6) 1446#define ACPI_EINJ_PCIX_UNCORRECTABLE (1<<7) 1447#define ACPI_EINJ_PCIX_FATAL (1<<8) 1448#define ACPI_EINJ_PLATFORM_CORRECTABLE (1<<9) 1449#define ACPI_EINJ_PLATFORM_UNCORRECTABLE (1<<10) 1450#define ACPI_EINJ_PLATFORM_FATAL (1<<11) 1451#define ACPI_EINJ_VENDOR_DEFINED (1<<31) 1452 1453 1454/******************************************************************************* 1455 * 1456 * ERST - Error Record Serialization Table (ACPI 4.0) 1457 * Version 1 1458 * 1459 ******************************************************************************/ 1460 1461typedef struct acpi_table_erst 1462{ 1463 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1464 UINT32 HeaderLength; 1465 UINT32 Reserved; 1466 UINT32 Entries; 1467 1468} ACPI_TABLE_ERST; 1469 1470 1471/* ERST Serialization Entries (actions) */ 1472 1473typedef struct acpi_erst_entry 1474{ 1475 ACPI_WHEA_HEADER WheaHeader; /* Common header for WHEA tables */ 1476 1477} ACPI_ERST_ENTRY; 1478 1479/* Masks for Flags field above */ 1480 1481#define ACPI_ERST_PRESERVE (1) 1482 1483/* Values for Action field above */ 1484 1485enum AcpiErstActions 1486{ 1487 ACPI_ERST_BEGIN_WRITE = 0, 1488 ACPI_ERST_BEGIN_READ = 1, 1489 ACPI_ERST_BEGIN_CLEAR = 2, 1490 ACPI_ERST_END = 3, 1491 ACPI_ERST_SET_RECORD_OFFSET = 4, 1492 ACPI_ERST_EXECUTE_OPERATION = 5, 1493 ACPI_ERST_CHECK_BUSY_STATUS = 6, 1494 ACPI_ERST_GET_COMMAND_STATUS = 7, 1495 ACPI_ERST_GET_RECORD_ID = 8, 1496 ACPI_ERST_SET_RECORD_ID = 9, 1497 ACPI_ERST_GET_RECORD_COUNT = 10, 1498 ACPI_ERST_BEGIN_DUMMY_WRIITE = 11, 1499 ACPI_ERST_NOT_USED = 12, 1500 ACPI_ERST_GET_ERROR_RANGE = 13, 1501 ACPI_ERST_GET_ERROR_LENGTH = 14, 1502 ACPI_ERST_GET_ERROR_ATTRIBUTES = 15, 1503 ACPI_ERST_EXECUTE_TIMINGS = 16, 1504 ACPI_ERST_ACTION_RESERVED = 17 /* 17 and greater are reserved */ 1505}; 1506 1507/* Values for Instruction field above */ 1508 1509enum AcpiErstInstructions 1510{ 1511 ACPI_ERST_READ_REGISTER = 0, 1512 ACPI_ERST_READ_REGISTER_VALUE = 1, 1513 ACPI_ERST_WRITE_REGISTER = 2, 1514 ACPI_ERST_WRITE_REGISTER_VALUE = 3, 1515 ACPI_ERST_NOOP = 4, 1516 ACPI_ERST_LOAD_VAR1 = 5, 1517 ACPI_ERST_LOAD_VAR2 = 6, 1518 ACPI_ERST_STORE_VAR1 = 7, 1519 ACPI_ERST_ADD = 8, 1520 ACPI_ERST_SUBTRACT = 9, 1521 ACPI_ERST_ADD_VALUE = 10, 1522 ACPI_ERST_SUBTRACT_VALUE = 11, 1523 ACPI_ERST_STALL = 12, 1524 ACPI_ERST_STALL_WHILE_TRUE = 13, 1525 ACPI_ERST_SKIP_NEXT_IF_TRUE = 14, 1526 ACPI_ERST_GOTO = 15, 1527 ACPI_ERST_SET_SRC_ADDRESS_BASE = 16, 1528 ACPI_ERST_SET_DST_ADDRESS_BASE = 17, 1529 ACPI_ERST_MOVE_DATA = 18, 1530 ACPI_ERST_INSTRUCTION_RESERVED = 19 /* 19 and greater are reserved */ 1531}; 1532 1533/* Command status return values */ 1534 1535enum AcpiErstCommandStatus 1536{ 1537 ACPI_ERST_SUCCESS = 0, 1538 ACPI_ERST_NO_SPACE = 1, 1539 ACPI_ERST_NOT_AVAILABLE = 2, 1540 ACPI_ERST_FAILURE = 3, 1541 ACPI_ERST_RECORD_EMPTY = 4, 1542 ACPI_ERST_NOT_FOUND = 5, 1543 ACPI_ERST_STATUS_RESERVED = 6 /* 6 and greater are reserved */ 1544}; 1545 1546 1547/* Error Record Serialization Information */ 1548 1549typedef struct acpi_erst_info 1550{ 1551 UINT16 Signature; /* Should be "ER" */ 1552 UINT8 Data[48]; 1553 1554} ACPI_ERST_INFO; 1555 1556 1557/******************************************************************************* 1558 * 1559 * FPDT - Firmware Performance Data Table (ACPI 5.0) 1560 * Version 1 1561 * 1562 ******************************************************************************/ 1563 1564typedef struct acpi_table_fpdt 1565{ 1566 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1567 1568} ACPI_TABLE_FPDT; 1569 1570 1571/* FPDT subtable header (Performance Record Structure) */ 1572 1573typedef struct acpi_fpdt_header 1574{ 1575 UINT16 Type; 1576 UINT8 Length; 1577 UINT8 Revision; 1578 1579} ACPI_FPDT_HEADER; 1580 1581/* Values for Type field above */ 1582 1583enum AcpiFpdtType 1584{ 1585 ACPI_FPDT_TYPE_BOOT = 0, 1586 ACPI_FPDT_TYPE_S3PERF = 1 1587}; 1588 1589 1590/* 1591 * FPDT subtables 1592 */ 1593 1594/* 0: Firmware Basic Boot Performance Record */ 1595 1596typedef struct acpi_fpdt_boot_pointer 1597{ 1598 ACPI_FPDT_HEADER Header; 1599 UINT8 Reserved[4]; 1600 UINT64 Address; 1601 1602} ACPI_FPDT_BOOT_POINTER; 1603 1604 1605/* 1: S3 Performance Table Pointer Record */ 1606 1607typedef struct acpi_fpdt_s3pt_pointer 1608{ 1609 ACPI_FPDT_HEADER Header; 1610 UINT8 Reserved[4]; 1611 UINT64 Address; 1612 1613} ACPI_FPDT_S3PT_POINTER; 1614 1615 1616/* 1617 * S3PT - S3 Performance Table. This table is pointed to by the 1618 * S3 Pointer Record above. 1619 */ 1620typedef struct acpi_table_s3pt 1621{ 1622 UINT8 Signature[4]; /* "S3PT" */ 1623 UINT32 Length; 1624 1625} ACPI_TABLE_S3PT; 1626 1627 1628/* 1629 * S3PT Subtables (Not part of the actual FPDT) 1630 */ 1631 1632/* Values for Type field in S3PT header */ 1633 1634enum AcpiS3ptType 1635{ 1636 ACPI_S3PT_TYPE_RESUME = 0, 1637 ACPI_S3PT_TYPE_SUSPEND = 1, 1638 ACPI_FPDT_BOOT_PERFORMANCE = 2 1639}; 1640 1641typedef struct acpi_s3pt_resume 1642{ 1643 ACPI_FPDT_HEADER Header; 1644 UINT32 ResumeCount; 1645 UINT64 FullResume; 1646 UINT64 AverageResume; 1647 1648} ACPI_S3PT_RESUME; 1649 1650typedef struct acpi_s3pt_suspend 1651{ 1652 ACPI_FPDT_HEADER Header; 1653 UINT64 SuspendStart; 1654 UINT64 SuspendEnd; 1655 1656} ACPI_S3PT_SUSPEND; 1657 1658 1659/* 1660 * FPDT Boot Performance Record (Not part of the actual FPDT) 1661 */ 1662typedef struct acpi_fpdt_boot 1663{ 1664 ACPI_FPDT_HEADER Header; 1665 UINT8 Reserved[4]; 1666 UINT64 ResetEnd; 1667 UINT64 LoadStart; 1668 UINT64 StartupStart; 1669 UINT64 ExitServicesEntry; 1670 UINT64 ExitServicesExit; 1671 1672} ACPI_FPDT_BOOT; 1673 1674 1675/******************************************************************************* 1676 * 1677 * GTDT - Generic Timer Description Table (ACPI 5.1) 1678 * Version 2 1679 * 1680 ******************************************************************************/ 1681 1682typedef struct acpi_table_gtdt 1683{ 1684 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1685 UINT64 CounterBlockAddresss; 1686 UINT32 Reserved; 1687 UINT32 SecureEl1Interrupt; 1688 UINT32 SecureEl1Flags; 1689 UINT32 NonSecureEl1Interrupt; 1690 UINT32 NonSecureEl1Flags; 1691 UINT32 VirtualTimerInterrupt; 1692 UINT32 VirtualTimerFlags; 1693 UINT32 NonSecureEl2Interrupt; 1694 UINT32 NonSecureEl2Flags; 1695 UINT64 CounterReadBlockAddress; 1696 UINT32 PlatformTimerCount; 1697 UINT32 PlatformTimerOffset; 1698 1699} ACPI_TABLE_GTDT; 1700 1701/* Flag Definitions: Timer Block Physical Timers and Virtual timers */ 1702 1703#define ACPI_GTDT_INTERRUPT_MODE (1) 1704#define ACPI_GTDT_INTERRUPT_POLARITY (1<<1) 1705#define ACPI_GTDT_ALWAYS_ON (1<<2) 1706 1707typedef struct acpi_gtdt_el2 1708{ 1709 UINT32 VirtualEL2TimerGsiv; 1710 UINT32 VirtualEL2TimerFlags; 1711} ACPI_GTDT_EL2; 1712 1713 1714/* Common GTDT subtable header */ 1715 1716typedef struct acpi_gtdt_header 1717{ 1718 UINT8 Type; 1719 UINT16 Length; 1720 1721} ACPI_GTDT_HEADER; 1722 1723/* Values for GTDT subtable type above */ 1724 1725enum AcpiGtdtType 1726{ 1727 ACPI_GTDT_TYPE_TIMER_BLOCK = 0, 1728 ACPI_GTDT_TYPE_WATCHDOG = 1, 1729 ACPI_GTDT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 1730}; 1731 1732 1733/* GTDT Subtables, correspond to Type in acpi_gtdt_header */ 1734 1735/* 0: Generic Timer Block */ 1736 1737typedef struct acpi_gtdt_timer_block 1738{ 1739 ACPI_GTDT_HEADER Header; 1740 UINT8 Reserved; 1741 UINT64 BlockAddress; 1742 UINT32 TimerCount; 1743 UINT32 TimerOffset; 1744 1745} ACPI_GTDT_TIMER_BLOCK; 1746 1747/* Timer Sub-Structure, one per timer */ 1748 1749typedef struct acpi_gtdt_timer_entry 1750{ 1751 UINT8 FrameNumber; 1752 UINT8 Reserved[3]; 1753 UINT64 BaseAddress; 1754 UINT64 El0BaseAddress; 1755 UINT32 TimerInterrupt; 1756 UINT32 TimerFlags; 1757 UINT32 VirtualTimerInterrupt; 1758 UINT32 VirtualTimerFlags; 1759 UINT32 CommonFlags; 1760 1761} ACPI_GTDT_TIMER_ENTRY; 1762 1763/* Flag Definitions: TimerFlags and VirtualTimerFlags above */ 1764 1765#define ACPI_GTDT_GT_IRQ_MODE (1) 1766#define ACPI_GTDT_GT_IRQ_POLARITY (1<<1) 1767 1768/* Flag Definitions: CommonFlags above */ 1769 1770#define ACPI_GTDT_GT_IS_SECURE_TIMER (1) 1771#define ACPI_GTDT_GT_ALWAYS_ON (1<<1) 1772 1773 1774/* 1: SBSA Generic Watchdog Structure */ 1775 1776typedef struct acpi_gtdt_watchdog 1777{ 1778 ACPI_GTDT_HEADER Header; 1779 UINT8 Reserved; 1780 UINT64 RefreshFrameAddress; 1781 UINT64 ControlFrameAddress; 1782 UINT32 TimerInterrupt; 1783 UINT32 TimerFlags; 1784 1785} ACPI_GTDT_WATCHDOG; 1786 1787/* Flag Definitions: TimerFlags above */ 1788 1789#define ACPI_GTDT_WATCHDOG_IRQ_MODE (1) 1790#define ACPI_GTDT_WATCHDOG_IRQ_POLARITY (1<<1) 1791#define ACPI_GTDT_WATCHDOG_SECURE (1<<2) 1792 1793 1794/******************************************************************************* 1795 * 1796 * HEST - Hardware Error Source Table (ACPI 4.0) 1797 * Version 1 1798 * 1799 ******************************************************************************/ 1800 1801typedef struct acpi_table_hest 1802{ 1803 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1804 UINT32 ErrorSourceCount; 1805 1806} ACPI_TABLE_HEST; 1807 1808 1809/* HEST subtable header */ 1810 1811typedef struct acpi_hest_header 1812{ 1813 UINT16 Type; 1814 UINT16 SourceId; 1815 1816} ACPI_HEST_HEADER; 1817 1818 1819/* Values for Type field above for subtables */ 1820 1821enum AcpiHestTypes 1822{ 1823 ACPI_HEST_TYPE_IA32_CHECK = 0, 1824 ACPI_HEST_TYPE_IA32_CORRECTED_CHECK = 1, 1825 ACPI_HEST_TYPE_IA32_NMI = 2, 1826 ACPI_HEST_TYPE_NOT_USED3 = 3, 1827 ACPI_HEST_TYPE_NOT_USED4 = 4, 1828 ACPI_HEST_TYPE_NOT_USED5 = 5, 1829 ACPI_HEST_TYPE_AER_ROOT_PORT = 6, 1830 ACPI_HEST_TYPE_AER_ENDPOINT = 7, 1831 ACPI_HEST_TYPE_AER_BRIDGE = 8, 1832 ACPI_HEST_TYPE_GENERIC_ERROR = 9, 1833 ACPI_HEST_TYPE_GENERIC_ERROR_V2 = 10, 1834 ACPI_HEST_TYPE_IA32_DEFERRED_CHECK = 11, 1835 ACPI_HEST_TYPE_RESERVED = 12 /* 12 and greater are reserved */ 1836}; 1837 1838 1839/* 1840 * HEST substructures contained in subtables 1841 */ 1842 1843/* 1844 * IA32 Error Bank(s) - Follows the ACPI_HEST_IA_MACHINE_CHECK and 1845 * ACPI_HEST_IA_CORRECTED structures. 1846 */ 1847typedef struct acpi_hest_ia_error_bank 1848{ 1849 UINT8 BankNumber; 1850 UINT8 ClearStatusOnInit; 1851 UINT8 StatusFormat; 1852 UINT8 Reserved; 1853 UINT32 ControlRegister; 1854 UINT64 ControlData; 1855 UINT32 StatusRegister; 1856 UINT32 AddressRegister; 1857 UINT32 MiscRegister; 1858 1859} ACPI_HEST_IA_ERROR_BANK; 1860 1861 1862/* Common HEST sub-structure for PCI/AER structures below (6,7,8) */ 1863 1864typedef struct acpi_hest_aer_common 1865{ 1866 UINT16 Reserved1; 1867 UINT8 Flags; 1868 UINT8 Enabled; 1869 UINT32 RecordsToPreallocate; 1870 UINT32 MaxSectionsPerRecord; 1871 UINT32 Bus; /* Bus and Segment numbers */ 1872 UINT16 Device; 1873 UINT16 Function; 1874 UINT16 DeviceControl; 1875 UINT16 Reserved2; 1876 UINT32 UncorrectableMask; 1877 UINT32 UncorrectableSeverity; 1878 UINT32 CorrectableMask; 1879 UINT32 AdvancedCapabilities; 1880 1881} ACPI_HEST_AER_COMMON; 1882 1883/* Masks for HEST Flags fields */ 1884 1885#define ACPI_HEST_FIRMWARE_FIRST (1) 1886#define ACPI_HEST_GLOBAL (1<<1) 1887#define ACPI_HEST_GHES_ASSIST (1<<2) 1888 1889/* 1890 * Macros to access the bus/segment numbers in Bus field above: 1891 * Bus number is encoded in bits 7:0 1892 * Segment number is encoded in bits 23:8 1893 */ 1894#define ACPI_HEST_BUS(Bus) ((Bus) & 0xFF) 1895#define ACPI_HEST_SEGMENT(Bus) (((Bus) >> 8) & 0xFFFF) 1896 1897 1898/* Hardware Error Notification */ 1899 1900typedef struct acpi_hest_notify 1901{ 1902 UINT8 Type; 1903 UINT8 Length; 1904 UINT16 ConfigWriteEnable; 1905 UINT32 PollInterval; 1906 UINT32 Vector; 1907 UINT32 PollingThresholdValue; 1908 UINT32 PollingThresholdWindow; 1909 UINT32 ErrorThresholdValue; 1910 UINT32 ErrorThresholdWindow; 1911 1912} ACPI_HEST_NOTIFY; 1913 1914/* Values for Notify Type field above */ 1915 1916enum AcpiHestNotifyTypes 1917{ 1918 ACPI_HEST_NOTIFY_POLLED = 0, 1919 ACPI_HEST_NOTIFY_EXTERNAL = 1, 1920 ACPI_HEST_NOTIFY_LOCAL = 2, 1921 ACPI_HEST_NOTIFY_SCI = 3, 1922 ACPI_HEST_NOTIFY_NMI = 4, 1923 ACPI_HEST_NOTIFY_CMCI = 5, /* ACPI 5.0 */ 1924 ACPI_HEST_NOTIFY_MCE = 6, /* ACPI 5.0 */ 1925 ACPI_HEST_NOTIFY_GPIO = 7, /* ACPI 6.0 */ 1926 ACPI_HEST_NOTIFY_SEA = 8, /* ACPI 6.1 */ 1927 ACPI_HEST_NOTIFY_SEI = 9, /* ACPI 6.1 */ 1928 ACPI_HEST_NOTIFY_GSIV = 10, /* ACPI 6.1 */ 1929 ACPI_HEST_NOTIFY_SOFTWARE_DELEGATED = 11, /* ACPI 6.2 */ 1930 ACPI_HEST_NOTIFY_RESERVED = 12 /* 12 and greater are reserved */ 1931}; 1932 1933/* Values for ConfigWriteEnable bitfield above */ 1934 1935#define ACPI_HEST_TYPE (1) 1936#define ACPI_HEST_POLL_INTERVAL (1<<1) 1937#define ACPI_HEST_POLL_THRESHOLD_VALUE (1<<2) 1938#define ACPI_HEST_POLL_THRESHOLD_WINDOW (1<<3) 1939#define ACPI_HEST_ERR_THRESHOLD_VALUE (1<<4) 1940#define ACPI_HEST_ERR_THRESHOLD_WINDOW (1<<5) 1941 1942 1943/* 1944 * HEST subtables 1945 */ 1946 1947/* 0: IA32 Machine Check Exception */ 1948 1949typedef struct acpi_hest_ia_machine_check 1950{ 1951 ACPI_HEST_HEADER Header; 1952 UINT16 Reserved1; 1953 UINT8 Flags; /* See flags ACPI_HEST_GLOBAL, etc. above */ 1954 UINT8 Enabled; 1955 UINT32 RecordsToPreallocate; 1956 UINT32 MaxSectionsPerRecord; 1957 UINT64 GlobalCapabilityData; 1958 UINT64 GlobalControlData; 1959 UINT8 NumHardwareBanks; 1960 UINT8 Reserved3[7]; 1961 1962} ACPI_HEST_IA_MACHINE_CHECK; 1963 1964 1965/* 1: IA32 Corrected Machine Check */ 1966 1967typedef struct acpi_hest_ia_corrected 1968{ 1969 ACPI_HEST_HEADER Header; 1970 UINT16 Reserved1; 1971 UINT8 Flags; /* See flags ACPI_HEST_GLOBAL, etc. above */ 1972 UINT8 Enabled; 1973 UINT32 RecordsToPreallocate; 1974 UINT32 MaxSectionsPerRecord; 1975 ACPI_HEST_NOTIFY Notify; 1976 UINT8 NumHardwareBanks; 1977 UINT8 Reserved2[3]; 1978 1979} ACPI_HEST_IA_CORRECTED; 1980 1981 1982/* 2: IA32 Non-Maskable Interrupt */ 1983 1984typedef struct acpi_hest_ia_nmi 1985{ 1986 ACPI_HEST_HEADER Header; 1987 UINT32 Reserved; 1988 UINT32 RecordsToPreallocate; 1989 UINT32 MaxSectionsPerRecord; 1990 UINT32 MaxRawDataLength; 1991 1992} ACPI_HEST_IA_NMI; 1993 1994 1995/* 3,4,5: Not used */ 1996 1997/* 6: PCI Express Root Port AER */ 1998 1999typedef struct acpi_hest_aer_root 2000{ 2001 ACPI_HEST_HEADER Header; 2002 ACPI_HEST_AER_COMMON Aer; 2003 UINT32 RootErrorCommand; 2004 2005} ACPI_HEST_AER_ROOT; 2006 2007 2008/* 7: PCI Express AER (AER Endpoint) */ 2009 2010typedef struct acpi_hest_aer 2011{ 2012 ACPI_HEST_HEADER Header; 2013 ACPI_HEST_AER_COMMON Aer; 2014 2015} ACPI_HEST_AER; 2016 2017 2018/* 8: PCI Express/PCI-X Bridge AER */ 2019 2020typedef struct acpi_hest_aer_bridge 2021{ 2022 ACPI_HEST_HEADER Header; 2023 ACPI_HEST_AER_COMMON Aer; 2024 UINT32 UncorrectableMask2; 2025 UINT32 UncorrectableSeverity2; 2026 UINT32 AdvancedCapabilities2; 2027 2028} ACPI_HEST_AER_BRIDGE; 2029 2030 2031/* 9: Generic Hardware Error Source */ 2032 2033typedef struct acpi_hest_generic 2034{ 2035 ACPI_HEST_HEADER Header; 2036 UINT16 RelatedSourceId; 2037 UINT8 Reserved; 2038 UINT8 Enabled; 2039 UINT32 RecordsToPreallocate; 2040 UINT32 MaxSectionsPerRecord; 2041 UINT32 MaxRawDataLength; 2042 ACPI_GENERIC_ADDRESS ErrorStatusAddress; 2043 ACPI_HEST_NOTIFY Notify; 2044 UINT32 ErrorBlockLength; 2045 2046} ACPI_HEST_GENERIC; 2047 2048 2049/* 10: Generic Hardware Error Source, version 2 */ 2050 2051typedef struct acpi_hest_generic_v2 2052{ 2053 ACPI_HEST_HEADER Header; 2054 UINT16 RelatedSourceId; 2055 UINT8 Reserved; 2056 UINT8 Enabled; 2057 UINT32 RecordsToPreallocate; 2058 UINT32 MaxSectionsPerRecord; 2059 UINT32 MaxRawDataLength; 2060 ACPI_GENERIC_ADDRESS ErrorStatusAddress; 2061 ACPI_HEST_NOTIFY Notify; 2062 UINT32 ErrorBlockLength; 2063 ACPI_GENERIC_ADDRESS ReadAckRegister; 2064 UINT64 ReadAckPreserve; 2065 UINT64 ReadAckWrite; 2066 2067} ACPI_HEST_GENERIC_V2; 2068 2069 2070/* Generic Error Status block */ 2071 2072typedef struct acpi_hest_generic_status 2073{ 2074 UINT32 BlockStatus; 2075 UINT32 RawDataOffset; 2076 UINT32 RawDataLength; 2077 UINT32 DataLength; 2078 UINT32 ErrorSeverity; 2079 2080} ACPI_HEST_GENERIC_STATUS; 2081 2082/* Values for BlockStatus flags above */ 2083 2084#define ACPI_HEST_UNCORRECTABLE (1) 2085#define ACPI_HEST_CORRECTABLE (1<<1) 2086#define ACPI_HEST_MULTIPLE_UNCORRECTABLE (1<<2) 2087#define ACPI_HEST_MULTIPLE_CORRECTABLE (1<<3) 2088#define ACPI_HEST_ERROR_ENTRY_COUNT (0xFF<<4) /* 8 bits, error count */ 2089 2090 2091/* Generic Error Data entry */ 2092 2093typedef struct acpi_hest_generic_data 2094{ 2095 UINT8 SectionType[16]; 2096 UINT32 ErrorSeverity; 2097 UINT16 Revision; 2098 UINT8 ValidationBits; 2099 UINT8 Flags; 2100 UINT32 ErrorDataLength; 2101 UINT8 FruId[16]; 2102 UINT8 FruText[20]; 2103 2104} ACPI_HEST_GENERIC_DATA; 2105 2106/* Extension for revision 0x0300 */ 2107 2108typedef struct acpi_hest_generic_data_v300 2109{ 2110 UINT8 SectionType[16]; 2111 UINT32 ErrorSeverity; 2112 UINT16 Revision; 2113 UINT8 ValidationBits; 2114 UINT8 Flags; 2115 UINT32 ErrorDataLength; 2116 UINT8 FruId[16]; 2117 UINT8 FruText[20]; 2118 UINT64 TimeStamp; 2119 2120} ACPI_HEST_GENERIC_DATA_V300; 2121 2122/* Values for ErrorSeverity above */ 2123 2124#define ACPI_HEST_GEN_ERROR_RECOVERABLE 0 2125#define ACPI_HEST_GEN_ERROR_FATAL 1 2126#define ACPI_HEST_GEN_ERROR_CORRECTED 2 2127#define ACPI_HEST_GEN_ERROR_NONE 3 2128 2129/* Flags for ValidationBits above */ 2130 2131#define ACPI_HEST_GEN_VALID_FRU_ID (1) 2132#define ACPI_HEST_GEN_VALID_FRU_STRING (1<<1) 2133#define ACPI_HEST_GEN_VALID_TIMESTAMP (1<<2) 2134 2135 2136/* 11: IA32 Deferred Machine Check Exception (ACPI 6.2) */ 2137 2138typedef struct acpi_hest_ia_deferred_check 2139{ 2140 ACPI_HEST_HEADER Header; 2141 UINT16 Reserved1; 2142 UINT8 Flags; /* See flags ACPI_HEST_GLOBAL, etc. above */ 2143 UINT8 Enabled; 2144 UINT32 RecordsToPreallocate; 2145 UINT32 MaxSectionsPerRecord; 2146 ACPI_HEST_NOTIFY Notify; 2147 UINT8 NumHardwareBanks; 2148 UINT8 Reserved2[3]; 2149 2150} ACPI_HEST_IA_DEFERRED_CHECK; 2151 2152 2153/******************************************************************************* 2154 * 2155 * HMAT - Heterogeneous Memory Attributes Table (ACPI 6.3) 2156 * 2157 ******************************************************************************/ 2158 2159typedef struct acpi_table_hmat 2160{ 2161 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2162 UINT32 Reserved; 2163 2164} ACPI_TABLE_HMAT; 2165 2166 2167/* Values for HMAT structure types */ 2168 2169enum AcpiHmatType 2170{ 2171 ACPI_HMAT_TYPE_ADDRESS_RANGE = 0, /* Memory subsystem address range */ 2172 ACPI_HMAT_TYPE_LOCALITY = 1, /* System locality latency and bandwidth information */ 2173 ACPI_HMAT_TYPE_CACHE = 2, /* Memory side cache information */ 2174 ACPI_HMAT_TYPE_RESERVED = 3 /* 3 and greater are reserved */ 2175}; 2176 2177typedef struct acpi_hmat_structure 2178{ 2179 UINT16 Type; 2180 UINT16 Reserved; 2181 UINT32 Length; 2182 2183} ACPI_HMAT_STRUCTURE; 2184 2185 2186/* 2187 * HMAT Structures, correspond to Type in ACPI_HMAT_STRUCTURE 2188 */ 2189 2190/* 0: Memory proximity domain attributes */ 2191 2192typedef struct acpi_hmat_proximity_domain 2193{ 2194 ACPI_HMAT_STRUCTURE Header; 2195 UINT16 Flags; 2196 UINT16 Reserved1; 2197 UINT32 InitiatorPD; /* Attached Initiator proximity domain */ 2198 UINT32 MemoryPD; /* Memory proximity domain */ 2199 UINT32 Reserved2; 2200 UINT64 Reserved3; 2201 UINT64 Reserved4; 2202 2203} ACPI_HMAT_PROXIMITY_DOMAIN; 2204 2205/* Masks for Flags field above */ 2206 2207#define ACPI_HMAT_INITIATOR_PD_VALID (1) /* 1: InitiatorPD field is valid */ 2208 2209 2210/* 1: System locality latency and bandwidth information */ 2211 2212typedef struct acpi_hmat_locality 2213{ 2214 ACPI_HMAT_STRUCTURE Header; 2215 UINT8 Flags; 2216 UINT8 DataType; 2217 UINT8 MinTransferSize; 2218 UINT8 Reserved1; 2219 UINT32 NumberOfInitiatorPDs; 2220 UINT32 NumberOfTargetPDs; 2221 UINT32 Reserved2; 2222 UINT64 EntryBaseUnit; 2223 2224} ACPI_HMAT_LOCALITY; 2225 2226/* Masks for Flags field above */ 2227 2228#define ACPI_HMAT_MEMORY_HIERARCHY (0x0F) /* Bits 0-3 */ 2229 2230/* Values for Memory Hierarchy flags */ 2231 2232#define ACPI_HMAT_MEMORY 0 2233#define ACPI_HMAT_1ST_LEVEL_CACHE 1 2234#define ACPI_HMAT_2ND_LEVEL_CACHE 2 2235#define ACPI_HMAT_3RD_LEVEL_CACHE 3 2236#define ACPI_HMAT_MINIMUM_XFER_SIZE 0x10 /* Bit 4: ACPI 6.4 */ 2237#define ACPI_HMAT_NON_SEQUENTIAL_XFERS 0x20 /* Bit 5: ACPI 6.4 */ 2238 2239 2240/* Values for DataType field above */ 2241 2242#define ACPI_HMAT_ACCESS_LATENCY 0 2243#define ACPI_HMAT_READ_LATENCY 1 2244#define ACPI_HMAT_WRITE_LATENCY 2 2245#define ACPI_HMAT_ACCESS_BANDWIDTH 3 2246#define ACPI_HMAT_READ_BANDWIDTH 4 2247#define ACPI_HMAT_WRITE_BANDWIDTH 5 2248 2249 2250/* 2: Memory side cache information */ 2251 2252typedef struct acpi_hmat_cache 2253{ 2254 ACPI_HMAT_STRUCTURE Header; 2255 UINT32 MemoryPD; 2256 UINT32 Reserved1; 2257 UINT64 CacheSize; 2258 UINT32 CacheAttributes; 2259 UINT16 Reserved2; 2260 UINT16 NumberOfSMBIOSHandles; 2261 2262} ACPI_HMAT_CACHE; 2263 2264/* Masks for CacheAttributes field above */ 2265 2266#define ACPI_HMAT_TOTAL_CACHE_LEVEL (0x0000000F) 2267#define ACPI_HMAT_CACHE_LEVEL (0x000000F0) 2268#define ACPI_HMAT_CACHE_ASSOCIATIVITY (0x00000F00) 2269#define ACPI_HMAT_WRITE_POLICY (0x0000F000) 2270#define ACPI_HMAT_CACHE_LINE_SIZE (0xFFFF0000) 2271 2272/* Values for cache associativity flag */ 2273 2274#define ACPI_HMAT_CA_NONE (0) 2275#define ACPI_HMAT_CA_DIRECT_MAPPED (1) 2276#define ACPI_HMAT_CA_COMPLEX_CACHE_INDEXING (2) 2277 2278/* Values for write policy flag */ 2279 2280#define ACPI_HMAT_CP_NONE (0) 2281#define ACPI_HMAT_CP_WB (1) 2282#define ACPI_HMAT_CP_WT (2) 2283 2284 2285/******************************************************************************* 2286 * 2287 * HPET - High Precision Event Timer table 2288 * Version 1 2289 * 2290 * Conforms to "IA-PC HPET (High Precision Event Timers) Specification", 2291 * Version 1.0a, October 2004 2292 * 2293 ******************************************************************************/ 2294 2295typedef struct acpi_table_hpet 2296{ 2297 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2298 UINT32 Id; /* Hardware ID of event timer block */ 2299 ACPI_GENERIC_ADDRESS Address; /* Address of event timer block */ 2300 UINT8 Sequence; /* HPET sequence number */ 2301 UINT16 MinimumTick; /* Main counter min tick, periodic mode */ 2302 UINT8 Flags; 2303 2304} ACPI_TABLE_HPET; 2305 2306/* Masks for Flags field above */ 2307 2308#define ACPI_HPET_PAGE_PROTECT_MASK (3) 2309 2310/* Values for Page Protect flags */ 2311 2312enum AcpiHpetPageProtect 2313{ 2314 ACPI_HPET_NO_PAGE_PROTECT = 0, 2315 ACPI_HPET_PAGE_PROTECT4 = 1, 2316 ACPI_HPET_PAGE_PROTECT64 = 2 2317}; 2318 2319 2320/******************************************************************************* 2321 * 2322 * IBFT - Boot Firmware Table 2323 * Version 1 2324 * 2325 * Conforms to "iSCSI Boot Firmware Table (iBFT) as Defined in ACPI 3.0b 2326 * Specification", Version 1.01, March 1, 2007 2327 * 2328 * Note: It appears that this table is not intended to appear in the RSDT/XSDT. 2329 * Therefore, it is not currently supported by the disassembler. 2330 * 2331 ******************************************************************************/ 2332 2333typedef struct acpi_table_ibft 2334{ 2335 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2336 UINT8 Reserved[12]; 2337 2338} ACPI_TABLE_IBFT; 2339 2340 2341/* IBFT common subtable header */ 2342 2343typedef struct acpi_ibft_header 2344{ 2345 UINT8 Type; 2346 UINT8 Version; 2347 UINT16 Length; 2348 UINT8 Index; 2349 UINT8 Flags; 2350 2351} ACPI_IBFT_HEADER; 2352 2353/* Values for Type field above */ 2354 2355enum AcpiIbftType 2356{ 2357 ACPI_IBFT_TYPE_NOT_USED = 0, 2358 ACPI_IBFT_TYPE_CONTROL = 1, 2359 ACPI_IBFT_TYPE_INITIATOR = 2, 2360 ACPI_IBFT_TYPE_NIC = 3, 2361 ACPI_IBFT_TYPE_TARGET = 4, 2362 ACPI_IBFT_TYPE_EXTENSIONS = 5, 2363 ACPI_IBFT_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 2364}; 2365 2366 2367/* IBFT subtables */ 2368 2369typedef struct acpi_ibft_control 2370{ 2371 ACPI_IBFT_HEADER Header; 2372 UINT16 Extensions; 2373 UINT16 InitiatorOffset; 2374 UINT16 Nic0Offset; 2375 UINT16 Target0Offset; 2376 UINT16 Nic1Offset; 2377 UINT16 Target1Offset; 2378 2379} ACPI_IBFT_CONTROL; 2380 2381typedef struct acpi_ibft_initiator 2382{ 2383 ACPI_IBFT_HEADER Header; 2384 UINT8 SnsServer[16]; 2385 UINT8 SlpServer[16]; 2386 UINT8 PrimaryServer[16]; 2387 UINT8 SecondaryServer[16]; 2388 UINT16 NameLength; 2389 UINT16 NameOffset; 2390 2391} ACPI_IBFT_INITIATOR; 2392 2393typedef struct acpi_ibft_nic 2394{ 2395 ACPI_IBFT_HEADER Header; 2396 UINT8 IpAddress[16]; 2397 UINT8 SubnetMaskPrefix; 2398 UINT8 Origin; 2399 UINT8 Gateway[16]; 2400 UINT8 PrimaryDns[16]; 2401 UINT8 SecondaryDns[16]; 2402 UINT8 Dhcp[16]; 2403 UINT16 Vlan; 2404 UINT8 MacAddress[6]; 2405 UINT16 PciAddress; 2406 UINT16 NameLength; 2407 UINT16 NameOffset; 2408 2409} ACPI_IBFT_NIC; 2410 2411typedef struct acpi_ibft_target 2412{ 2413 ACPI_IBFT_HEADER Header; 2414 UINT8 TargetIpAddress[16]; 2415 UINT16 TargetIpSocket; 2416 UINT8 TargetBootLun[8]; 2417 UINT8 ChapType; 2418 UINT8 NicAssociation; 2419 UINT16 TargetNameLength; 2420 UINT16 TargetNameOffset; 2421 UINT16 ChapNameLength; 2422 UINT16 ChapNameOffset; 2423 UINT16 ChapSecretLength; 2424 UINT16 ChapSecretOffset; 2425 UINT16 ReverseChapNameLength; 2426 UINT16 ReverseChapNameOffset; 2427 UINT16 ReverseChapSecretLength; 2428 UINT16 ReverseChapSecretOffset; 2429 2430} ACPI_IBFT_TARGET; 2431 2432 2433/* Reset to default packing */ 2434 2435#pragma pack() 2436 2437#endif /* __ACTBL1_H__ */ 2438