1/*
2	Copyright 2010 Haiku, Inc.  All rights reserved.
3	Distributed under the terms of the MIT license.
4
5	Authors:
6	Gerald Zajac 2010
7*/
8
9#ifndef __3DFX_H__
10#define __3DFX_H__
11
12
13
14#define BIT(n)	(1UL<<(n))
15
16#define ROP_COPY	0xcc
17#define ROP_INVERT	0x55
18#define ROP_XOR		0x66
19
20#define MEM_TYPE_SGRAM	0
21#define MEM_TYPE_SDRAM	1
22
23
24// Base register offsets in MMIO area.
25#define STATUS				0x0
26#define MISC_INIT1			0x14
27#define DRAM_INIT0			0x18
28#define DRAM_INIT1			0x1C
29#define VGA_INIT0			0x28
30#define VGA_INIT1			0x2c
31#define PLL_CTRL0			0x40
32#define DAC_MODE			0x4c
33#define DAC_ADDR			0x50
34#define DAC_DATA			0x54
35#define RGB_MAX_DELTA		0x58
36#define VIDEO_PROC_CONFIG	0x5c
37#define HW_CURSOR_PAT_ADDR	0x60
38#define HW_CURSOR_LOC		0x64
39#define HW_CURSOR_COLOR0	0x68
40#define HW_CURSOR_COLOR1	0x6c
41#define VIDEO_SERIAL_PARALLEL_PORT	0x78
42#define VIDEO_CHROMA_MIN	0x8c
43#define VIDEO_CHROMA_MAX	0x90
44#define VIDEO_SCREEN_SIZE	0x98
45#define VIDEO_OVERLAY_START_COORDS	0x9c
46#define VIDEO_OVERLAY_END_COORDS	0xa0
47#define VIDEO_OVERLAY_DUDX			0xa4
48#define VIDEO_OVERLAY_DUDX_OFFSET_SRC_WIDTH 0xa8
49#define VIDEO_OVERLAY_DVDY			0xac
50#define VIDEO_OVERLAY_DVDY_OFFSET	0xe0
51#define VIDEO_DESKTOP_START_ADDR	0xe4
52#define VIDEO_DESKTOP_OVERLAY_STRIDE 0xe8
53#define VIDEO_IN_ADDR0				0xec
54
55// Offset in MMIO area of registers used for drawing.
56#define CLIP0_MIN		(0x100000 + 0x8)
57#define CLIP0_MAX		(0x100000 + 0xC)
58#define DST_BASE_ADDR	(0x100000 + 0x10)
59#define DST_FORMAT		(0x100000 + 0x14)
60#define SRC_BASE_ADDR	(0x100000 + 0x34)
61#define CLIP1_MIN		(0x100000 + 0x4C)
62#define CLIP1_MAX		(0x100000 + 0x50)
63#define SRC_FORMAT		(0x100000 + 0x54)
64#define SRC_XY			(0x100000 + 0x5C)
65#define COLOR_BACK		(0x100000 + 0x60)
66#define COLOR_FORE		(0x100000 + 0x64)
67#define DST_SIZE		(0x100000 + 0x68)
68#define DST_XY			(0x100000 + 0x6C)
69#define CMD_2D			(0x100000 + 0x70)
70
71// Offset in MMIO area of 3D registers.
72#define CMD_3D 			(0x200000 + 0x120)
73
74// Flags and register values.
75#define CMD_2D_GO				BIT(8)
76#define CMD_3D_NOP				0
77#define SGRAM_TYPE				BIT(27)
78#define SGRAM_NUM_CHIPSETS		BIT(26)
79#define DISABLE_2D_BLOCK_WRITE	BIT(15)
80#define MCTL_TYPE_SDRAM 		BIT(30)
81#define DAC_MODE_2X				BIT(0)
82#define VIDEO_2X_MODE_ENABLE	BIT(26)
83#define CLUT_SELECT_8BIT		BIT(2)
84#define VGA0_EXTENSIONS 		BIT(6)
85#define WAKEUP_3C3				BIT(8)
86#define VGA0_LEGACY_DECODE		BIT(9)
87#define ENABLE_ALT_READBACK 	BIT(10)
88#define EXT_SHIFT_OUT			BIT(12)
89#define VIDEO_PROCESSOR_ENABLE	BIT(0)
90#define DESKTOP_ENABLE			BIT(7)
91#define DESKTOP_PIXEL_FORMAT_SHIFT	18
92#define DESKTOP_CLUT_BYPASS 	BIT(10)
93#define OVERLAY_CLUT_BYPASS		BIT(11)
94#define CURSOR_ENABLE			BIT(27)
95#define STATUS_BUSY				BIT(9)
96#define X_RIGHT_TO_LEFT			BIT(14)
97#define Y_BOTTOM_TO_TOP			BIT(15)
98
99// 2D Commands
100#define SCRN_TO_SCRN_BLIT	1
101#define RECTANGLE_FILL		5
102
103// Definitions for I2C bus when fetching  EDID info.
104#define VSP_SDA0_IN		0x00400000
105#define VSP_SCL0_IN		0x00200000
106#define VSP_SDA0_OUT	0x00100000
107#define VSP_SCL0_OUT	0x00080000
108#define VSP_ENABLE_IIC0	0x00040000	// set bit to 1 to enable I2C bus 0
109
110// Definitions for overlays.
111#define VIDEO_PROC_CONFIG_MASK	0xa2e3eb6c
112#define VIDCFG_OVL_FMT_RGB565	(1 << 21)
113#define VIDCFG_OVL_FMT_YUYV422	(5 << 21)
114
115
116#endif	// __3DFX_H__
117