1/*
2 * Copyright 2018, Jaroslaw Pelczar <jarek@jpelczar.com>
3 * Distributed under the terms of the MIT License.
4 */
5#ifndef _KERNEL_ARCH_ARM64_ARCH_ATOMIC_H_
6#define _KERNEL_ARCH_ARM64_ARCH_ATOMIC_H_
7
8
9static inline void memory_read_barrier_inline(void)
10{
11	__asm__ __volatile__("dmb ishld");
12}
13
14
15static inline void memory_write_barrier_inline(void)
16{
17	__asm__ __volatile__("dsb ishst");
18}
19
20
21static inline void memory_full_barrier_inline(void)
22{
23	__asm__ __volatile__("dsb sy");
24}
25
26
27#define memory_read_barrier memory_read_barrier_inline
28#define memory_write_barrier memory_write_barrier_inline
29#define memory_full_barrier memory_full_barrier_inline
30
31
32#endif /* _KERNEL_ARCH_ARM64_ARCH_ATOMIC_H_ */
33