1107273Srwatson/* Instruction building/extraction support for iq2000. -*- C -*- 2126097Srwatson 3126097SrwatsonTHIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator. 4107273Srwatson- the resultant file is machine generated, cgen-ibld.in isn't 5107273Srwatson 6107273SrwatsonCopyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. 7107273Srwatson 8107273SrwatsonThis file is part of the GNU Binutils and GDB, the GNU debugger. 9107273Srwatson 10107273SrwatsonThis program is free software; you can redistribute it and/or modify 11107273Srwatsonit under the terms of the GNU General Public License as published by 12107273Srwatsonthe Free Software Foundation; either version 2, or (at your option) 13107273Srwatsonany later version. 14107273Srwatson 15107273SrwatsonThis program is distributed in the hope that it will be useful, 16107273Srwatsonbut WITHOUT ANY WARRANTY; without even the implied warranty of 17107273SrwatsonMERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18107273SrwatsonGNU General Public License for more details. 19107273Srwatson 20107273SrwatsonYou should have received a copy of the GNU General Public License 21107273Srwatsonalong with this program; if not, write to the Free Software Foundation, Inc., 22107273Srwatson59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ 23107273Srwatson 24107273Srwatson/* ??? Eventually more and more of this stuff can go to cpu-independent files. 25107273Srwatson Keep that in mind. */ 26107273Srwatson 27107273Srwatson#include "sysdep.h" 28107273Srwatson#include <stdio.h> 29107273Srwatson#include "ansidecl.h" 30107273Srwatson#include "dis-asm.h" 31107273Srwatson#include "bfd.h" 32107273Srwatson#include "symcat.h" 33107273Srwatson#include "iq2000-desc.h" 34107273Srwatson#include "iq2000-opc.h" 35107273Srwatson#include "opintl.h" 36107273Srwatson#include "safe-ctype.h" 37107273Srwatson 38107273Srwatson#undef min 39107273Srwatson#define min(a,b) ((a) < (b) ? (a) : (b)) 40107273Srwatson#undef max 41107273Srwatson#define max(a,b) ((a) > (b) ? (a) : (b)) 42107273Srwatson 43107273Srwatson/* Used by the ifield rtx function. */ 44107273Srwatson#define FLD(f) (fields->f) 45107273Srwatson 46107273Srwatsonstatic const char * insert_normal 47107273Srwatson (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int, 48107273Srwatson unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR); 49107273Srwatsonstatic const char * insert_insn_normal 50107273Srwatson (CGEN_CPU_DESC, const CGEN_INSN *, 51107273Srwatson CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma); 52107273Srwatsonstatic int extract_normal 53107273Srwatson (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, 54107273Srwatson unsigned int, unsigned int, unsigned int, unsigned int, 55107273Srwatson unsigned int, unsigned int, bfd_vma, long *); 56107273Srwatsonstatic int extract_insn_normal 57107273Srwatson (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *, 58107273Srwatson CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma); 59299187Spfg#if CGEN_INT_INSN_P 60107273Srwatsonstatic void put_insn_int_value 61107273Srwatson (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT); 62107273Srwatson#endif 63107273Srwatson#if ! CGEN_INT_INSN_P 64107273Srwatsonstatic CGEN_INLINE void insert_1 65107273Srwatson (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *); 66107273Srwatsonstatic CGEN_INLINE int fill_cache 67107273Srwatson (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma); 68107273Srwatsonstatic CGEN_INLINE long extract_1 69107273Srwatson (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma); 70107273Srwatson#endif 71107273Srwatson 72107273Srwatson/* Operand insertion. */ 73107273Srwatson 74107273Srwatson#if ! CGEN_INT_INSN_P 75107273Srwatson 76107273Srwatson/* Subroutine of insert_normal. */ 77107273Srwatson 78107273Srwatsonstatic CGEN_INLINE void 79107273Srwatsoninsert_1 (CGEN_CPU_DESC cd, 80107273Srwatson unsigned long value, 81107273Srwatson int start, 82107273Srwatson int length, 83107273Srwatson int word_length, 84107273Srwatson unsigned char *bufp) 85107273Srwatson{ 86107273Srwatson unsigned long x,mask; 87107273Srwatson int shift; 88107273Srwatson 89107273Srwatson x = cgen_get_insn_value (cd, bufp, word_length); 90 91 /* Written this way to avoid undefined behaviour. */ 92 mask = (((1L << (length - 1)) - 1) << 1) | 1; 93 if (CGEN_INSN_LSB0_P) 94 shift = (start + 1) - length; 95 else 96 shift = (word_length - (start + length)); 97 x = (x & ~(mask << shift)) | ((value & mask) << shift); 98 99 cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x); 100} 101 102#endif /* ! CGEN_INT_INSN_P */ 103 104/* Default insertion routine. 105 106 ATTRS is a mask of the boolean attributes. 107 WORD_OFFSET is the offset in bits from the start of the insn of the value. 108 WORD_LENGTH is the length of the word in bits in which the value resides. 109 START is the starting bit number in the word, architecture origin. 110 LENGTH is the length of VALUE in bits. 111 TOTAL_LENGTH is the total length of the insn in bits. 112 113 The result is an error message or NULL if success. */ 114 115/* ??? This duplicates functionality with bfd's howto table and 116 bfd_install_relocation. */ 117/* ??? This doesn't handle bfd_vma's. Create another function when 118 necessary. */ 119 120static const char * 121insert_normal (CGEN_CPU_DESC cd, 122 long value, 123 unsigned int attrs, 124 unsigned int word_offset, 125 unsigned int start, 126 unsigned int length, 127 unsigned int word_length, 128 unsigned int total_length, 129 CGEN_INSN_BYTES_PTR buffer) 130{ 131 static char errbuf[100]; 132 /* Written this way to avoid undefined behaviour. */ 133 unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1; 134 135 /* If LENGTH is zero, this operand doesn't contribute to the value. */ 136 if (length == 0) 137 return NULL; 138 139#if 0 140 if (CGEN_INT_INSN_P 141 && word_offset != 0) 142 abort (); 143#endif 144 145 if (word_length > 32) 146 abort (); 147 148 /* For architectures with insns smaller than the base-insn-bitsize, 149 word_length may be too big. */ 150 if (cd->min_insn_bitsize < cd->base_insn_bitsize) 151 { 152 if (word_offset == 0 153 && word_length > total_length) 154 word_length = total_length; 155 } 156 157 /* Ensure VALUE will fit. */ 158 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) 159 { 160 long minval = - (1L << (length - 1)); 161 unsigned long maxval = mask; 162 163 if ((value > 0 && (unsigned long) value > maxval) 164 || value < minval) 165 { 166 /* xgettext:c-format */ 167 sprintf (errbuf, 168 _("operand out of range (%ld not between %ld and %lu)"), 169 value, minval, maxval); 170 return errbuf; 171 } 172 } 173 else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)) 174 { 175 unsigned long maxval = mask; 176 177 if ((unsigned long) value > maxval) 178 { 179 /* xgettext:c-format */ 180 sprintf (errbuf, 181 _("operand out of range (%lu not between 0 and %lu)"), 182 value, maxval); 183 return errbuf; 184 } 185 } 186 else 187 { 188 if (! cgen_signed_overflow_ok_p (cd)) 189 { 190 long minval = - (1L << (length - 1)); 191 long maxval = (1L << (length - 1)) - 1; 192 193 if (value < minval || value > maxval) 194 { 195 sprintf 196 /* xgettext:c-format */ 197 (errbuf, _("operand out of range (%ld not between %ld and %ld)"), 198 value, minval, maxval); 199 return errbuf; 200 } 201 } 202 } 203 204#if CGEN_INT_INSN_P 205 206 { 207 int shift; 208 209 if (CGEN_INSN_LSB0_P) 210 shift = (word_offset + start + 1) - length; 211 else 212 shift = total_length - (word_offset + start + length); 213 *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift); 214 } 215 216#else /* ! CGEN_INT_INSN_P */ 217 218 { 219 unsigned char *bufp = (unsigned char *) buffer + word_offset / 8; 220 221 insert_1 (cd, value, start, length, word_length, bufp); 222 } 223 224#endif /* ! CGEN_INT_INSN_P */ 225 226 return NULL; 227} 228 229/* Default insn builder (insert handler). 230 The instruction is recorded in CGEN_INT_INSN_P byte order (meaning 231 that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is 232 recorded in host byte order, otherwise BUFFER is an array of bytes 233 and the value is recorded in target byte order). 234 The result is an error message or NULL if success. */ 235 236static const char * 237insert_insn_normal (CGEN_CPU_DESC cd, 238 const CGEN_INSN * insn, 239 CGEN_FIELDS * fields, 240 CGEN_INSN_BYTES_PTR buffer, 241 bfd_vma pc) 242{ 243 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); 244 unsigned long value; 245 const CGEN_SYNTAX_CHAR_TYPE * syn; 246 247 CGEN_INIT_INSERT (cd); 248 value = CGEN_INSN_BASE_VALUE (insn); 249 250 /* If we're recording insns as numbers (rather than a string of bytes), 251 target byte order handling is deferred until later. */ 252 253#if CGEN_INT_INSN_P 254 255 put_insn_int_value (cd, buffer, cd->base_insn_bitsize, 256 CGEN_FIELDS_BITSIZE (fields), value); 257 258#else 259 260 cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize, 261 (unsigned) CGEN_FIELDS_BITSIZE (fields)), 262 value); 263 264#endif /* ! CGEN_INT_INSN_P */ 265 266 /* ??? It would be better to scan the format's fields. 267 Still need to be able to insert a value based on the operand though; 268 e.g. storing a branch displacement that got resolved later. 269 Needs more thought first. */ 270 271 for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn) 272 { 273 const char *errmsg; 274 275 if (CGEN_SYNTAX_CHAR_P (* syn)) 276 continue; 277 278 errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn), 279 fields, buffer, pc); 280 if (errmsg) 281 return errmsg; 282 } 283 284 return NULL; 285} 286 287#if CGEN_INT_INSN_P 288/* Cover function to store an insn value into an integral insn. Must go here 289 because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */ 290 291static void 292put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 293 CGEN_INSN_BYTES_PTR buf, 294 int length, 295 int insn_length, 296 CGEN_INSN_INT value) 297{ 298 /* For architectures with insns smaller than the base-insn-bitsize, 299 length may be too big. */ 300 if (length > insn_length) 301 *buf = value; 302 else 303 { 304 int shift = insn_length - length; 305 /* Written this way to avoid undefined behaviour. */ 306 CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1; 307 *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift); 308 } 309} 310#endif 311 312/* Operand extraction. */ 313 314#if ! CGEN_INT_INSN_P 315 316/* Subroutine of extract_normal. 317 Ensure sufficient bytes are cached in EX_INFO. 318 OFFSET is the offset in bytes from the start of the insn of the value. 319 BYTES is the length of the needed value. 320 Returns 1 for success, 0 for failure. */ 321 322static CGEN_INLINE int 323fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 324 CGEN_EXTRACT_INFO *ex_info, 325 int offset, 326 int bytes, 327 bfd_vma pc) 328{ 329 /* It's doubtful that the middle part has already been fetched so 330 we don't optimize that case. kiss. */ 331 unsigned int mask; 332 disassemble_info *info = (disassemble_info *) ex_info->dis_info; 333 334 /* First do a quick check. */ 335 mask = (1 << bytes) - 1; 336 if (((ex_info->valid >> offset) & mask) == mask) 337 return 1; 338 339 /* Search for the first byte we need to read. */ 340 for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1) 341 if (! (mask & ex_info->valid)) 342 break; 343 344 if (bytes) 345 { 346 int status; 347 348 pc += offset; 349 status = (*info->read_memory_func) 350 (pc, ex_info->insn_bytes + offset, bytes, info); 351 352 if (status != 0) 353 { 354 (*info->memory_error_func) (status, pc, info); 355 return 0; 356 } 357 358 ex_info->valid |= ((1 << bytes) - 1) << offset; 359 } 360 361 return 1; 362} 363 364/* Subroutine of extract_normal. */ 365 366static CGEN_INLINE long 367extract_1 (CGEN_CPU_DESC cd, 368 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED, 369 int start, 370 int length, 371 int word_length, 372 unsigned char *bufp, 373 bfd_vma pc ATTRIBUTE_UNUSED) 374{ 375 unsigned long x; 376 int shift; 377#if 0 378 int big_p = CGEN_CPU_INSN_ENDIAN (cd) == CGEN_ENDIAN_BIG; 379#endif 380 x = cgen_get_insn_value (cd, bufp, word_length); 381 382 if (CGEN_INSN_LSB0_P) 383 shift = (start + 1) - length; 384 else 385 shift = (word_length - (start + length)); 386 return x >> shift; 387} 388 389#endif /* ! CGEN_INT_INSN_P */ 390 391/* Default extraction routine. 392 393 INSN_VALUE is the first base_insn_bitsize bits of the insn in host order, 394 or sometimes less for cases like the m32r where the base insn size is 32 395 but some insns are 16 bits. 396 ATTRS is a mask of the boolean attributes. We only need `SIGNED', 397 but for generality we take a bitmask of all of them. 398 WORD_OFFSET is the offset in bits from the start of the insn of the value. 399 WORD_LENGTH is the length of the word in bits in which the value resides. 400 START is the starting bit number in the word, architecture origin. 401 LENGTH is the length of VALUE in bits. 402 TOTAL_LENGTH is the total length of the insn in bits. 403 404 Returns 1 for success, 0 for failure. */ 405 406/* ??? The return code isn't properly used. wip. */ 407 408/* ??? This doesn't handle bfd_vma's. Create another function when 409 necessary. */ 410 411static int 412extract_normal (CGEN_CPU_DESC cd, 413#if ! CGEN_INT_INSN_P 414 CGEN_EXTRACT_INFO *ex_info, 415#else 416 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED, 417#endif 418 CGEN_INSN_INT insn_value, 419 unsigned int attrs, 420 unsigned int word_offset, 421 unsigned int start, 422 unsigned int length, 423 unsigned int word_length, 424 unsigned int total_length, 425#if ! CGEN_INT_INSN_P 426 bfd_vma pc, 427#else 428 bfd_vma pc ATTRIBUTE_UNUSED, 429#endif 430 long *valuep) 431{ 432 long value, mask; 433 434 /* If LENGTH is zero, this operand doesn't contribute to the value 435 so give it a standard value of zero. */ 436 if (length == 0) 437 { 438 *valuep = 0; 439 return 1; 440 } 441 442#if 0 443 if (CGEN_INT_INSN_P 444 && word_offset != 0) 445 abort (); 446#endif 447 448 if (word_length > 32) 449 abort (); 450 451 /* For architectures with insns smaller than the insn-base-bitsize, 452 word_length may be too big. */ 453 if (cd->min_insn_bitsize < cd->base_insn_bitsize) 454 { 455 if (word_offset == 0 456 && word_length > total_length) 457 word_length = total_length; 458 } 459 460 /* Does the value reside in INSN_VALUE, and at the right alignment? */ 461 462 if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length)) 463 { 464 if (CGEN_INSN_LSB0_P) 465 value = insn_value >> ((word_offset + start + 1) - length); 466 else 467 value = insn_value >> (total_length - ( word_offset + start + length)); 468 } 469 470#if ! CGEN_INT_INSN_P 471 472 else 473 { 474 unsigned char *bufp = ex_info->insn_bytes + word_offset / 8; 475 476 if (word_length > 32) 477 abort (); 478 479 if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0) 480 return 0; 481 482 value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc); 483 } 484 485#endif /* ! CGEN_INT_INSN_P */ 486 487 /* Written this way to avoid undefined behaviour. */ 488 mask = (((1L << (length - 1)) - 1) << 1) | 1; 489 490 value &= mask; 491 /* sign extend? */ 492 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) 493 && (value & (1L << (length - 1)))) 494 value |= ~mask; 495 496 *valuep = value; 497 498 return 1; 499} 500 501/* Default insn extractor. 502 503 INSN_VALUE is the first base_insn_bitsize bits, translated to host order. 504 The extracted fields are stored in FIELDS. 505 EX_INFO is used to handle reading variable length insns. 506 Return the length of the insn in bits, or 0 if no match, 507 or -1 if an error occurs fetching data (memory_error_func will have 508 been called). */ 509 510static int 511extract_insn_normal (CGEN_CPU_DESC cd, 512 const CGEN_INSN *insn, 513 CGEN_EXTRACT_INFO *ex_info, 514 CGEN_INSN_INT insn_value, 515 CGEN_FIELDS *fields, 516 bfd_vma pc) 517{ 518 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); 519 const CGEN_SYNTAX_CHAR_TYPE *syn; 520 521 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn); 522 523 CGEN_INIT_EXTRACT (cd); 524 525 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn) 526 { 527 int length; 528 529 if (CGEN_SYNTAX_CHAR_P (*syn)) 530 continue; 531 532 length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn), 533 ex_info, insn_value, fields, pc); 534 if (length <= 0) 535 return length; 536 } 537 538 /* We recognized and successfully extracted this insn. */ 539 return CGEN_INSN_BITSIZE (insn); 540} 541 542/* machine generated code added here */ 543 544const char * iq2000_cgen_insert_operand 545 PARAMS ((CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma)); 546 547/* Main entry point for operand insertion. 548 549 This function is basically just a big switch statement. Earlier versions 550 used tables to look up the function to use, but 551 - if the table contains both assembler and disassembler functions then 552 the disassembler contains much of the assembler and vice-versa, 553 - there's a lot of inlining possibilities as things grow, 554 - using a switch statement avoids the function call overhead. 555 556 This function could be moved into `parse_insn_normal', but keeping it 557 separate makes clear the interface between `parse_insn_normal' and each of 558 the handlers. It's also needed by GAS to insert operands that couldn't be 559 resolved during parsing. */ 560 561const char * 562iq2000_cgen_insert_operand (cd, opindex, fields, buffer, pc) 563 CGEN_CPU_DESC cd; 564 int opindex; 565 CGEN_FIELDS * fields; 566 CGEN_INSN_BYTES_PTR buffer; 567 bfd_vma pc ATTRIBUTE_UNUSED; 568{ 569 const char * errmsg = NULL; 570 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields); 571 572 switch (opindex) 573 { 574 case IQ2000_OPERAND_BASE : 575 errmsg = insert_normal (cd, fields->f_rs, 0, 0, 25, 5, 32, total_length, buffer); 576 break; 577 case IQ2000_OPERAND_BASEOFF : 578 errmsg = insert_normal (cd, fields->f_imm, 0, 0, 15, 16, 32, total_length, buffer); 579 break; 580 case IQ2000_OPERAND_BITNUM : 581 errmsg = insert_normal (cd, fields->f_rt, 0, 0, 20, 5, 32, total_length, buffer); 582 break; 583 case IQ2000_OPERAND_BYTECOUNT : 584 errmsg = insert_normal (cd, fields->f_bytecount, 0, 0, 7, 8, 32, total_length, buffer); 585 break; 586 case IQ2000_OPERAND_CAM_Y : 587 errmsg = insert_normal (cd, fields->f_cam_y, 0, 0, 2, 3, 32, total_length, buffer); 588 break; 589 case IQ2000_OPERAND_CAM_Z : 590 errmsg = insert_normal (cd, fields->f_cam_z, 0, 0, 5, 3, 32, total_length, buffer); 591 break; 592 case IQ2000_OPERAND_CM_3FUNC : 593 errmsg = insert_normal (cd, fields->f_cm_3func, 0, 0, 5, 3, 32, total_length, buffer); 594 break; 595 case IQ2000_OPERAND_CM_3Z : 596 errmsg = insert_normal (cd, fields->f_cm_3z, 0, 0, 1, 2, 32, total_length, buffer); 597 break; 598 case IQ2000_OPERAND_CM_4FUNC : 599 errmsg = insert_normal (cd, fields->f_cm_4func, 0, 0, 5, 4, 32, total_length, buffer); 600 break; 601 case IQ2000_OPERAND_CM_4Z : 602 errmsg = insert_normal (cd, fields->f_cm_4z, 0, 0, 2, 3, 32, total_length, buffer); 603 break; 604 case IQ2000_OPERAND_COUNT : 605 errmsg = insert_normal (cd, fields->f_count, 0, 0, 15, 7, 32, total_length, buffer); 606 break; 607 case IQ2000_OPERAND_EXECODE : 608 errmsg = insert_normal (cd, fields->f_excode, 0, 0, 25, 20, 32, total_length, buffer); 609 break; 610 case IQ2000_OPERAND_F_INDEX : 611 errmsg = insert_normal (cd, fields->f_index, 0, 0, 8, 9, 32, total_length, buffer); 612 break; 613 case IQ2000_OPERAND_HI16 : 614 errmsg = insert_normal (cd, fields->f_imm, 0, 0, 15, 16, 32, total_length, buffer); 615 break; 616 case IQ2000_OPERAND_IMM : 617 errmsg = insert_normal (cd, fields->f_imm, 0, 0, 15, 16, 32, total_length, buffer); 618 break; 619 case IQ2000_OPERAND_JMPTARG : 620 { 621 long value = fields->f_jtarg; 622 value = ((unsigned int) (((value) & (262143))) >> (2)); 623 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 15, 16, 32, total_length, buffer); 624 } 625 break; 626 case IQ2000_OPERAND_JMPTARGQ10 : 627 { 628 long value = fields->f_jtargq10; 629 value = ((unsigned int) (((value) & (8388607))) >> (2)); 630 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 20, 21, 32, total_length, buffer); 631 } 632 break; 633 case IQ2000_OPERAND_LO16 : 634 errmsg = insert_normal (cd, fields->f_imm, 0, 0, 15, 16, 32, total_length, buffer); 635 break; 636 case IQ2000_OPERAND_MASK : 637 errmsg = insert_normal (cd, fields->f_mask, 0, 0, 9, 4, 32, total_length, buffer); 638 break; 639 case IQ2000_OPERAND_MASKL : 640 errmsg = insert_normal (cd, fields->f_maskl, 0, 0, 4, 5, 32, total_length, buffer); 641 break; 642 case IQ2000_OPERAND_MASKQ10 : 643 errmsg = insert_normal (cd, fields->f_maskq10, 0, 0, 10, 5, 32, total_length, buffer); 644 break; 645 case IQ2000_OPERAND_MASKR : 646 errmsg = insert_normal (cd, fields->f_rs, 0, 0, 25, 5, 32, total_length, buffer); 647 break; 648 case IQ2000_OPERAND_MLO16 : 649 errmsg = insert_normal (cd, fields->f_imm, 0, 0, 15, 16, 32, total_length, buffer); 650 break; 651 case IQ2000_OPERAND_OFFSET : 652 { 653 long value = fields->f_offset; 654 value = ((int) (((value) - (pc))) >> (2)); 655 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 16, 32, total_length, buffer); 656 } 657 break; 658 case IQ2000_OPERAND_RD : 659 errmsg = insert_normal (cd, fields->f_rd, 0, 0, 15, 5, 32, total_length, buffer); 660 break; 661 case IQ2000_OPERAND_RD_RS : 662 { 663{ 664 FLD (f_rd) = FLD (f_rd_rs); 665 FLD (f_rs) = FLD (f_rd_rs); 666} 667 errmsg = insert_normal (cd, fields->f_rd, 0, 0, 15, 5, 32, total_length, buffer); 668 if (errmsg) 669 break; 670 errmsg = insert_normal (cd, fields->f_rs, 0, 0, 25, 5, 32, total_length, buffer); 671 if (errmsg) 672 break; 673 } 674 break; 675 case IQ2000_OPERAND_RD_RT : 676 { 677{ 678 FLD (f_rd) = FLD (f_rd_rt); 679 FLD (f_rt) = FLD (f_rd_rt); 680} 681 errmsg = insert_normal (cd, fields->f_rd, 0, 0, 15, 5, 32, total_length, buffer); 682 if (errmsg) 683 break; 684 errmsg = insert_normal (cd, fields->f_rt, 0, 0, 20, 5, 32, total_length, buffer); 685 if (errmsg) 686 break; 687 } 688 break; 689 case IQ2000_OPERAND_RS : 690 errmsg = insert_normal (cd, fields->f_rs, 0, 0, 25, 5, 32, total_length, buffer); 691 break; 692 case IQ2000_OPERAND_RT : 693 errmsg = insert_normal (cd, fields->f_rt, 0, 0, 20, 5, 32, total_length, buffer); 694 break; 695 case IQ2000_OPERAND_RT_RS : 696 { 697{ 698 FLD (f_rt) = FLD (f_rt_rs); 699 FLD (f_rs) = FLD (f_rt_rs); 700} 701 errmsg = insert_normal (cd, fields->f_rt, 0, 0, 20, 5, 32, total_length, buffer); 702 if (errmsg) 703 break; 704 errmsg = insert_normal (cd, fields->f_rs, 0, 0, 25, 5, 32, total_length, buffer); 705 if (errmsg) 706 break; 707 } 708 break; 709 case IQ2000_OPERAND_SHAMT : 710 errmsg = insert_normal (cd, fields->f_shamt, 0, 0, 10, 5, 32, total_length, buffer); 711 break; 712 713 default : 714 /* xgettext:c-format */ 715 fprintf (stderr, _("Unrecognized field %d while building insn.\n"), 716 opindex); 717 abort (); 718 } 719 720 return errmsg; 721} 722 723int iq2000_cgen_extract_operand 724 PARAMS ((CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, 725 CGEN_FIELDS *, bfd_vma)); 726 727/* Main entry point for operand extraction. 728 The result is <= 0 for error, >0 for success. 729 ??? Actual values aren't well defined right now. 730 731 This function is basically just a big switch statement. Earlier versions 732 used tables to look up the function to use, but 733 - if the table contains both assembler and disassembler functions then 734 the disassembler contains much of the assembler and vice-versa, 735 - there's a lot of inlining possibilities as things grow, 736 - using a switch statement avoids the function call overhead. 737 738 This function could be moved into `print_insn_normal', but keeping it 739 separate makes clear the interface between `print_insn_normal' and each of 740 the handlers. */ 741 742int 743iq2000_cgen_extract_operand (cd, opindex, ex_info, insn_value, fields, pc) 744 CGEN_CPU_DESC cd; 745 int opindex; 746 CGEN_EXTRACT_INFO *ex_info; 747 CGEN_INSN_INT insn_value; 748 CGEN_FIELDS * fields; 749 bfd_vma pc; 750{ 751 /* Assume success (for those operands that are nops). */ 752 int length = 1; 753 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields); 754 755 switch (opindex) 756 { 757 case IQ2000_OPERAND_BASE : 758 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_rs); 759 break; 760 case IQ2000_OPERAND_BASEOFF : 761 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 16, 32, total_length, pc, & fields->f_imm); 762 break; 763 case IQ2000_OPERAND_BITNUM : 764 length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 5, 32, total_length, pc, & fields->f_rt); 765 break; 766 case IQ2000_OPERAND_BYTECOUNT : 767 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 8, 32, total_length, pc, & fields->f_bytecount); 768 break; 769 case IQ2000_OPERAND_CAM_Y : 770 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 3, 32, total_length, pc, & fields->f_cam_y); 771 break; 772 case IQ2000_OPERAND_CAM_Z : 773 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_cam_z); 774 break; 775 case IQ2000_OPERAND_CM_3FUNC : 776 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_cm_3func); 777 break; 778 case IQ2000_OPERAND_CM_3Z : 779 length = extract_normal (cd, ex_info, insn_value, 0, 0, 1, 2, 32, total_length, pc, & fields->f_cm_3z); 780 break; 781 case IQ2000_OPERAND_CM_4FUNC : 782 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 4, 32, total_length, pc, & fields->f_cm_4func); 783 break; 784 case IQ2000_OPERAND_CM_4Z : 785 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 3, 32, total_length, pc, & fields->f_cm_4z); 786 break; 787 case IQ2000_OPERAND_COUNT : 788 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 7, 32, total_length, pc, & fields->f_count); 789 break; 790 case IQ2000_OPERAND_EXECODE : 791 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 20, 32, total_length, pc, & fields->f_excode); 792 break; 793 case IQ2000_OPERAND_F_INDEX : 794 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 9, 32, total_length, pc, & fields->f_index); 795 break; 796 case IQ2000_OPERAND_HI16 : 797 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 16, 32, total_length, pc, & fields->f_imm); 798 break; 799 case IQ2000_OPERAND_IMM : 800 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 16, 32, total_length, pc, & fields->f_imm); 801 break; 802 case IQ2000_OPERAND_JMPTARG : 803 { 804 long value; 805 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 15, 16, 32, total_length, pc, & value); 806 value = ((((pc) & (0xf0000000))) | (((value) << (2)))); 807 fields->f_jtarg = value; 808 } 809 break; 810 case IQ2000_OPERAND_JMPTARGQ10 : 811 { 812 long value; 813 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 20, 21, 32, total_length, pc, & value); 814 value = ((((pc) & (0xf0000000))) | (((value) << (2)))); 815 fields->f_jtargq10 = value; 816 } 817 break; 818 case IQ2000_OPERAND_LO16 : 819 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 16, 32, total_length, pc, & fields->f_imm); 820 break; 821 case IQ2000_OPERAND_MASK : 822 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 4, 32, total_length, pc, & fields->f_mask); 823 break; 824 case IQ2000_OPERAND_MASKL : 825 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 5, 32, total_length, pc, & fields->f_maskl); 826 break; 827 case IQ2000_OPERAND_MASKQ10 : 828 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 5, 32, total_length, pc, & fields->f_maskq10); 829 break; 830 case IQ2000_OPERAND_MASKR : 831 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_rs); 832 break; 833 case IQ2000_OPERAND_MLO16 : 834 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 16, 32, total_length, pc, & fields->f_imm); 835 break; 836 case IQ2000_OPERAND_OFFSET : 837 { 838 long value; 839 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 16, 32, total_length, pc, & value); 840 value = ((((value) << (2))) + (((pc) + (4)))); 841 fields->f_offset = value; 842 } 843 break; 844 case IQ2000_OPERAND_RD : 845 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 5, 32, total_length, pc, & fields->f_rd); 846 break; 847 case IQ2000_OPERAND_RD_RS : 848 { 849 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 5, 32, total_length, pc, & fields->f_rd); 850 if (length <= 0) break; 851 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_rs); 852 if (length <= 0) break; 853{ 854 FLD (f_rd_rs) = FLD (f_rs); 855} 856 } 857 break; 858 case IQ2000_OPERAND_RD_RT : 859 { 860 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 5, 32, total_length, pc, & fields->f_rd); 861 if (length <= 0) break; 862 length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 5, 32, total_length, pc, & fields->f_rt); 863 if (length <= 0) break; 864{ 865 FLD (f_rd_rt) = FLD (f_rt); 866} 867 } 868 break; 869 case IQ2000_OPERAND_RS : 870 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_rs); 871 break; 872 case IQ2000_OPERAND_RT : 873 length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 5, 32, total_length, pc, & fields->f_rt); 874 break; 875 case IQ2000_OPERAND_RT_RS : 876 { 877 length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 5, 32, total_length, pc, & fields->f_rt); 878 if (length <= 0) break; 879 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_rs); 880 if (length <= 0) break; 881{ 882 FLD (f_rd_rs) = FLD (f_rs); 883} 884 } 885 break; 886 case IQ2000_OPERAND_SHAMT : 887 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 5, 32, total_length, pc, & fields->f_shamt); 888 break; 889 890 default : 891 /* xgettext:c-format */ 892 fprintf (stderr, _("Unrecognized field %d while decoding insn.\n"), 893 opindex); 894 abort (); 895 } 896 897 return length; 898} 899 900cgen_insert_fn * const iq2000_cgen_insert_handlers[] = 901{ 902 insert_insn_normal, 903}; 904 905cgen_extract_fn * const iq2000_cgen_extract_handlers[] = 906{ 907 extract_insn_normal, 908}; 909 910int iq2000_cgen_get_int_operand 911 PARAMS ((CGEN_CPU_DESC, int, const CGEN_FIELDS *)); 912bfd_vma iq2000_cgen_get_vma_operand 913 PARAMS ((CGEN_CPU_DESC, int, const CGEN_FIELDS *)); 914 915/* Getting values from cgen_fields is handled by a collection of functions. 916 They are distinguished by the type of the VALUE argument they return. 917 TODO: floating point, inlining support, remove cases where result type 918 not appropriate. */ 919 920int 921iq2000_cgen_get_int_operand (cd, opindex, fields) 922 CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; 923 int opindex; 924 const CGEN_FIELDS * fields; 925{ 926 int value; 927 928 switch (opindex) 929 { 930 case IQ2000_OPERAND_BASE : 931 value = fields->f_rs; 932 break; 933 case IQ2000_OPERAND_BASEOFF : 934 value = fields->f_imm; 935 break; 936 case IQ2000_OPERAND_BITNUM : 937 value = fields->f_rt; 938 break; 939 case IQ2000_OPERAND_BYTECOUNT : 940 value = fields->f_bytecount; 941 break; 942 case IQ2000_OPERAND_CAM_Y : 943 value = fields->f_cam_y; 944 break; 945 case IQ2000_OPERAND_CAM_Z : 946 value = fields->f_cam_z; 947 break; 948 case IQ2000_OPERAND_CM_3FUNC : 949 value = fields->f_cm_3func; 950 break; 951 case IQ2000_OPERAND_CM_3Z : 952 value = fields->f_cm_3z; 953 break; 954 case IQ2000_OPERAND_CM_4FUNC : 955 value = fields->f_cm_4func; 956 break; 957 case IQ2000_OPERAND_CM_4Z : 958 value = fields->f_cm_4z; 959 break; 960 case IQ2000_OPERAND_COUNT : 961 value = fields->f_count; 962 break; 963 case IQ2000_OPERAND_EXECODE : 964 value = fields->f_excode; 965 break; 966 case IQ2000_OPERAND_F_INDEX : 967 value = fields->f_index; 968 break; 969 case IQ2000_OPERAND_HI16 : 970 value = fields->f_imm; 971 break; 972 case IQ2000_OPERAND_IMM : 973 value = fields->f_imm; 974 break; 975 case IQ2000_OPERAND_JMPTARG : 976 value = fields->f_jtarg; 977 break; 978 case IQ2000_OPERAND_JMPTARGQ10 : 979 value = fields->f_jtargq10; 980 break; 981 case IQ2000_OPERAND_LO16 : 982 value = fields->f_imm; 983 break; 984 case IQ2000_OPERAND_MASK : 985 value = fields->f_mask; 986 break; 987 case IQ2000_OPERAND_MASKL : 988 value = fields->f_maskl; 989 break; 990 case IQ2000_OPERAND_MASKQ10 : 991 value = fields->f_maskq10; 992 break; 993 case IQ2000_OPERAND_MASKR : 994 value = fields->f_rs; 995 break; 996 case IQ2000_OPERAND_MLO16 : 997 value = fields->f_imm; 998 break; 999 case IQ2000_OPERAND_OFFSET : 1000 value = fields->f_offset; 1001 break; 1002 case IQ2000_OPERAND_RD : 1003 value = fields->f_rd; 1004 break; 1005 case IQ2000_OPERAND_RD_RS : 1006 value = fields->f_rd_rs; 1007 break; 1008 case IQ2000_OPERAND_RD_RT : 1009 value = fields->f_rd_rt; 1010 break; 1011 case IQ2000_OPERAND_RS : 1012 value = fields->f_rs; 1013 break; 1014 case IQ2000_OPERAND_RT : 1015 value = fields->f_rt; 1016 break; 1017 case IQ2000_OPERAND_RT_RS : 1018 value = fields->f_rt_rs; 1019 break; 1020 case IQ2000_OPERAND_SHAMT : 1021 value = fields->f_shamt; 1022 break; 1023 1024 default : 1025 /* xgettext:c-format */ 1026 fprintf (stderr, _("Unrecognized field %d while getting int operand.\n"), 1027 opindex); 1028 abort (); 1029 } 1030 1031 return value; 1032} 1033 1034bfd_vma 1035iq2000_cgen_get_vma_operand (cd, opindex, fields) 1036 CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; 1037 int opindex; 1038 const CGEN_FIELDS * fields; 1039{ 1040 bfd_vma value; 1041 1042 switch (opindex) 1043 { 1044 case IQ2000_OPERAND_BASE : 1045 value = fields->f_rs; 1046 break; 1047 case IQ2000_OPERAND_BASEOFF : 1048 value = fields->f_imm; 1049 break; 1050 case IQ2000_OPERAND_BITNUM : 1051 value = fields->f_rt; 1052 break; 1053 case IQ2000_OPERAND_BYTECOUNT : 1054 value = fields->f_bytecount; 1055 break; 1056 case IQ2000_OPERAND_CAM_Y : 1057 value = fields->f_cam_y; 1058 break; 1059 case IQ2000_OPERAND_CAM_Z : 1060 value = fields->f_cam_z; 1061 break; 1062 case IQ2000_OPERAND_CM_3FUNC : 1063 value = fields->f_cm_3func; 1064 break; 1065 case IQ2000_OPERAND_CM_3Z : 1066 value = fields->f_cm_3z; 1067 break; 1068 case IQ2000_OPERAND_CM_4FUNC : 1069 value = fields->f_cm_4func; 1070 break; 1071 case IQ2000_OPERAND_CM_4Z : 1072 value = fields->f_cm_4z; 1073 break; 1074 case IQ2000_OPERAND_COUNT : 1075 value = fields->f_count; 1076 break; 1077 case IQ2000_OPERAND_EXECODE : 1078 value = fields->f_excode; 1079 break; 1080 case IQ2000_OPERAND_F_INDEX : 1081 value = fields->f_index; 1082 break; 1083 case IQ2000_OPERAND_HI16 : 1084 value = fields->f_imm; 1085 break; 1086 case IQ2000_OPERAND_IMM : 1087 value = fields->f_imm; 1088 break; 1089 case IQ2000_OPERAND_JMPTARG : 1090 value = fields->f_jtarg; 1091 break; 1092 case IQ2000_OPERAND_JMPTARGQ10 : 1093 value = fields->f_jtargq10; 1094 break; 1095 case IQ2000_OPERAND_LO16 : 1096 value = fields->f_imm; 1097 break; 1098 case IQ2000_OPERAND_MASK : 1099 value = fields->f_mask; 1100 break; 1101 case IQ2000_OPERAND_MASKL : 1102 value = fields->f_maskl; 1103 break; 1104 case IQ2000_OPERAND_MASKQ10 : 1105 value = fields->f_maskq10; 1106 break; 1107 case IQ2000_OPERAND_MASKR : 1108 value = fields->f_rs; 1109 break; 1110 case IQ2000_OPERAND_MLO16 : 1111 value = fields->f_imm; 1112 break; 1113 case IQ2000_OPERAND_OFFSET : 1114 value = fields->f_offset; 1115 break; 1116 case IQ2000_OPERAND_RD : 1117 value = fields->f_rd; 1118 break; 1119 case IQ2000_OPERAND_RD_RS : 1120 value = fields->f_rd_rs; 1121 break; 1122 case IQ2000_OPERAND_RD_RT : 1123 value = fields->f_rd_rt; 1124 break; 1125 case IQ2000_OPERAND_RS : 1126 value = fields->f_rs; 1127 break; 1128 case IQ2000_OPERAND_RT : 1129 value = fields->f_rt; 1130 break; 1131 case IQ2000_OPERAND_RT_RS : 1132 value = fields->f_rt_rs; 1133 break; 1134 case IQ2000_OPERAND_SHAMT : 1135 value = fields->f_shamt; 1136 break; 1137 1138 default : 1139 /* xgettext:c-format */ 1140 fprintf (stderr, _("Unrecognized field %d while getting vma operand.\n"), 1141 opindex); 1142 abort (); 1143 } 1144 1145 return value; 1146} 1147 1148void iq2000_cgen_set_int_operand 1149 PARAMS ((CGEN_CPU_DESC, int, CGEN_FIELDS *, int)); 1150void iq2000_cgen_set_vma_operand 1151 PARAMS ((CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma)); 1152 1153/* Stuffing values in cgen_fields is handled by a collection of functions. 1154 They are distinguished by the type of the VALUE argument they accept. 1155 TODO: floating point, inlining support, remove cases where argument type 1156 not appropriate. */ 1157 1158void 1159iq2000_cgen_set_int_operand (cd, opindex, fields, value) 1160 CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; 1161 int opindex; 1162 CGEN_FIELDS * fields; 1163 int value; 1164{ 1165 switch (opindex) 1166 { 1167 case IQ2000_OPERAND_BASE : 1168 fields->f_rs = value; 1169 break; 1170 case IQ2000_OPERAND_BASEOFF : 1171 fields->f_imm = value; 1172 break; 1173 case IQ2000_OPERAND_BITNUM : 1174 fields->f_rt = value; 1175 break; 1176 case IQ2000_OPERAND_BYTECOUNT : 1177 fields->f_bytecount = value; 1178 break; 1179 case IQ2000_OPERAND_CAM_Y : 1180 fields->f_cam_y = value; 1181 break; 1182 case IQ2000_OPERAND_CAM_Z : 1183 fields->f_cam_z = value; 1184 break; 1185 case IQ2000_OPERAND_CM_3FUNC : 1186 fields->f_cm_3func = value; 1187 break; 1188 case IQ2000_OPERAND_CM_3Z : 1189 fields->f_cm_3z = value; 1190 break; 1191 case IQ2000_OPERAND_CM_4FUNC : 1192 fields->f_cm_4func = value; 1193 break; 1194 case IQ2000_OPERAND_CM_4Z : 1195 fields->f_cm_4z = value; 1196 break; 1197 case IQ2000_OPERAND_COUNT : 1198 fields->f_count = value; 1199 break; 1200 case IQ2000_OPERAND_EXECODE : 1201 fields->f_excode = value; 1202 break; 1203 case IQ2000_OPERAND_F_INDEX : 1204 fields->f_index = value; 1205 break; 1206 case IQ2000_OPERAND_HI16 : 1207 fields->f_imm = value; 1208 break; 1209 case IQ2000_OPERAND_IMM : 1210 fields->f_imm = value; 1211 break; 1212 case IQ2000_OPERAND_JMPTARG : 1213 fields->f_jtarg = value; 1214 break; 1215 case IQ2000_OPERAND_JMPTARGQ10 : 1216 fields->f_jtargq10 = value; 1217 break; 1218 case IQ2000_OPERAND_LO16 : 1219 fields->f_imm = value; 1220 break; 1221 case IQ2000_OPERAND_MASK : 1222 fields->f_mask = value; 1223 break; 1224 case IQ2000_OPERAND_MASKL : 1225 fields->f_maskl = value; 1226 break; 1227 case IQ2000_OPERAND_MASKQ10 : 1228 fields->f_maskq10 = value; 1229 break; 1230 case IQ2000_OPERAND_MASKR : 1231 fields->f_rs = value; 1232 break; 1233 case IQ2000_OPERAND_MLO16 : 1234 fields->f_imm = value; 1235 break; 1236 case IQ2000_OPERAND_OFFSET : 1237 fields->f_offset = value; 1238 break; 1239 case IQ2000_OPERAND_RD : 1240 fields->f_rd = value; 1241 break; 1242 case IQ2000_OPERAND_RD_RS : 1243 fields->f_rd_rs = value; 1244 break; 1245 case IQ2000_OPERAND_RD_RT : 1246 fields->f_rd_rt = value; 1247 break; 1248 case IQ2000_OPERAND_RS : 1249 fields->f_rs = value; 1250 break; 1251 case IQ2000_OPERAND_RT : 1252 fields->f_rt = value; 1253 break; 1254 case IQ2000_OPERAND_RT_RS : 1255 fields->f_rt_rs = value; 1256 break; 1257 case IQ2000_OPERAND_SHAMT : 1258 fields->f_shamt = value; 1259 break; 1260 1261 default : 1262 /* xgettext:c-format */ 1263 fprintf (stderr, _("Unrecognized field %d while setting int operand.\n"), 1264 opindex); 1265 abort (); 1266 } 1267} 1268 1269void 1270iq2000_cgen_set_vma_operand (cd, opindex, fields, value) 1271 CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; 1272 int opindex; 1273 CGEN_FIELDS * fields; 1274 bfd_vma value; 1275{ 1276 switch (opindex) 1277 { 1278 case IQ2000_OPERAND_BASE : 1279 fields->f_rs = value; 1280 break; 1281 case IQ2000_OPERAND_BASEOFF : 1282 fields->f_imm = value; 1283 break; 1284 case IQ2000_OPERAND_BITNUM : 1285 fields->f_rt = value; 1286 break; 1287 case IQ2000_OPERAND_BYTECOUNT : 1288 fields->f_bytecount = value; 1289 break; 1290 case IQ2000_OPERAND_CAM_Y : 1291 fields->f_cam_y = value; 1292 break; 1293 case IQ2000_OPERAND_CAM_Z : 1294 fields->f_cam_z = value; 1295 break; 1296 case IQ2000_OPERAND_CM_3FUNC : 1297 fields->f_cm_3func = value; 1298 break; 1299 case IQ2000_OPERAND_CM_3Z : 1300 fields->f_cm_3z = value; 1301 break; 1302 case IQ2000_OPERAND_CM_4FUNC : 1303 fields->f_cm_4func = value; 1304 break; 1305 case IQ2000_OPERAND_CM_4Z : 1306 fields->f_cm_4z = value; 1307 break; 1308 case IQ2000_OPERAND_COUNT : 1309 fields->f_count = value; 1310 break; 1311 case IQ2000_OPERAND_EXECODE : 1312 fields->f_excode = value; 1313 break; 1314 case IQ2000_OPERAND_F_INDEX : 1315 fields->f_index = value; 1316 break; 1317 case IQ2000_OPERAND_HI16 : 1318 fields->f_imm = value; 1319 break; 1320 case IQ2000_OPERAND_IMM : 1321 fields->f_imm = value; 1322 break; 1323 case IQ2000_OPERAND_JMPTARG : 1324 fields->f_jtarg = value; 1325 break; 1326 case IQ2000_OPERAND_JMPTARGQ10 : 1327 fields->f_jtargq10 = value; 1328 break; 1329 case IQ2000_OPERAND_LO16 : 1330 fields->f_imm = value; 1331 break; 1332 case IQ2000_OPERAND_MASK : 1333 fields->f_mask = value; 1334 break; 1335 case IQ2000_OPERAND_MASKL : 1336 fields->f_maskl = value; 1337 break; 1338 case IQ2000_OPERAND_MASKQ10 : 1339 fields->f_maskq10 = value; 1340 break; 1341 case IQ2000_OPERAND_MASKR : 1342 fields->f_rs = value; 1343 break; 1344 case IQ2000_OPERAND_MLO16 : 1345 fields->f_imm = value; 1346 break; 1347 case IQ2000_OPERAND_OFFSET : 1348 fields->f_offset = value; 1349 break; 1350 case IQ2000_OPERAND_RD : 1351 fields->f_rd = value; 1352 break; 1353 case IQ2000_OPERAND_RD_RS : 1354 fields->f_rd_rs = value; 1355 break; 1356 case IQ2000_OPERAND_RD_RT : 1357 fields->f_rd_rt = value; 1358 break; 1359 case IQ2000_OPERAND_RS : 1360 fields->f_rs = value; 1361 break; 1362 case IQ2000_OPERAND_RT : 1363 fields->f_rt = value; 1364 break; 1365 case IQ2000_OPERAND_RT_RS : 1366 fields->f_rt_rs = value; 1367 break; 1368 case IQ2000_OPERAND_SHAMT : 1369 fields->f_shamt = value; 1370 break; 1371 1372 default : 1373 /* xgettext:c-format */ 1374 fprintf (stderr, _("Unrecognized field %d while setting vma operand.\n"), 1375 opindex); 1376 abort (); 1377 } 1378} 1379 1380/* Function to call before using the instruction builder tables. */ 1381 1382void 1383iq2000_cgen_init_ibld_table (cd) 1384 CGEN_CPU_DESC cd; 1385{ 1386 cd->insert_handlers = & iq2000_cgen_insert_handlers[0]; 1387 cd->extract_handlers = & iq2000_cgen_extract_handlers[0]; 1388 1389 cd->insert_operand = iq2000_cgen_insert_operand; 1390 cd->extract_operand = iq2000_cgen_extract_operand; 1391 1392 cd->get_int_operand = iq2000_cgen_get_int_operand; 1393 cd->set_int_operand = iq2000_cgen_set_int_operand; 1394 cd->get_vma_operand = iq2000_cgen_get_vma_operand; 1395 cd->set_vma_operand = iq2000_cgen_set_vma_operand; 1396} 1397