1/* Target-dependent code for UltraSPARC.
2
3   Copyright 2003, 2004 Free Software Foundation, Inc.
4
5   This file is part of GDB.
6
7   This program is free software; you can redistribute it and/or modify
8   it under the terms of the GNU General Public License as published by
9   the Free Software Foundation; either version 2 of the License, or
10   (at your option) any later version.
11
12   This program is distributed in the hope that it will be useful,
13   but WITHOUT ANY WARRANTY; without even the implied warranty of
14   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15   GNU General Public License for more details.
16
17   You should have received a copy of the GNU General Public License
18   along with this program; if not, write to the Free Software
19   Foundation, Inc., 59 Temple Place - Suite 330,
20   Boston, MA 02111-1307, USA.  */
21
22#include "defs.h"
23#include "arch-utils.h"
24#include "floatformat.h"
25#include "frame.h"
26#include "frame-base.h"
27#include "frame-unwind.h"
28#include "gdbcore.h"
29#include "gdbtypes.h"
30#include "inferior.h"
31#include "symtab.h"
32#include "objfiles.h"
33#include "osabi.h"
34#include "regcache.h"
35#include "target.h"
36#include "value.h"
37
38#include "gdb_assert.h"
39#include "gdb_string.h"
40
41#include "sparc64-tdep.h"
42
43/* This file implements the The SPARC 64-bit ABI as defined by the
44   section "Low-Level System Information" of the SPARC Compliance
45   Definition (SCD) 2.4.1, which is the 64-bit System V psABI for
46   SPARC.  */
47
48/* Please use the sparc32_-prefix for 32-bit specific code, the
49   sparc64_-prefix for 64-bit specific code and the sparc_-prefix for
50   code can handle both.  */
51
52/* The functions on this page are intended to be used to classify
53   function arguments.  */
54
55/* Check whether TYPE is "Integral or Pointer".  */
56
57static int
58sparc64_integral_or_pointer_p (const struct type *type)
59{
60  switch (TYPE_CODE (type))
61    {
62    case TYPE_CODE_INT:
63    case TYPE_CODE_BOOL:
64    case TYPE_CODE_CHAR:
65    case TYPE_CODE_ENUM:
66    case TYPE_CODE_RANGE:
67      {
68	int len = TYPE_LENGTH (type);
69	gdb_assert (len == 1 || len == 2 || len == 4 || len == 8);
70      }
71      return 1;
72    case TYPE_CODE_PTR:
73    case TYPE_CODE_REF:
74      {
75	int len = TYPE_LENGTH (type);
76	gdb_assert (len == 8);
77      }
78      return 1;
79    default:
80      break;
81    }
82
83  return 0;
84}
85
86/* Check whether TYPE is "Floating".  */
87
88static int
89sparc64_floating_p (const struct type *type)
90{
91  switch (TYPE_CODE (type))
92    {
93    case TYPE_CODE_FLT:
94      {
95	int len = TYPE_LENGTH (type);
96	gdb_assert (len == 4 || len == 8 || len == 16);
97      }
98      return 1;
99    default:
100      break;
101    }
102
103  return 0;
104}
105
106/* Check whether TYPE is "Structure or Union".  */
107
108static int
109sparc64_structure_or_union_p (const struct type *type)
110{
111  switch (TYPE_CODE (type))
112    {
113    case TYPE_CODE_STRUCT:
114    case TYPE_CODE_UNION:
115      return 1;
116    default:
117      break;
118    }
119
120  return 0;
121}
122
123/* Register information.  */
124
125struct sparc64_register_info
126{
127  char *name;
128  struct type **type;
129};
130
131static struct sparc64_register_info sparc64_register_info[] =
132{
133  { "g0", &builtin_type_int64 },
134  { "g1", &builtin_type_int64 },
135  { "g2", &builtin_type_int64 },
136  { "g3", &builtin_type_int64 },
137  { "g4", &builtin_type_int64 },
138  { "g5", &builtin_type_int64 },
139  { "g6", &builtin_type_int64 },
140  { "g7", &builtin_type_int64 },
141
142  { "o0", &builtin_type_int64 },
143  { "o1", &builtin_type_int64 },
144  { "o2", &builtin_type_int64 },
145  { "o3", &builtin_type_int64 },
146  { "o4", &builtin_type_int64 },
147  { "o5", &builtin_type_int64 },
148  { "sp", &builtin_type_void_data_ptr },
149  { "o7", &builtin_type_int64 },
150
151  { "l0", &builtin_type_int64 },
152  { "l1", &builtin_type_int64 },
153  { "l2", &builtin_type_int64 },
154  { "l3", &builtin_type_int64 },
155  { "l4", &builtin_type_int64 },
156  { "l5", &builtin_type_int64 },
157  { "l6", &builtin_type_int64 },
158  { "l7", &builtin_type_int64 },
159
160  { "i0", &builtin_type_int64 },
161  { "i1", &builtin_type_int64 },
162  { "i2", &builtin_type_int64 },
163  { "i3", &builtin_type_int64 },
164  { "i4", &builtin_type_int64 },
165  { "i5", &builtin_type_int64 },
166  { "fp", &builtin_type_void_data_ptr },
167  { "i7", &builtin_type_int64 },
168
169  { "f0", &builtin_type_float },
170  { "f1", &builtin_type_float },
171  { "f2", &builtin_type_float },
172  { "f3", &builtin_type_float },
173  { "f4", &builtin_type_float },
174  { "f5", &builtin_type_float },
175  { "f6", &builtin_type_float },
176  { "f7", &builtin_type_float },
177  { "f8", &builtin_type_float },
178  { "f9", &builtin_type_float },
179  { "f10", &builtin_type_float },
180  { "f11", &builtin_type_float },
181  { "f12", &builtin_type_float },
182  { "f13", &builtin_type_float },
183  { "f14", &builtin_type_float },
184  { "f15", &builtin_type_float },
185  { "f16", &builtin_type_float },
186  { "f17", &builtin_type_float },
187  { "f18", &builtin_type_float },
188  { "f19", &builtin_type_float },
189  { "f20", &builtin_type_float },
190  { "f21", &builtin_type_float },
191  { "f22", &builtin_type_float },
192  { "f23", &builtin_type_float },
193  { "f24", &builtin_type_float },
194  { "f25", &builtin_type_float },
195  { "f26", &builtin_type_float },
196  { "f27", &builtin_type_float },
197  { "f28", &builtin_type_float },
198  { "f29", &builtin_type_float },
199  { "f30", &builtin_type_float },
200  { "f31", &builtin_type_float },
201  { "f32", &builtin_type_double },
202  { "f34", &builtin_type_double },
203  { "f36", &builtin_type_double },
204  { "f38", &builtin_type_double },
205  { "f40", &builtin_type_double },
206  { "f42", &builtin_type_double },
207  { "f44", &builtin_type_double },
208  { "f46", &builtin_type_double },
209  { "f48", &builtin_type_double },
210  { "f50", &builtin_type_double },
211  { "f52", &builtin_type_double },
212  { "f54", &builtin_type_double },
213  { "f56", &builtin_type_double },
214  { "f58", &builtin_type_double },
215  { "f60", &builtin_type_double },
216  { "f62", &builtin_type_double },
217
218  { "pc", &builtin_type_void_func_ptr },
219  { "npc", &builtin_type_void_func_ptr },
220
221  /* This raw register contains the contents of %cwp, %pstate, %asi
222     and %ccr as laid out in a %tstate register.  */
223  /* FIXME: Give it a name until we start using register groups.  */
224  { "state", &builtin_type_int64 },
225
226  { "fsr", &builtin_type_int64 },
227  { "fprs", &builtin_type_int64 },
228
229  /* "Although Y is a 64-bit register, its high-order 32 bits are
230     reserved and always read as 0."  */
231  { "y", &builtin_type_int64 }
232};
233
234/* Total number of registers.  */
235#define SPARC64_NUM_REGS ARRAY_SIZE (sparc64_register_info)
236
237/* We provide the aliases %d0..%d62 and %q0..%q60 for the floating
238   registers as "psuedo" registers.  */
239
240static struct sparc64_register_info sparc64_pseudo_register_info[] =
241{
242  { "cwp", &builtin_type_int64 },
243  { "pstate", &builtin_type_int64 },
244  { "asi", &builtin_type_int64 },
245  { "ccr", &builtin_type_int64 },
246
247  { "d0", &builtin_type_double },
248  { "d2", &builtin_type_double },
249  { "d4", &builtin_type_double },
250  { "d6", &builtin_type_double },
251  { "d8", &builtin_type_double },
252  { "d10", &builtin_type_double },
253  { "d12", &builtin_type_double },
254  { "d14", &builtin_type_double },
255  { "d16", &builtin_type_double },
256  { "d18", &builtin_type_double },
257  { "d20", &builtin_type_double },
258  { "d22", &builtin_type_double },
259  { "d24", &builtin_type_double },
260  { "d26", &builtin_type_double },
261  { "d28", &builtin_type_double },
262  { "d30", &builtin_type_double },
263  { "d32", &builtin_type_double },
264  { "d34", &builtin_type_double },
265  { "d36", &builtin_type_double },
266  { "d38", &builtin_type_double },
267  { "d40", &builtin_type_double },
268  { "d42", &builtin_type_double },
269  { "d44", &builtin_type_double },
270  { "d46", &builtin_type_double },
271  { "d48", &builtin_type_double },
272  { "d50", &builtin_type_double },
273  { "d52", &builtin_type_double },
274  { "d54", &builtin_type_double },
275  { "d56", &builtin_type_double },
276  { "d58", &builtin_type_double },
277  { "d60", &builtin_type_double },
278  { "d62", &builtin_type_double },
279
280  { "q0", &builtin_type_long_double },
281  { "q4", &builtin_type_long_double },
282  { "q8", &builtin_type_long_double },
283  { "q12", &builtin_type_long_double },
284  { "q16", &builtin_type_long_double },
285  { "q20", &builtin_type_long_double },
286  { "q24", &builtin_type_long_double },
287  { "q28", &builtin_type_long_double },
288  { "q32", &builtin_type_long_double },
289  { "q36", &builtin_type_long_double },
290  { "q40", &builtin_type_long_double },
291  { "q44", &builtin_type_long_double },
292  { "q48", &builtin_type_long_double },
293  { "q52", &builtin_type_long_double },
294  { "q56", &builtin_type_long_double },
295  { "q60", &builtin_type_long_double }
296};
297
298/* Total number of pseudo registers.  */
299#define SPARC64_NUM_PSEUDO_REGS ARRAY_SIZE (sparc64_pseudo_register_info)
300
301/* Return the name of register REGNUM.  */
302
303static const char *
304sparc64_register_name (int regnum)
305{
306  if (regnum >= 0 && regnum < SPARC64_NUM_REGS)
307    return sparc64_register_info[regnum].name;
308
309  if (regnum >= SPARC64_NUM_REGS
310      && regnum < SPARC64_NUM_REGS + SPARC64_NUM_PSEUDO_REGS)
311    return sparc64_pseudo_register_info[regnum - SPARC64_NUM_REGS].name;
312
313  return NULL;
314}
315
316/* Return the GDB type object for the "standard" data type of data in
317   register REGNUM. */
318
319static struct type *
320sparc64_register_type (struct gdbarch *gdbarch, int regnum)
321{
322  if (regnum >= SPARC64_NUM_REGS
323      && regnum < SPARC64_NUM_REGS + SPARC64_NUM_PSEUDO_REGS)
324    return *sparc64_pseudo_register_info[regnum - SPARC64_NUM_REGS].type;
325
326  gdb_assert (regnum >= 0 && regnum < SPARC64_NUM_REGS);
327  return *sparc64_register_info[regnum].type;
328}
329
330static void
331sparc64_pseudo_register_read (struct gdbarch *gdbarch,
332			      struct regcache *regcache,
333			      int regnum, void *buf)
334{
335  gdb_assert (regnum >= SPARC64_NUM_REGS);
336
337  if (regnum >= SPARC64_D0_REGNUM && regnum <= SPARC64_D30_REGNUM)
338    {
339      regnum = SPARC_F0_REGNUM + 2 * (regnum - SPARC64_D0_REGNUM);
340      regcache_raw_read (regcache, regnum, buf);
341      regcache_raw_read (regcache, regnum + 1, ((char *)buf) + 4);
342    }
343  else if (regnum >= SPARC64_D32_REGNUM && regnum <= SPARC64_D62_REGNUM)
344    {
345      regnum = SPARC64_F32_REGNUM + (regnum - SPARC64_D32_REGNUM);
346      regcache_raw_read (regcache, regnum, buf);
347    }
348  else if (regnum >= SPARC64_Q0_REGNUM && regnum <= SPARC64_Q28_REGNUM)
349    {
350      regnum = SPARC_F0_REGNUM + 4 * (regnum - SPARC64_Q0_REGNUM);
351      regcache_raw_read (regcache, regnum, buf);
352      regcache_raw_read (regcache, regnum + 1, ((char *)buf) + 4);
353      regcache_raw_read (regcache, regnum + 2, ((char *)buf) + 8);
354      regcache_raw_read (regcache, regnum + 3, ((char *)buf) + 12);
355    }
356  else if (regnum >= SPARC64_Q32_REGNUM && regnum <= SPARC64_Q60_REGNUM)
357    {
358      regnum = SPARC64_F32_REGNUM + 2 * (regnum - SPARC64_Q32_REGNUM);
359      regcache_raw_read (regcache, regnum, buf);
360      regcache_raw_read (regcache, regnum + 1, ((char *)buf) + 8);
361    }
362  else if (regnum == SPARC64_CWP_REGNUM
363	   || regnum == SPARC64_PSTATE_REGNUM
364	   || regnum == SPARC64_ASI_REGNUM
365	   || regnum == SPARC64_CCR_REGNUM)
366    {
367      ULONGEST state;
368
369      regcache_raw_read_unsigned (regcache, SPARC64_STATE_REGNUM, &state);
370      switch (regnum)
371	{
372	case SPARC64_CWP_REGNUM:
373	  state = (state >> 0) & ((1 << 5) - 1);
374	  break;
375	case SPARC64_PSTATE_REGNUM:
376	  state = (state >> 8) & ((1 << 12) - 1);
377	  break;
378	case SPARC64_ASI_REGNUM:
379	  state = (state >> 24) & ((1 << 8) - 1);
380	  break;
381	case SPARC64_CCR_REGNUM:
382	  state = (state >> 32) & ((1 << 8) - 1);
383	  break;
384	}
385      store_unsigned_integer (buf, 8, state);
386    }
387}
388
389static void
390sparc64_pseudo_register_write (struct gdbarch *gdbarch,
391			       struct regcache *regcache,
392			       int regnum, const void *buf)
393{
394  gdb_assert (regnum >= SPARC64_NUM_REGS);
395
396  if (regnum >= SPARC64_D0_REGNUM && regnum <= SPARC64_D30_REGNUM)
397    {
398      regnum = SPARC_F0_REGNUM + 2 * (regnum - SPARC64_D0_REGNUM);
399      regcache_raw_write (regcache, regnum, buf);
400      regcache_raw_write (regcache, regnum + 1, ((const char *)buf) + 4);
401    }
402  else if (regnum >= SPARC64_D32_REGNUM && regnum <= SPARC64_D62_REGNUM)
403    {
404      regnum = SPARC64_F32_REGNUM + (regnum - SPARC64_D32_REGNUM);
405      regcache_raw_write (regcache, regnum, buf);
406    }
407  else if (regnum >= SPARC64_Q0_REGNUM && regnum <= SPARC64_Q28_REGNUM)
408    {
409      regnum = SPARC_F0_REGNUM + 4 * (regnum - SPARC64_Q0_REGNUM);
410      regcache_raw_write (regcache, regnum, buf);
411      regcache_raw_write (regcache, regnum + 1, ((const char *)buf) + 4);
412      regcache_raw_write (regcache, regnum + 2, ((const char *)buf) + 8);
413      regcache_raw_write (regcache, regnum + 3, ((const char *)buf) + 12);
414    }
415  else if (regnum >= SPARC64_Q32_REGNUM && regnum <= SPARC64_Q60_REGNUM)
416    {
417      regnum = SPARC64_F32_REGNUM + 2 * (regnum - SPARC64_Q32_REGNUM);
418      regcache_raw_write (regcache, regnum, buf);
419      regcache_raw_write (regcache, regnum + 1, ((const char *)buf) + 8);
420    }
421  else if (regnum == SPARC64_CWP_REGNUM
422	   || regnum == SPARC64_PSTATE_REGNUM
423	   || regnum == SPARC64_ASI_REGNUM
424	   || regnum == SPARC64_CCR_REGNUM)
425    {
426      ULONGEST state, bits;
427
428      regcache_raw_read_unsigned (regcache, SPARC64_STATE_REGNUM, &state);
429      bits = extract_unsigned_integer (buf, 8);
430      switch (regnum)
431	{
432	case SPARC64_CWP_REGNUM:
433	  state |= ((bits & ((1 << 5) - 1)) << 0);
434	  break;
435	case SPARC64_PSTATE_REGNUM:
436	  state |= ((bits & ((1 << 12) - 1)) << 8);
437	  break;
438	case SPARC64_ASI_REGNUM:
439	  state |= ((bits & ((1 << 8) - 1)) << 24);
440	  break;
441	case SPARC64_CCR_REGNUM:
442	  state |= ((bits & ((1 << 8) - 1)) << 32);
443	  break;
444	}
445      regcache_raw_write_unsigned (regcache, SPARC64_STATE_REGNUM, state);
446    }
447}
448
449
450/* Return PC of first real instruction of the function starting at
451   START_PC.  */
452
453static CORE_ADDR
454sparc64_skip_prologue (CORE_ADDR start_pc)
455{
456  struct symtab_and_line sal;
457  CORE_ADDR func_start, func_end;
458  struct sparc_frame_cache cache;
459
460  /* This is the preferred method, find the end of the prologue by
461     using the debugging information.  */
462  if (find_pc_partial_function (start_pc, NULL, &func_start, &func_end))
463    {
464      sal = find_pc_line (func_start, 0);
465
466      if (sal.end < func_end
467	  && start_pc <= sal.end)
468	return sal.end;
469    }
470
471  return sparc_analyze_prologue (start_pc, 0xffffffffffffffffULL, &cache);
472}
473
474/* Normal frames.  */
475
476static struct sparc_frame_cache *
477sparc64_frame_cache (struct frame_info *next_frame, void **this_cache)
478{
479  return sparc_frame_cache (next_frame, this_cache);
480}
481
482static void
483sparc64_frame_this_id (struct frame_info *next_frame, void **this_cache,
484		       struct frame_id *this_id)
485{
486  struct sparc_frame_cache *cache =
487    sparc64_frame_cache (next_frame, this_cache);
488
489  /* This marks the outermost frame.  */
490  if (cache->base == 0)
491    return;
492
493  (*this_id) = frame_id_build (cache->base, cache->pc);
494}
495
496static void
497sparc64_frame_prev_register (struct frame_info *next_frame, void **this_cache,
498			     int regnum, int *optimizedp,
499			     enum lval_type *lvalp, CORE_ADDR *addrp,
500			     int *realnump, void *valuep)
501{
502  struct sparc_frame_cache *cache =
503    sparc64_frame_cache (next_frame, this_cache);
504
505  if (regnum == SPARC64_PC_REGNUM || regnum == SPARC64_NPC_REGNUM)
506    {
507      *optimizedp = 0;
508      *lvalp = not_lval;
509      *addrp = 0;
510      *realnump = -1;
511      if (valuep)
512	{
513	  CORE_ADDR pc = (regnum == SPARC64_NPC_REGNUM) ? 4 : 0;
514
515	  regnum = cache->frameless_p ? SPARC_O7_REGNUM : SPARC_I7_REGNUM;
516	  pc += frame_unwind_register_unsigned (next_frame, regnum) + 8;
517	  store_unsigned_integer (valuep, 8, pc);
518	}
519      return;
520    }
521
522  /* The previous frame's `local' and `in' registers have been saved
523     in the register save area.  */
524  if (!cache->frameless_p
525      && regnum >= SPARC_L0_REGNUM && regnum <= SPARC_I7_REGNUM)
526    {
527      *optimizedp = 0;
528      *lvalp = lval_memory;
529      *addrp = cache->base + BIAS + (regnum - SPARC_L0_REGNUM) * 8;
530      *realnump = -1;
531      if (valuep)
532	{
533	  struct gdbarch *gdbarch = get_frame_arch (next_frame);
534
535	  /* Read the value in from memory.  */
536	  read_memory (*addrp, valuep, register_size (gdbarch, regnum));
537	}
538      return;
539    }
540
541  /* The previous frame's `out' registers are accessable as the
542     current frame's `in' registers.  */
543  if (!cache->frameless_p
544      && regnum >= SPARC_O0_REGNUM && regnum <= SPARC_O7_REGNUM)
545    regnum += (SPARC_I0_REGNUM - SPARC_O0_REGNUM);
546
547  frame_register_unwind (next_frame, regnum,
548			 optimizedp, lvalp, addrp, realnump, valuep);
549}
550
551static const struct frame_unwind sparc64_frame_unwind =
552{
553  NORMAL_FRAME,
554  sparc64_frame_this_id,
555  sparc64_frame_prev_register
556};
557
558static const struct frame_unwind *
559sparc64_frame_sniffer (struct frame_info *next_frame)
560{
561  return &sparc64_frame_unwind;
562}
563
564
565static CORE_ADDR
566sparc64_frame_base_address (struct frame_info *next_frame, void **this_cache)
567{
568  struct sparc_frame_cache *cache =
569    sparc64_frame_cache (next_frame, this_cache);
570
571  return cache->base + BIAS;
572}
573
574static const struct frame_base sparc64_frame_base =
575{
576  &sparc64_frame_unwind,
577  sparc64_frame_base_address,
578  sparc64_frame_base_address,
579  sparc64_frame_base_address
580};
581
582/* Check whether TYPE must be 16-byte aligned.  */
583
584static int
585sparc64_16_byte_align_p (struct type *type)
586{
587  if (sparc64_floating_p (type) && TYPE_LENGTH (type) == 16)
588    return 1;
589
590  if (sparc64_structure_or_union_p (type))
591    {
592      int i;
593
594      for (i = 0; i < TYPE_NFIELDS (type); i++)
595	{
596	  struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, i));
597
598	  if (sparc64_16_byte_align_p (subtype))
599	    return 1;
600	}
601    }
602
603  return 0;
604}
605
606/* Store floating fields of element ELEMENT of an "parameter array"
607   that has type TYPE and is stored at BITPOS in VALBUF in the
608   apropriate registers of REGCACHE.  This function can be called
609   recursively and therefore handles floating types in addition to
610   structures.  */
611
612static void
613sparc64_store_floating_fields (struct regcache *regcache, struct type *type,
614			       char *valbuf, int element, int bitpos)
615{
616  gdb_assert (element < 16);
617
618  if (sparc64_floating_p (type))
619    {
620      int len = TYPE_LENGTH (type);
621      int regnum;
622
623      if (len == 16)
624	{
625	  gdb_assert (bitpos == 0);
626	  gdb_assert ((element % 2) == 0);
627
628	  regnum = SPARC64_Q0_REGNUM + element / 2;
629	  regcache_cooked_write (regcache, regnum, valbuf);
630	}
631      else if (len == 8)
632	{
633	  gdb_assert (bitpos == 0 || bitpos == 64);
634
635	  regnum = SPARC64_D0_REGNUM + element + bitpos / 64;
636	  regcache_cooked_write (regcache, regnum, valbuf + (bitpos / 8));
637	}
638      else
639	{
640	  gdb_assert (len == 4);
641	  gdb_assert (bitpos % 32 == 0 && bitpos >= 0 && bitpos < 128);
642
643	  regnum = SPARC_F0_REGNUM + element * 2 + bitpos / 32;
644	  regcache_cooked_write (regcache, regnum, valbuf + (bitpos / 8));
645	}
646    }
647  else if (sparc64_structure_or_union_p (type))
648    {
649      int i;
650
651      for (i = 0; i < TYPE_NFIELDS (type); i++)
652	{
653	  struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, i));
654	  int subpos = bitpos + TYPE_FIELD_BITPOS (type, i);
655
656	  sparc64_store_floating_fields (regcache, subtype, valbuf,
657					 element, subpos);
658	}
659
660      /* GCC has an interesting bug.  If TYPE is a structure that has
661         a single `float' member, GCC doesn't treat it as a structure
662         at all, but rather as an ordinary `float' argument.  This
663         argument will be stored in %f1, as required by the psABI.
664         However, as a member of a structure the psABI requires it to
665         be stored in %f0.  This bug is present in GCC 3.3.2, but
666         probably in older releases to.  To appease GCC, if a
667         structure has only a single `float' member, we store its
668         value in %f1 too (we already have stored in %f0).  */
669      if (TYPE_NFIELDS (type) == 1)
670	{
671	  struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, 0));
672
673	  if (sparc64_floating_p (subtype) && TYPE_LENGTH (subtype) == 4)
674	    regcache_cooked_write (regcache, SPARC_F1_REGNUM, valbuf);
675	}
676    }
677}
678
679/* Fetch floating fields from a variable of type TYPE from the
680   appropriate registers for BITPOS in REGCACHE and store it at BITPOS
681   in VALBUF.  This function can be called recursively and therefore
682   handles floating types in addition to structures.  */
683
684static void
685sparc64_extract_floating_fields (struct regcache *regcache, struct type *type,
686				 char *valbuf, int bitpos)
687{
688  if (sparc64_floating_p (type))
689    {
690      int len = TYPE_LENGTH (type);
691      int regnum;
692
693      if (len == 16)
694	{
695	  gdb_assert (bitpos == 0 || bitpos == 128);
696
697	  regnum = SPARC64_Q0_REGNUM + bitpos / 128;
698	  regcache_cooked_read (regcache, regnum, valbuf + (bitpos / 8));
699	}
700      else if (len == 8)
701	{
702	  gdb_assert (bitpos % 64 == 0 && bitpos >= 0 && bitpos < 256);
703
704	  regnum = SPARC64_D0_REGNUM + bitpos / 64;
705	  regcache_cooked_read (regcache, regnum, valbuf + (bitpos / 8));
706	}
707      else
708	{
709	  gdb_assert (len == 4);
710	  gdb_assert (bitpos % 32 == 0 && bitpos >= 0 && bitpos < 256);
711
712	  regnum = SPARC_F0_REGNUM + bitpos / 32;
713	  regcache_cooked_read (regcache, regnum, valbuf + (bitpos / 8));
714	}
715    }
716  else if (sparc64_structure_or_union_p (type))
717    {
718      int i;
719
720      for (i = 0; i < TYPE_NFIELDS (type); i++)
721	{
722	  struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, i));
723	  int subpos = bitpos + TYPE_FIELD_BITPOS (type, i);
724
725	  sparc64_extract_floating_fields (regcache, subtype, valbuf, subpos);
726	}
727    }
728}
729
730/* Store the NARGS arguments ARGS and STRUCT_ADDR (if STRUCT_RETURN is
731   non-zero) in REGCACHE and on the stack (starting from address SP).  */
732
733static CORE_ADDR
734sparc64_store_arguments (struct regcache *regcache, int nargs,
735			 struct value **args, CORE_ADDR sp,
736			 int struct_return, CORE_ADDR struct_addr)
737{
738  /* Number of extended words in the "parameter array".  */
739  int num_elements = 0;
740  int element = 0;
741  int i;
742
743  /* Take BIAS into account.  */
744  sp += BIAS;
745
746  /* First we calculate the number of extended words in the "parameter
747     array".  While doing so we also convert some of the arguments.  */
748
749  if (struct_return)
750    num_elements++;
751
752  for (i = 0; i < nargs; i++)
753    {
754      struct type *type = VALUE_TYPE (args[i]);
755      int len = TYPE_LENGTH (type);
756
757      if (sparc64_structure_or_union_p (type))
758	{
759	  /* Structure or Union arguments.  */
760	  if (len <= 16)
761	    {
762	      if (num_elements % 2 && sparc64_16_byte_align_p (type))
763		num_elements++;
764	      num_elements += ((len + 7) / 8);
765	    }
766	  else
767	    {
768	      /* The psABI says that "Structures or unions larger than
769		 sixteen bytes are copied by the caller and passed
770		 indirectly; the caller will pass the address of a
771		 correctly aligned structure value.  This sixty-four
772		 bit address will occupy one word in the parameter
773		 array, and may be promoted to an %o register like any
774		 other pointer value."  Allocate memory for these
775		 values on the stack.  */
776	      sp -= len;
777
778	      /* Use 16-byte alignment for these values.  That's
779                 always correct, and wasting a few bytes shouldn't be
780                 a problem.  */
781	      sp &= ~0xf;
782
783	      write_memory (sp, VALUE_CONTENTS (args[i]), len);
784	      args[i] = value_from_pointer (lookup_pointer_type (type), sp);
785	      num_elements++;
786	    }
787	}
788      else if (sparc64_floating_p (type))
789	{
790	  /* Floating arguments.  */
791
792	  if (len == 16)
793	    {
794	      /* The psABI says that "Each quad-precision parameter
795                 value will be assigned to two extended words in the
796                 parameter array.  */
797	      num_elements += 2;
798
799	      /* The psABI says that "Long doubles must be
800                 quad-aligned, and thus a hole might be introduced
801                 into the parameter array to force alignment."  Skip
802                 an element if necessary.  */
803	      if (num_elements % 2)
804		num_elements++;
805	    }
806	  else
807	    num_elements++;
808	}
809      else
810	{
811	  /* Integral and pointer arguments.  */
812	  gdb_assert (sparc64_integral_or_pointer_p (type));
813
814	  /* The psABI says that "Each argument value of integral type
815	     smaller than an extended word will be widened by the
816	     caller to an extended word according to the signed-ness
817	     of the argument type."  */
818	  if (len < 8)
819	    args[i] = value_cast (builtin_type_int64, args[i]);
820	  num_elements++;
821	}
822    }
823
824  /* Allocate the "parameter array".  */
825  sp -= num_elements * 8;
826
827  /* The psABI says that "Every stack frame must be 16-byte aligned."  */
828  sp &= ~0xf;
829
830  /* Now we store the arguments in to the "paramater array".  Some
831     Integer or Pointer arguments and Structure or Union arguments
832     will be passed in %o registers.  Some Floating arguments and
833     floating members of structures are passed in floating-point
834     registers.  However, for functions with variable arguments,
835     floating arguments are stored in an %0 register, and for
836     functions without a prototype floating arguments are stored in
837     both a floating-point and an %o registers, or a floating-point
838     register and memory.  To simplify the logic here we always pass
839     arguments in memory, an %o register, and a floating-point
840     register if appropriate.  This should be no problem since the
841     contents of any unused memory or registers in the "parameter
842     array" are undefined.  */
843
844  if (struct_return)
845    {
846      regcache_cooked_write_unsigned (regcache, SPARC_O0_REGNUM, struct_addr);
847      element++;
848    }
849
850  for (i = 0; i < nargs; i++)
851    {
852      char *valbuf = VALUE_CONTENTS (args[i]);
853      struct type *type = VALUE_TYPE (args[i]);
854      int len = TYPE_LENGTH (type);
855      int regnum = -1;
856      char buf[16];
857
858      if (sparc64_structure_or_union_p (type))
859	{
860	  /* Structure or Union arguments.  */
861	  gdb_assert (len <= 16);
862	  memset (buf, 0, sizeof (buf));
863	  valbuf = memcpy (buf, valbuf, len);
864
865	  if (element % 2 && sparc64_16_byte_align_p (type))
866	    element++;
867
868	  if (element < 6)
869	    {
870	      regnum = SPARC_O0_REGNUM + element;
871	      if (len > 8 && element < 5)
872		regcache_cooked_write (regcache, regnum + 1, valbuf + 8);
873	    }
874
875	  if (element < 16)
876	    sparc64_store_floating_fields (regcache, type, valbuf, element, 0);
877	}
878      else if (sparc64_floating_p (type))
879	{
880	  /* Floating arguments.  */
881	  if (len == 16)
882	    {
883	      if (element % 2)
884		element++;
885	      if (element < 16)
886		regnum = SPARC64_Q0_REGNUM + element / 2;
887	    }
888	  else if (len == 8)
889	    {
890	      if (element < 16)
891		regnum = SPARC64_D0_REGNUM + element;
892	    }
893	  else
894	    {
895	      /* The psABI says "Each single-precision parameter value
896                 will be assigned to one extended word in the
897                 parameter array, and right-justified within that
898                 word; the left half (even floatregister) is
899                 undefined."  Even though the psABI says that "the
900                 left half is undefined", set it to zero here.  */
901	      memset (buf, 0, 4);
902	      memcpy (buf + 4, valbuf, 4);
903	      valbuf = buf;
904	      len = 8;
905	      if (element < 16)
906		regnum = SPARC64_D0_REGNUM + element;
907	    }
908	}
909      else
910	{
911	  /* Integral and pointer arguments.  */
912	  gdb_assert (len == 8);
913	  if (element < 6)
914	    regnum = SPARC_O0_REGNUM + element;
915	}
916
917      if (regnum != -1)
918	{
919	  regcache_cooked_write (regcache, regnum, valbuf);
920
921	  /* If we're storing the value in a floating-point register,
922             also store it in the corresponding %0 register(s).  */
923	  if (regnum >= SPARC64_D0_REGNUM && regnum <= SPARC64_D10_REGNUM)
924	    {
925	      gdb_assert (element < 6);
926	      regnum = SPARC_O0_REGNUM + element;
927	      regcache_cooked_write (regcache, regnum, valbuf);
928	    }
929	  else if (regnum >= SPARC64_Q0_REGNUM && regnum <= SPARC64_Q8_REGNUM)
930	    {
931	      gdb_assert (element < 6);
932	      regnum = SPARC_O0_REGNUM + element;
933	      regcache_cooked_write (regcache, regnum, valbuf);
934	      regcache_cooked_write (regcache, regnum + 1, valbuf + 8);
935	    }
936	}
937
938      /* Always store the argument in memeory.  */
939      write_memory (sp + element * 8, valbuf, len);
940      element += ((len + 7) / 8);
941    }
942
943  gdb_assert (element == num_elements);
944
945  /* Take BIAS into account.  */
946  sp -= BIAS;
947  return sp;
948}
949
950static CORE_ADDR
951sparc64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
952			 struct regcache *regcache, CORE_ADDR bp_addr,
953			 int nargs, struct value **args, CORE_ADDR sp,
954			 int struct_return, CORE_ADDR struct_addr)
955{
956  /* Set return address.  */
957  regcache_cooked_write_unsigned (regcache, SPARC_O7_REGNUM, bp_addr - 8);
958
959  /* Set up function arguments.  */
960  sp = sparc64_store_arguments (regcache, nargs, args, sp,
961				struct_return, struct_addr);
962
963  /* Allocate the register save area.  */
964  sp -= 16 * 8;
965
966  /* Stack should be 16-byte aligned at this point.  */
967  gdb_assert ((sp + BIAS) % 16 == 0);
968
969  /* Finally, update the stack pointer.  */
970  regcache_cooked_write_unsigned (regcache, SPARC_SP_REGNUM, sp);
971
972  return sp;
973}
974
975
976/* Extract from an array REGBUF containing the (raw) register state, a
977   function return value of TYPE, and copy that into VALBUF.  */
978
979static void
980sparc64_extract_return_value (struct type *type, struct regcache *regcache,
981			      void *valbuf)
982{
983  int len = TYPE_LENGTH (type);
984  char buf[32];
985  int i;
986
987  if (sparc64_structure_or_union_p (type))
988    {
989      /* Structure or Union return values.  */
990      gdb_assert (len <= 32);
991
992      for (i = 0; i < ((len + 7) / 8); i++)
993	regcache_cooked_read (regcache, SPARC_O0_REGNUM + i, buf + i * 8);
994      if (TYPE_CODE (type) != TYPE_CODE_UNION)
995	sparc64_extract_floating_fields (regcache, type, buf, 0);
996      memcpy (valbuf, buf, len);
997    }
998  else if (sparc64_floating_p (type))
999    {
1000      /* Floating return values.  */
1001      for (i = 0; i < len / 4; i++)
1002	regcache_cooked_read (regcache, SPARC_F0_REGNUM + i, buf + i * 4);
1003      memcpy (valbuf, buf, len);
1004    }
1005  else
1006    {
1007      /* Integral and pointer return values.  */
1008      gdb_assert (sparc64_integral_or_pointer_p (type));
1009
1010      /* Just stripping off any unused bytes should preserve the
1011         signed-ness just fine.  */
1012      regcache_cooked_read (regcache, SPARC_O0_REGNUM, buf);
1013      memcpy (valbuf, buf + 8 - len, len);
1014    }
1015}
1016
1017/* Write into the appropriate registers a function return value stored
1018   in VALBUF of type TYPE.  */
1019
1020static void
1021sparc64_store_return_value (struct type *type, struct regcache *regcache,
1022			    const void *valbuf)
1023{
1024  int len = TYPE_LENGTH (type);
1025  char buf[16];
1026  int i;
1027
1028  if (sparc64_structure_or_union_p (type))
1029    {
1030      /* Structure or Union return values.  */
1031      gdb_assert (len <= 32);
1032
1033      /* Simplify matters by storing the complete value (including
1034         floating members) into %o0 and %o1.  Floating members are
1035         also store in the appropriate floating-point registers.  */
1036      memset (buf, 0, sizeof (buf));
1037      memcpy (buf, valbuf, len);
1038      for (i = 0; i < ((len + 7) / 8); i++)
1039	regcache_cooked_write (regcache, SPARC_O0_REGNUM + i, buf + i * 8);
1040      if (TYPE_CODE (type) != TYPE_CODE_UNION)
1041	sparc64_store_floating_fields (regcache, type, buf, 0, 0);
1042    }
1043  else if (sparc64_floating_p (type))
1044    {
1045      /* Floating return values.  */
1046      memcpy (buf, valbuf, len);
1047      for (i = 0; i < len / 4; i++)
1048	regcache_cooked_write (regcache, SPARC_F0_REGNUM + i, buf + i * 4);
1049    }
1050  else
1051    {
1052      /* Integral and pointer return values.  */
1053      gdb_assert (sparc64_integral_or_pointer_p (type));
1054
1055      /* ??? Do we need to do any sign-extension here?  */
1056      memset (buf, 0, 8);
1057      memcpy (buf + 8 - len, valbuf, len);
1058      regcache_cooked_write (regcache, SPARC_O0_REGNUM, buf);
1059    }
1060}
1061
1062static enum return_value_convention
1063sparc64_return_value (struct gdbarch *gdbarch, struct type *type,
1064		      struct regcache *regcache, void *readbuf,
1065		      const void *writebuf)
1066{
1067  if (TYPE_LENGTH (type) > 32)
1068    return RETURN_VALUE_STRUCT_CONVENTION;
1069
1070  if (readbuf)
1071    sparc64_extract_return_value (type, regcache, readbuf);
1072  if (writebuf)
1073    sparc64_store_return_value (type, regcache, writebuf);
1074
1075  return RETURN_VALUE_REGISTER_CONVENTION;
1076}
1077
1078
1079void
1080sparc64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
1081{
1082  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1083
1084  tdep->pc_regnum = SPARC64_PC_REGNUM;
1085  tdep->npc_regnum = SPARC64_NPC_REGNUM;
1086
1087  /* This is what all the fuss is about.  */
1088  set_gdbarch_long_bit (gdbarch, 64);
1089  set_gdbarch_long_long_bit (gdbarch, 64);
1090  set_gdbarch_ptr_bit (gdbarch, 64);
1091
1092  set_gdbarch_num_regs (gdbarch, SPARC64_NUM_REGS);
1093  set_gdbarch_register_name (gdbarch, sparc64_register_name);
1094  set_gdbarch_register_type (gdbarch, sparc64_register_type);
1095  set_gdbarch_num_pseudo_regs (gdbarch, SPARC64_NUM_PSEUDO_REGS);
1096  set_gdbarch_pseudo_register_read (gdbarch, sparc64_pseudo_register_read);
1097  set_gdbarch_pseudo_register_write (gdbarch, sparc64_pseudo_register_write);
1098
1099  /* Register numbers of various important registers.  */
1100  set_gdbarch_pc_regnum (gdbarch, SPARC64_PC_REGNUM); /* %pc */
1101
1102  /* Call dummy code.  */
1103  set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
1104  set_gdbarch_push_dummy_code (gdbarch, NULL);
1105  set_gdbarch_push_dummy_call (gdbarch, sparc64_push_dummy_call);
1106
1107  set_gdbarch_return_value (gdbarch, sparc64_return_value);
1108  set_gdbarch_stabs_argument_has_addr
1109    (gdbarch, default_stabs_argument_has_addr);
1110
1111  set_gdbarch_skip_prologue (gdbarch, sparc64_skip_prologue);
1112
1113  frame_unwind_append_sniffer (gdbarch, sparc64_frame_sniffer);
1114  frame_base_set_default (gdbarch, &sparc64_frame_base);
1115}
1116
1117
1118/* Helper functions for dealing with register sets.  */
1119
1120#define TSTATE_CWP	0x000000000000001fULL
1121#define TSTATE_ICC	0x0000000f00000000ULL
1122#define TSTATE_XCC	0x000000f000000000ULL
1123
1124#define PSR_S		0x00000080
1125#define PSR_ICC		0x00f00000
1126#define PSR_VERS	0x0f000000
1127#define PSR_IMPL	0xf0000000
1128#define PSR_V8PLUS	0xff000000
1129#define PSR_XCC		0x000f0000
1130
1131void
1132sparc64_supply_gregset (const struct sparc_gregset *gregset,
1133			struct regcache *regcache,
1134			int regnum, const void *gregs)
1135{
1136  int sparc32 = (gdbarch_ptr_bit (current_gdbarch) == 32);
1137  const char *regs = gregs;
1138  int i;
1139
1140  if (sparc32)
1141    {
1142      if (regnum == SPARC32_PSR_REGNUM || regnum == -1)
1143	{
1144	  int offset = gregset->r_tstate_offset;
1145	  ULONGEST tstate, psr;
1146	  char buf[4];
1147
1148	  tstate = extract_unsigned_integer (regs + offset, 8);
1149	  psr = ((tstate & TSTATE_CWP) | PSR_S | ((tstate & TSTATE_ICC) >> 12)
1150		 | ((tstate & TSTATE_XCC) >> 20) | PSR_V8PLUS);
1151	  store_unsigned_integer (buf, 4, psr);
1152	  regcache_raw_supply (regcache, SPARC32_PSR_REGNUM, buf);
1153	}
1154
1155      if (regnum == SPARC32_PC_REGNUM || regnum == -1)
1156	regcache_raw_supply (regcache, SPARC32_PC_REGNUM,
1157			     regs + gregset->r_pc_offset + 4);
1158
1159      if (regnum == SPARC32_NPC_REGNUM || regnum == -1)
1160	regcache_raw_supply (regcache, SPARC32_NPC_REGNUM,
1161			     regs + gregset->r_npc_offset + 4);
1162
1163      if (regnum == SPARC32_Y_REGNUM || regnum == -1)
1164	{
1165	  int offset = gregset->r_y_offset + 8 - gregset->r_y_size;
1166	  regcache_raw_supply (regcache, SPARC32_Y_REGNUM, regs + offset);
1167	}
1168    }
1169  else
1170    {
1171      if (regnum == SPARC64_STATE_REGNUM || regnum == -1)
1172	regcache_raw_supply (regcache, SPARC64_STATE_REGNUM,
1173			     regs + gregset->r_tstate_offset);
1174
1175      if (regnum == SPARC64_PC_REGNUM || regnum == -1)
1176	regcache_raw_supply (regcache, SPARC64_PC_REGNUM,
1177			     regs + gregset->r_pc_offset);
1178
1179      if (regnum == SPARC64_NPC_REGNUM || regnum == -1)
1180	regcache_raw_supply (regcache, SPARC64_NPC_REGNUM,
1181			     regs + gregset->r_npc_offset);
1182
1183      if (regnum == SPARC64_Y_REGNUM || regnum == -1)
1184	{
1185	  char buf[8];
1186
1187	  memset (buf, 0, 8);
1188	  memcpy (buf + 8 - gregset->r_y_size,
1189		  regs + gregset->r_y_offset, gregset->r_y_size);
1190	  regcache_raw_supply (regcache, SPARC64_Y_REGNUM, buf);
1191	}
1192
1193      if ((regnum == SPARC64_FPRS_REGNUM || regnum == -1)
1194	  && gregset->r_fprs_offset != -1)
1195	regcache_raw_supply (regcache, SPARC64_FPRS_REGNUM,
1196			     regs + gregset->r_fprs_offset);
1197    }
1198
1199  if (regnum == SPARC_G0_REGNUM || regnum == -1)
1200    regcache_raw_supply (regcache, SPARC_G0_REGNUM, NULL);
1201
1202  if ((regnum >= SPARC_G1_REGNUM && regnum <= SPARC_O7_REGNUM) || regnum == -1)
1203    {
1204      int offset = gregset->r_g1_offset;
1205
1206      if (sparc32)
1207	offset += 4;
1208
1209      for (i = SPARC_G1_REGNUM; i <= SPARC_O7_REGNUM; i++)
1210	{
1211	  if (regnum == i || regnum == -1)
1212	    regcache_raw_supply (regcache, i, regs + offset);
1213	  offset += 8;
1214	}
1215    }
1216
1217  if ((regnum >= SPARC_L0_REGNUM && regnum <= SPARC_I7_REGNUM) || regnum == -1)
1218    {
1219      /* Not all of the register set variants include Locals and
1220         Inputs.  For those that don't, we read them off the stack.  */
1221      if (gregset->r_l0_offset == -1)
1222	{
1223	  ULONGEST sp;
1224
1225	  regcache_cooked_read_unsigned (regcache, SPARC_SP_REGNUM, &sp);
1226	  sparc_supply_rwindow (regcache, sp, regnum);
1227	}
1228      else
1229	{
1230	  int offset = gregset->r_l0_offset;
1231
1232	  if (sparc32)
1233	    offset += 4;
1234
1235	  for (i = SPARC_L0_REGNUM; i <= SPARC_I7_REGNUM; i++)
1236	    {
1237	      if (regnum == i || regnum == -1)
1238		regcache_raw_supply (regcache, i, regs + offset);
1239	      offset += 8;
1240	    }
1241	}
1242    }
1243}
1244
1245void
1246sparc64_collect_gregset (const struct sparc_gregset *gregset,
1247			 const struct regcache *regcache,
1248			 int regnum, void *gregs)
1249{
1250  int sparc32 = (gdbarch_ptr_bit (current_gdbarch) == 32);
1251  char *regs = gregs;
1252  int i;
1253
1254  if (sparc32)
1255    {
1256      if (regnum == SPARC32_PSR_REGNUM || regnum == -1)
1257	{
1258	  int offset = gregset->r_tstate_offset;
1259	  ULONGEST tstate, psr;
1260	  char buf[8];
1261
1262	  tstate = extract_unsigned_integer (regs + offset, 8);
1263	  regcache_raw_collect (regcache, SPARC32_PSR_REGNUM, buf);
1264	  psr = extract_unsigned_integer (buf, 4);
1265	  tstate |= (psr & PSR_ICC) << 12;
1266	  if ((psr & (PSR_VERS | PSR_IMPL)) == PSR_V8PLUS)
1267	    tstate |= (psr & PSR_XCC) << 20;
1268	  store_unsigned_integer (buf, 8, tstate);
1269	  memcpy (regs + offset, buf, 8);
1270	}
1271
1272      if (regnum == SPARC32_PC_REGNUM || regnum == -1)
1273	regcache_raw_collect (regcache, SPARC32_PC_REGNUM,
1274			      regs + gregset->r_pc_offset + 4);
1275
1276      if (regnum == SPARC32_NPC_REGNUM || regnum == -1)
1277	regcache_raw_collect (regcache, SPARC32_NPC_REGNUM,
1278			      regs + gregset->r_npc_offset + 4);
1279
1280      if (regnum == SPARC32_Y_REGNUM || regnum == -1)
1281	{
1282	  int offset = gregset->r_y_offset + 8 - gregset->r_y_size;
1283	  regcache_raw_collect (regcache, SPARC32_Y_REGNUM, regs + offset);
1284	}
1285    }
1286  else
1287    {
1288      if (regnum == SPARC64_STATE_REGNUM || regnum == -1)
1289	regcache_raw_collect (regcache, SPARC64_STATE_REGNUM,
1290			      regs + gregset->r_tstate_offset);
1291
1292      if (regnum == SPARC64_PC_REGNUM || regnum == -1)
1293	regcache_raw_collect (regcache, SPARC64_PC_REGNUM,
1294			      regs + gregset->r_pc_offset);
1295
1296      if (regnum == SPARC64_NPC_REGNUM || regnum == -1)
1297	regcache_raw_collect (regcache, SPARC64_NPC_REGNUM,
1298			      regs + gregset->r_npc_offset);
1299
1300      if (regnum == SPARC64_Y_REGNUM || regnum == -1)
1301	{
1302	  char buf[8];
1303
1304	  regcache_raw_collect (regcache, SPARC64_Y_REGNUM, buf);
1305	  memcpy (regs + gregset->r_y_offset,
1306		  buf + 8 - gregset->r_y_size, gregset->r_y_size);
1307	}
1308
1309      if ((regnum == SPARC64_FPRS_REGNUM || regnum == -1)
1310	  && gregset->r_fprs_offset != -1)
1311	regcache_raw_collect (regcache, SPARC64_FPRS_REGNUM,
1312			      regs + gregset->r_fprs_offset);
1313
1314    }
1315
1316  if ((regnum >= SPARC_G1_REGNUM && regnum <= SPARC_O7_REGNUM) || regnum == -1)
1317    {
1318      int offset = gregset->r_g1_offset;
1319
1320      if (sparc32)
1321	offset += 4;
1322
1323      /* %g0 is always zero.  */
1324      for (i = SPARC_G1_REGNUM; i <= SPARC_O7_REGNUM; i++)
1325	{
1326	  if (regnum == i || regnum == -1)
1327	    regcache_raw_collect (regcache, i, regs + offset);
1328	  offset += 8;
1329	}
1330    }
1331
1332  if ((regnum >= SPARC_L0_REGNUM && regnum <= SPARC_I7_REGNUM) || regnum == -1)
1333    {
1334      /* Not all of the register set variants include Locals and
1335         Inputs.  For those that don't, we read them off the stack.  */
1336      if (gregset->r_l0_offset != -1)
1337	{
1338	  int offset = gregset->r_l0_offset;
1339
1340	  if (sparc32)
1341	    offset += 4;
1342
1343	  for (i = SPARC_L0_REGNUM; i <= SPARC_I7_REGNUM; i++)
1344	    {
1345	      if (regnum == i || regnum == -1)
1346		regcache_raw_collect (regcache, i, regs + offset);
1347	      offset += 8;
1348	    }
1349	}
1350    }
1351}
1352
1353void
1354sparc64_supply_fpregset (struct regcache *regcache,
1355			 int regnum, const void *fpregs)
1356{
1357  int sparc32 = (gdbarch_ptr_bit (current_gdbarch) == 32);
1358  const char *regs = fpregs;
1359  int i;
1360
1361  for (i = 0; i < 32; i++)
1362    {
1363      if (regnum == (SPARC_F0_REGNUM + i) || regnum == -1)
1364	regcache_raw_supply (regcache, SPARC_F0_REGNUM + i, regs + (i * 4));
1365    }
1366
1367  if (sparc32)
1368    {
1369      if (regnum == SPARC32_FSR_REGNUM || regnum == -1)
1370	regcache_raw_supply (regcache, SPARC32_FSR_REGNUM,
1371			     regs + (32 * 4) + (16 * 8) + 4);
1372    }
1373  else
1374    {
1375      for (i = 0; i < 16; i++)
1376	{
1377	  if (regnum == (SPARC64_F32_REGNUM + i) || regnum == -1)
1378	    regcache_raw_supply (regcache, SPARC64_F32_REGNUM + i,
1379				 regs + (32 * 4) + (i * 8));
1380	}
1381
1382      if (regnum == SPARC64_FSR_REGNUM || regnum == -1)
1383	regcache_raw_supply (regcache, SPARC64_FSR_REGNUM,
1384			     regs + (32 * 4) + (16 * 8));
1385    }
1386}
1387
1388void
1389sparc64_collect_fpregset (const struct regcache *regcache,
1390			  int regnum, void *fpregs)
1391{
1392  int sparc32 = (gdbarch_ptr_bit (current_gdbarch) == 32);
1393  char *regs = fpregs;
1394  int i;
1395
1396  for (i = 0; i < 32; i++)
1397    {
1398      if (regnum == (SPARC_F0_REGNUM + i) || regnum == -1)
1399	regcache_raw_collect (regcache, SPARC_F0_REGNUM + i, regs + (i * 4));
1400    }
1401
1402  if (sparc32)
1403    {
1404      if (regnum == SPARC32_FSR_REGNUM || regnum == -1)
1405	regcache_raw_collect (regcache, SPARC32_FSR_REGNUM,
1406			      regs + (32 * 4) + (16 * 8) + 4);
1407    }
1408  else
1409    {
1410      for (i = 0; i < 16; i++)
1411	{
1412	  if (regnum == (SPARC64_F32_REGNUM + i) || regnum == -1)
1413	    regcache_raw_collect (regcache, SPARC64_F32_REGNUM + i,
1414				  regs + (32 * 4) + (i * 8));
1415	}
1416
1417      if (regnum == SPARC64_FSR_REGNUM || regnum == -1)
1418	regcache_raw_collect (regcache, SPARC64_FSR_REGNUM,
1419			      regs + (32 * 4) + (16 * 8));
1420    }
1421}
1422