1/* Target-dependent code for the Motorola 88000 series. 2 3 Copyright 2004 Free Software Foundation, Inc. 4 5 This file is part of GDB. 6 7 This program is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 2 of the License, or 10 (at your option) any later version. 11 12 This program is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with this program; if not, write to the Free Software 19 Foundation, Inc., 59 Temple Place - Suite 330, 20 Boston, MA 02111-1307, USA. */ 21 22#include "defs.h" 23#include "arch-utils.h" 24#include "dis-asm.h" 25#include "frame.h" 26#include "frame-base.h" 27#include "frame-unwind.h" 28#include "gdbcore.h" 29#include "gdbtypes.h" 30#include "regcache.h" 31#include "regset.h" 32#include "symtab.h" 33#include "trad-frame.h" 34#include "value.h" 35 36#include "gdb_assert.h" 37#include "gdb_string.h" 38 39#include "m88k-tdep.h" 40 41/* Fetch the instruction at PC. */ 42 43static unsigned long 44m88k_fetch_instruction (CORE_ADDR pc) 45{ 46 return read_memory_unsigned_integer (pc, 4); 47} 48 49/* Register information. */ 50 51/* Return the name of register REGNUM. */ 52 53static const char * 54m88k_register_name (int regnum) 55{ 56 static char *register_names[] = 57 { 58 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 59 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 60 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 61 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 62 "epsr", "fpsr", "fpcr", "sxip", "snip", "sfip" 63 }; 64 65 if (regnum >= 0 && regnum < ARRAY_SIZE (register_names)) 66 return register_names[regnum]; 67 68 return NULL; 69} 70 71/* Return the GDB type object for the "standard" data type of data in 72 register REGNUM. */ 73 74static struct type * 75m88k_register_type (struct gdbarch *gdbarch, int regnum) 76{ 77 /* SXIP, SNIP, SFIP and R1 contain code addresses. */ 78 if ((regnum >= M88K_SXIP_REGNUM && regnum <= M88K_SFIP_REGNUM) 79 || regnum == M88K_R1_REGNUM) 80 return builtin_type_void_func_ptr; 81 82 /* R30 and R31 typically contains data addresses. */ 83 if (regnum == M88K_R30_REGNUM || regnum == M88K_R31_REGNUM) 84 return builtin_type_void_data_ptr; 85 86 return builtin_type_int32; 87} 88 89 90static CORE_ADDR 91m88k_addr_bits_remove (CORE_ADDR addr) 92{ 93 /* All instructures are 4-byte aligned. The lower 2 bits of SXIP, 94 SNIP and SFIP are used for special purposes: bit 0 is the 95 exception bit and bit 1 is the valid bit. */ 96 return addr & ~0x3; 97} 98 99/* Use the program counter to determine the contents and size of a 100 breakpoint instruction. Return a pointer to a string of bytes that 101 encode a breakpoint instruction, store the length of the string in 102 *LEN and optionally adjust *PC to point to the correct memory 103 location for inserting the breakpoint. */ 104 105static const unsigned char * 106m88k_breakpoint_from_pc (CORE_ADDR *pc, int *len) 107{ 108 /* tb 0,r0,511 */ 109 static unsigned char break_insn[] = { 0xf0, 0x00, 0xd1, 0xff }; 110 111 *len = sizeof (break_insn); 112 return break_insn; 113} 114 115static CORE_ADDR 116m88k_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) 117{ 118 CORE_ADDR pc; 119 120 pc = frame_unwind_register_unsigned (next_frame, M88K_SXIP_REGNUM); 121 return m88k_addr_bits_remove (pc); 122} 123 124static void 125m88k_write_pc (CORE_ADDR pc, ptid_t ptid) 126{ 127 /* According to the MC88100 RISC Microprocessor User's Manual, 128 section 6.4.3.1.2: 129 130 "... can be made to return to a particular instruction by placing 131 a valid instruction address in the SNIP and the next sequential 132 instruction address in the SFIP (with V bits set and E bits 133 clear). The rte resumes execution at the instruction pointed to 134 by the SNIP, then the SFIP." 135 136 The E bit is the least significant bit (bit 0). The V (valid) 137 bit is bit 1. This is why we logical or 2 into the values we are 138 writing below. It turns out that SXIP plays no role when 139 returning from an exception so nothing special has to be done 140 with it. We could even (presumably) give it a totally bogus 141 value. */ 142 143 write_register_pid (M88K_SXIP_REGNUM, pc, ptid); 144 write_register_pid (M88K_SNIP_REGNUM, pc | 2, ptid); 145 write_register_pid (M88K_SFIP_REGNUM, (pc + 4) | 2, ptid); 146} 147 148 149/* The functions on this page are intended to be used to classify 150 function arguments. */ 151 152/* Check whether TYPE is "Integral or Pointer". */ 153 154static int 155m88k_integral_or_pointer_p (const struct type *type) 156{ 157 switch (TYPE_CODE (type)) 158 { 159 case TYPE_CODE_INT: 160 case TYPE_CODE_BOOL: 161 case TYPE_CODE_CHAR: 162 case TYPE_CODE_ENUM: 163 case TYPE_CODE_RANGE: 164 { 165 /* We have byte, half-word, word and extended-word/doubleword 166 integral types. */ 167 int len = TYPE_LENGTH (type); 168 return (len == 1 || len == 2 || len == 4 || len == 8); 169 } 170 return 1; 171 case TYPE_CODE_PTR: 172 case TYPE_CODE_REF: 173 { 174 /* Allow only 32-bit pointers. */ 175 return (TYPE_LENGTH (type) == 4); 176 } 177 return 1; 178 default: 179 break; 180 } 181 182 return 0; 183} 184 185/* Check whether TYPE is "Floating". */ 186 187static int 188m88k_floating_p (const struct type *type) 189{ 190 switch (TYPE_CODE (type)) 191 { 192 case TYPE_CODE_FLT: 193 { 194 int len = TYPE_LENGTH (type); 195 return (len == 4 || len == 8); 196 } 197 default: 198 break; 199 } 200 201 return 0; 202} 203 204/* Check whether TYPE is "Structure or Union". */ 205 206static int 207m88k_structure_or_union_p (const struct type *type) 208{ 209 switch (TYPE_CODE (type)) 210 { 211 case TYPE_CODE_STRUCT: 212 case TYPE_CODE_UNION: 213 return 1; 214 default: 215 break; 216 } 217 218 return 0; 219} 220 221/* Check whether TYPE has 8-byte alignment. */ 222 223static int 224m88k_8_byte_align_p (struct type *type) 225{ 226 if (m88k_structure_or_union_p (type)) 227 { 228 int i; 229 230 for (i = 0; i < TYPE_NFIELDS (type); i++) 231 { 232 struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, i)); 233 234 if (m88k_8_byte_align_p (subtype)) 235 return 1; 236 } 237 } 238 239 if (m88k_integral_or_pointer_p (type) || m88k_floating_p (type)) 240 return (TYPE_LENGTH (type) == 8); 241 242 return 0; 243} 244 245/* Check whether TYPE can be passed in a register. */ 246 247static int 248m88k_in_register_p (struct type *type) 249{ 250 if (m88k_integral_or_pointer_p (type) || m88k_floating_p (type)) 251 return 1; 252 253 if (m88k_structure_or_union_p (type) && TYPE_LENGTH (type) == 4) 254 return 1; 255 256 return 0; 257} 258 259static CORE_ADDR 260m88k_store_arguments (struct regcache *regcache, int nargs, 261 struct value **args, CORE_ADDR sp) 262{ 263 int num_register_words = 0; 264 int num_stack_words = 0; 265 int i; 266 267 for (i = 0; i < nargs; i++) 268 { 269 struct type *type = VALUE_TYPE (args[i]); 270 int len = TYPE_LENGTH (type); 271 272 if (m88k_integral_or_pointer_p (type) && len < 4) 273 { 274 args[i] = value_cast (builtin_type_int32, args[i]); 275 type = VALUE_TYPE (args[i]); 276 len = TYPE_LENGTH (type); 277 } 278 279 if (m88k_in_register_p (type)) 280 { 281 int num_words = 0; 282 283 if (num_register_words % 2 == 1 && m88k_8_byte_align_p (type)) 284 num_words++; 285 286 num_words += ((len + 3) / 4); 287 if (num_register_words + num_words <= 8) 288 { 289 num_register_words += num_words; 290 continue; 291 } 292 293 /* We've run out of available registers. Pass the argument 294 on the stack. */ 295 } 296 297 if (num_stack_words % 2 == 1 && m88k_8_byte_align_p (type)) 298 num_stack_words++; 299 300 num_stack_words += ((len + 3) / 4); 301 } 302 303 /* Allocate stack space. */ 304 sp = align_down (sp - 32 - num_stack_words * 4, 16); 305 num_stack_words = num_register_words = 0; 306 307 for (i = 0; i < nargs; i++) 308 { 309 char *valbuf = VALUE_CONTENTS (args[i]); 310 struct type *type = VALUE_TYPE (args[i]); 311 int len = TYPE_LENGTH (type); 312 int stack_word = num_stack_words; 313 314 if (m88k_in_register_p (type)) 315 { 316 int register_word = num_register_words; 317 318 if (register_word % 2 == 1 && m88k_8_byte_align_p (type)) 319 register_word++; 320 321 gdb_assert (len == 4 || len == 8); 322 323 if (register_word + len / 8 < 8) 324 { 325 int regnum = M88K_R2_REGNUM + register_word; 326 327 regcache_raw_write (regcache, regnum, valbuf); 328 if (len > 4) 329 regcache_raw_write (regcache, regnum + 1, valbuf + 4); 330 331 num_register_words = (register_word + len / 4); 332 continue; 333 } 334 } 335 336 if (stack_word % 2 == -1 && m88k_8_byte_align_p (type)) 337 stack_word++; 338 339 write_memory (sp + stack_word * 4, valbuf, len); 340 num_stack_words = (stack_word + (len + 3) / 4); 341 } 342 343 return sp; 344} 345 346static CORE_ADDR 347m88k_push_dummy_call (struct gdbarch *gdbarch, struct value *function, 348 struct regcache *regcache, CORE_ADDR bp_addr, int nargs, 349 struct value **args, CORE_ADDR sp, int struct_return, 350 CORE_ADDR struct_addr) 351{ 352 /* Set up the function arguments. */ 353 sp = m88k_store_arguments (regcache, nargs, args, sp); 354 gdb_assert (sp % 16 == 0); 355 356 /* Store return value address. */ 357 if (struct_return) 358 regcache_raw_write_unsigned (regcache, M88K_R12_REGNUM, struct_addr); 359 360 /* Store the stack pointer and return address in the appropriate 361 registers. */ 362 regcache_raw_write_unsigned (regcache, M88K_R31_REGNUM, sp); 363 regcache_raw_write_unsigned (regcache, M88K_R1_REGNUM, bp_addr); 364 365 /* Return the stack pointer. */ 366 return sp; 367} 368 369static struct frame_id 370m88k_unwind_dummy_id (struct gdbarch *arch, struct frame_info *next_frame) 371{ 372 CORE_ADDR sp; 373 374 sp = frame_unwind_register_unsigned (next_frame, M88K_R31_REGNUM); 375 return frame_id_build (sp, frame_pc_unwind (next_frame)); 376} 377 378 379/* Determine, for architecture GDBARCH, how a return value of TYPE 380 should be returned. If it is supposed to be returned in registers, 381 and READBUF is non-zero, read the appropriate value from REGCACHE, 382 and copy it into READBUF. If WRITEBUF is non-zero, write the value 383 from WRITEBUF into REGCACHE. */ 384 385static enum return_value_convention 386m88k_return_value (struct gdbarch *gdbarch, struct type *type, 387 struct regcache *regcache, void *readbuf, 388 const void *writebuf) 389{ 390 int len = TYPE_LENGTH (type); 391 char buf[8]; 392 393 if (!m88k_integral_or_pointer_p (type) && !m88k_floating_p (type)) 394 return RETURN_VALUE_STRUCT_CONVENTION; 395 396 if (readbuf) 397 { 398 /* Read the contents of R2 and (if necessary) R3. */ 399 regcache_cooked_read (regcache, M88K_R2_REGNUM, buf); 400 if (len > 4) 401 { 402 regcache_cooked_read (regcache, M88K_R3_REGNUM, buf + 4); 403 gdb_assert (len == 8); 404 memcpy (readbuf, buf, len); 405 } 406 else 407 { 408 /* Just stripping off any unused bytes should preserve the 409 signed-ness just fine. */ 410 memcpy (readbuf, buf + 4 - len, len); 411 } 412 } 413 414 if (writebuf) 415 { 416 /* Read the contents to R2 and (if necessary) R3. */ 417 if (len > 4) 418 { 419 gdb_assert (len == 8); 420 memcpy (buf, writebuf, 8); 421 regcache_cooked_write (regcache, M88K_R3_REGNUM, buf + 4); 422 } 423 else 424 { 425 /* ??? Do we need to do any sign-extension here? */ 426 memcpy (buf + 4 - len, writebuf, len); 427 } 428 regcache_cooked_write (regcache, M88K_R2_REGNUM, buf); 429 } 430 431 return RETURN_VALUE_REGISTER_CONVENTION; 432} 433 434/* Default frame unwinder. */ 435 436struct m88k_frame_cache 437{ 438 /* Base address. */ 439 CORE_ADDR base; 440 CORE_ADDR pc; 441 442 int sp_offset; 443 int fp_offset; 444 445 /* Table of saved registers. */ 446 struct trad_frame_saved_reg *saved_regs; 447}; 448 449/* Prologue analysis. */ 450 451/* Macros for extracting fields from instructions. */ 452 453#define BITMASK(pos, width) (((0x1 << (width)) - 1) << (pos)) 454#define EXTRACT_FIELD(val, pos, width) ((val) >> (pos) & BITMASK (0, width)) 455#define SUBU_OFFSET(x) ((unsigned)(x & 0xFFFF)) 456#define ST_OFFSET(x) ((unsigned)((x) & 0xFFFF)) 457#define ST_SRC(x) EXTRACT_FIELD ((x), 21, 5) 458#define ADDU_OFFSET(x) ((unsigned)(x & 0xFFFF)) 459 460/* Possible actions to be taken by the prologue analyzer for the 461 instructions it encounters. */ 462 463enum m88k_prologue_insn_action 464{ 465 M88K_PIA_SKIP, /* Ignore. */ 466 M88K_PIA_NOTE_ST, /* Note register store. */ 467 M88K_PIA_NOTE_STD, /* Note register pair store. */ 468 M88K_PIA_NOTE_SP_ADJUSTMENT, /* Note stack pointer adjustment. */ 469 M88K_PIA_NOTE_FP_ASSIGNMENT, /* Note frame pointer assignment. */ 470 M88K_PIA_NOTE_BRANCH, /* Note branch. */ 471 M88K_PIA_NOTE_PROLOGUE_END /* Note end of prologue. */ 472}; 473 474/* Table of instructions that may comprise a function prologue. */ 475 476struct m88k_prologue_insn 477{ 478 unsigned long insn; 479 unsigned long mask; 480 enum m88k_prologue_insn_action action; 481}; 482 483struct m88k_prologue_insn m88k_prologue_insn_table[] = 484{ 485 /* Various register move instructions. */ 486 { 0x58000000, 0xf800ffff, M88K_PIA_SKIP }, /* or/or.u with immed of 0 */ 487 { 0xf4005800, 0xfc1fffe0, M88K_PIA_SKIP }, /* or rd,r0,rs */ 488 { 0xf4005800, 0xfc00ffff, M88K_PIA_SKIP }, /* or rd,rs,r0 */ 489 490 /* Various other instructions. */ 491 { 0x58000000, 0xf8000000, M88K_PIA_SKIP }, /* or/or.u */ 492 493 /* Stack pointer setup: "subu sp,sp,n" where n is a multiple of 8. */ 494 { 0x67ff0000, 0xffff0007, M88K_PIA_NOTE_SP_ADJUSTMENT }, 495 496 /* Frame pointer assignment: "addu r30,r31,n". */ 497 { 0x63df0000, 0xffff0000, M88K_PIA_NOTE_FP_ASSIGNMENT }, 498 499 /* Store to stack instructions; either "st rx,sp,n" or "st.d rx,sp,n". */ 500 { 0x241f0000, 0xfc1f0000, M88K_PIA_NOTE_ST }, /* st rx,sp,n */ 501 { 0x201f0000, 0xfc1f0000, M88K_PIA_NOTE_STD }, /* st.d rs,sp,n */ 502 503 /* Instructions needed for setting up r25 for pic code. */ 504 { 0x5f200000, 0xffff0000, M88K_PIA_SKIP }, /* or.u r25,r0,offset_high */ 505 { 0xcc000002, 0xffffffff, M88K_PIA_SKIP }, /* bsr.n Lab */ 506 { 0x5b390000, 0xffff0000, M88K_PIA_SKIP }, /* or r25,r25,offset_low */ 507 { 0xf7396001, 0xffffffff, M88K_PIA_SKIP }, /* Lab: addu r25,r25,r1 */ 508 509 /* Various branch or jump instructions which have a delay slot -- 510 these do not form part of the prologue, but the instruction in 511 the delay slot might be a store instruction which should be 512 noted. */ 513 { 0xc4000000, 0xe4000000, M88K_PIA_NOTE_BRANCH }, 514 /* br.n, bsr.n, bb0.n, or bb1.n */ 515 { 0xec000000, 0xfc000000, M88K_PIA_NOTE_BRANCH }, /* bcnd.n */ 516 { 0xf400c400, 0xfffff7e0, M88K_PIA_NOTE_BRANCH }, /* jmp.n or jsr.n */ 517 518 /* Catch all. Ends prologue analysis. */ 519 { 0x00000000, 0x00000000, M88K_PIA_NOTE_PROLOGUE_END } 520}; 521 522/* Do a full analysis of the function prologue at PC and update CACHE 523 accordingly. Bail out early if LIMIT is reached. Return the 524 address where the analysis stopped. If LIMIT points beyond the 525 function prologue, the return address should be the end of the 526 prologue. */ 527 528static CORE_ADDR 529m88k_analyze_prologue (CORE_ADDR pc, CORE_ADDR limit, 530 struct m88k_frame_cache *cache) 531{ 532 CORE_ADDR end = limit; 533 534 /* Provide a dummy cache if necessary. */ 535 if (cache == NULL) 536 { 537 size_t sizeof_saved_regs = 538 (M88K_R31_REGNUM + 1) * sizeof (struct trad_frame_saved_reg); 539 540 cache = alloca (sizeof (struct m88k_frame_cache)); 541 cache->saved_regs = alloca (sizeof_saved_regs); 542 543 /* We only initialize the members we care about. */ 544 cache->saved_regs[M88K_R1_REGNUM].addr = -1; 545 cache->fp_offset = -1; 546 } 547 548 while (pc < limit) 549 { 550 struct m88k_prologue_insn *pi = m88k_prologue_insn_table; 551 unsigned long insn = m88k_fetch_instruction (pc); 552 553 while ((insn & pi->mask) != pi->insn) 554 pi++; 555 556 switch (pi->action) 557 { 558 case M88K_PIA_SKIP: 559 /* If we have a frame pointer, and R1 has been saved, 560 consider this instruction as not being part of the 561 prologue. */ 562 if (cache->fp_offset != -1 563 && cache->saved_regs[M88K_R1_REGNUM].addr != -1) 564 return min (pc, end); 565 break; 566 567 case M88K_PIA_NOTE_ST: 568 case M88K_PIA_NOTE_STD: 569 /* If no frame has been allocated, the stores aren't part of 570 the prologue. */ 571 if (cache->sp_offset == 0) 572 return min (pc, end); 573 574 /* Record location of saved registers. */ 575 { 576 int regnum = ST_SRC (insn) + M88K_R0_REGNUM; 577 ULONGEST offset = ST_OFFSET (insn); 578 579 cache->saved_regs[regnum].addr = offset; 580 if (pi->action == M88K_PIA_NOTE_STD && regnum < M88K_R31_REGNUM) 581 cache->saved_regs[regnum + 1].addr = offset + 4; 582 } 583 break; 584 585 case M88K_PIA_NOTE_SP_ADJUSTMENT: 586 /* A second stack pointer adjustment isn't part of the 587 prologue. */ 588 if (cache->sp_offset != 0) 589 return min (pc, end); 590 591 /* Store stack pointer adjustment. */ 592 cache->sp_offset = -SUBU_OFFSET (insn); 593 break; 594 595 case M88K_PIA_NOTE_FP_ASSIGNMENT: 596 /* A second frame pointer assignment isn't part of the 597 prologue. */ 598 if (cache->fp_offset != -1) 599 return min (pc, end); 600 601 /* Record frame pointer assignment. */ 602 cache->fp_offset = ADDU_OFFSET (insn); 603 break; 604 605 case M88K_PIA_NOTE_BRANCH: 606 /* The branch instruction isn't part of the prologue, but 607 the instruction in the delay slot might be. Limit the 608 prologue analysis to the delay slot and record the branch 609 instruction as the end of the prologue. */ 610 limit = min (limit, pc + 2 * M88K_INSN_SIZE); 611 end = pc; 612 break; 613 614 case M88K_PIA_NOTE_PROLOGUE_END: 615 return min (pc, end); 616 } 617 618 pc += M88K_INSN_SIZE; 619 } 620 621 return end; 622} 623 624/* An upper limit to the size of the prologue. */ 625const int m88k_max_prologue_size = 128 * M88K_INSN_SIZE; 626 627/* Return the address of first real instruction of the function 628 starting at PC. */ 629 630static CORE_ADDR 631m88k_skip_prologue (CORE_ADDR pc) 632{ 633 struct symtab_and_line sal; 634 CORE_ADDR func_start, func_end; 635 636 /* This is the preferred method, find the end of the prologue by 637 using the debugging information. */ 638 if (find_pc_partial_function (pc, NULL, &func_start, &func_end)) 639 { 640 sal = find_pc_line (func_start, 0); 641 642 if (sal.end < func_end && pc <= sal.end) 643 return sal.end; 644 } 645 646 return m88k_analyze_prologue (pc, pc + m88k_max_prologue_size, NULL); 647} 648 649struct m88k_frame_cache * 650m88k_frame_cache (struct frame_info *next_frame, void **this_cache) 651{ 652 struct m88k_frame_cache *cache; 653 CORE_ADDR frame_sp; 654 655 if (*this_cache) 656 return *this_cache; 657 658 cache = FRAME_OBSTACK_ZALLOC (struct m88k_frame_cache); 659 cache->saved_regs = trad_frame_alloc_saved_regs (next_frame); 660 cache->fp_offset = -1; 661 662 cache->pc = frame_func_unwind (next_frame); 663 if (cache->pc != 0) 664 { 665 CORE_ADDR addr_in_block = frame_unwind_address_in_block (next_frame); 666 m88k_analyze_prologue (cache->pc, addr_in_block, cache); 667 } 668 669 /* Calculate the stack pointer used in the prologue. */ 670 if (cache->fp_offset != -1) 671 { 672 CORE_ADDR fp; 673 674 fp = frame_unwind_register_unsigned (next_frame, M88K_R30_REGNUM); 675 frame_sp = fp - cache->fp_offset; 676 } 677 else 678 { 679 /* If we know where the return address is saved, we can take a 680 solid guess at what the frame pointer should be. */ 681 if (cache->saved_regs[M88K_R1_REGNUM].addr != -1) 682 cache->fp_offset = cache->saved_regs[M88K_R1_REGNUM].addr - 4; 683 frame_sp = frame_unwind_register_unsigned (next_frame, M88K_R31_REGNUM); 684 } 685 686 /* Now that we know the stack pointer, adjust the location of the 687 saved registers. */ 688 { 689 int regnum; 690 691 for (regnum = M88K_R0_REGNUM; regnum < M88K_R31_REGNUM; regnum ++) 692 if (cache->saved_regs[regnum].addr != -1) 693 cache->saved_regs[regnum].addr += frame_sp; 694 } 695 696 /* Calculate the frame's base. */ 697 cache->base = frame_sp - cache->sp_offset; 698 trad_frame_set_value (cache->saved_regs, M88K_R31_REGNUM, cache->base); 699 700 /* Identify SXIP with the return address in R1. */ 701 cache->saved_regs[M88K_SXIP_REGNUM] = cache->saved_regs[M88K_R1_REGNUM]; 702 703 *this_cache = cache; 704 return cache; 705} 706 707static void 708m88k_frame_this_id (struct frame_info *next_frame, void **this_cache, 709 struct frame_id *this_id) 710{ 711 struct m88k_frame_cache *cache = m88k_frame_cache (next_frame, this_cache); 712 713 /* This marks the outermost frame. */ 714 if (cache->base == 0) 715 return; 716 717 (*this_id) = frame_id_build (cache->base, cache->pc); 718} 719 720static void 721m88k_frame_prev_register (struct frame_info *next_frame, void **this_cache, 722 int regnum, int *optimizedp, 723 enum lval_type *lvalp, CORE_ADDR *addrp, 724 int *realnump, void *valuep) 725{ 726 struct m88k_frame_cache *cache = m88k_frame_cache (next_frame, this_cache); 727 728 if (regnum == M88K_SNIP_REGNUM || regnum == M88K_SFIP_REGNUM) 729 { 730 if (valuep) 731 { 732 CORE_ADDR pc; 733 734 trad_frame_get_prev_register (next_frame, cache->saved_regs, 735 M88K_SXIP_REGNUM, optimizedp, 736 lvalp, addrp, realnump, valuep); 737 738 pc = extract_unsigned_integer (valuep, 4); 739 if (regnum == M88K_SFIP_REGNUM) 740 pc += 4; 741 store_unsigned_integer (valuep, 4, pc + 4); 742 } 743 744 /* It's a computed value. */ 745 *optimizedp = 0; 746 *lvalp = not_lval; 747 *addrp = 0; 748 *realnump = -1; 749 return; 750 } 751 752 trad_frame_get_prev_register (next_frame, cache->saved_regs, regnum, 753 optimizedp, lvalp, addrp, realnump, valuep); 754} 755 756static const struct frame_unwind m88k_frame_unwind = 757{ 758 NORMAL_FRAME, 759 m88k_frame_this_id, 760 m88k_frame_prev_register 761}; 762 763static const struct frame_unwind * 764m88k_frame_sniffer (struct frame_info *next_frame) 765{ 766 return &m88k_frame_unwind; 767} 768 769 770static CORE_ADDR 771m88k_frame_base_address (struct frame_info *next_frame, void **this_cache) 772{ 773 struct m88k_frame_cache *cache = m88k_frame_cache (next_frame, this_cache); 774 775 if (cache->fp_offset != -1) 776 return cache->base + cache->sp_offset + cache->fp_offset; 777 778 return 0; 779} 780 781static const struct frame_base m88k_frame_base = 782{ 783 &m88k_frame_unwind, 784 m88k_frame_base_address, 785 m88k_frame_base_address, 786 m88k_frame_base_address 787}; 788 789 790/* Core file support. */ 791 792/* Supply register REGNUM from the buffer specified by GREGS and LEN 793 in the general-purpose register set REGSET to register cache 794 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */ 795 796static void 797m88k_supply_gregset (const struct regset *regset, 798 struct regcache *regcache, 799 int regnum, const void *gregs, size_t len) 800{ 801 const char *regs = gregs; 802 int i; 803 804 for (i = 0; i < M88K_NUM_REGS; i++) 805 { 806 if (regnum == i || regnum == -1) 807 regcache_raw_supply (regcache, i, regs + i * 4); 808 } 809} 810 811/* Motorola 88000 register set. */ 812 813static struct regset m88k_gregset = 814{ 815 NULL, 816 m88k_supply_gregset 817}; 818 819/* Return the appropriate register set for the core section identified 820 by SECT_NAME and SECT_SIZE. */ 821 822static const struct regset * 823m88k_regset_from_core_section (struct gdbarch *gdbarch, 824 const char *sect_name, size_t sect_size) 825{ 826 if (strcmp (sect_name, ".reg") == 0 && sect_size >= M88K_NUM_REGS * 4) 827 return &m88k_gregset; 828 829 return NULL; 830} 831 832 833static struct gdbarch * 834m88k_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) 835{ 836 struct gdbarch *gdbarch; 837 838 /* If there is already a candidate, use it. */ 839 arches = gdbarch_list_lookup_by_info (arches, &info); 840 if (arches != NULL) 841 return arches->gdbarch; 842 843 /* Allocate space for the new architecture. */ 844 gdbarch = gdbarch_alloc (&info, NULL); 845 846 /* There is no real `long double'. */ 847 set_gdbarch_long_double_bit (gdbarch, 64); 848 set_gdbarch_long_double_format (gdbarch, &floatformat_ieee_double_big); 849 850 set_gdbarch_num_regs (gdbarch, M88K_NUM_REGS); 851 set_gdbarch_register_name (gdbarch, m88k_register_name); 852 set_gdbarch_register_type (gdbarch, m88k_register_type); 853 854 /* Register numbers of various important registers. */ 855 set_gdbarch_sp_regnum (gdbarch, M88K_R31_REGNUM); 856 set_gdbarch_pc_regnum (gdbarch, M88K_SXIP_REGNUM); 857 858 /* Core file support. */ 859 set_gdbarch_regset_from_core_section 860 (gdbarch, m88k_regset_from_core_section); 861 862 set_gdbarch_print_insn (gdbarch, print_insn_m88k); 863 864 set_gdbarch_skip_prologue (gdbarch, m88k_skip_prologue); 865 866 /* Stack grows downward. */ 867 set_gdbarch_inner_than (gdbarch, core_addr_lessthan); 868 869 /* Call dummy code. */ 870 set_gdbarch_push_dummy_call (gdbarch, m88k_push_dummy_call); 871 set_gdbarch_unwind_dummy_id (gdbarch, m88k_unwind_dummy_id); 872 873 /* Return value info */ 874 set_gdbarch_return_value (gdbarch, m88k_return_value); 875 876 set_gdbarch_addr_bits_remove (gdbarch, m88k_addr_bits_remove); 877 set_gdbarch_breakpoint_from_pc (gdbarch, m88k_breakpoint_from_pc); 878 set_gdbarch_unwind_pc (gdbarch, m88k_unwind_pc); 879 set_gdbarch_write_pc (gdbarch, m88k_write_pc); 880 881 frame_base_set_default (gdbarch, &m88k_frame_base); 882 frame_unwind_append_sniffer (gdbarch, m88k_frame_sniffer); 883 884 return gdbarch; 885} 886 887 888/* Provide a prototype to silence -Wmissing-prototypes. */ 889void _initialize_m88k_tdep (void); 890 891void 892_initialize_m88k_tdep (void) 893{ 894 gdbarch_register (bfd_arch_m88k, m88k_gdbarch_init, NULL); 895} 896