1/*-
2 * Copyright (c) 1997, 1998, 1999
3 *	Bill Paul <wpaul@ctr.columbia.edu>.  All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 *    must display the following acknowledgement:
15 *	This product includes software developed by Bill Paul.
16 * 4. Neither the name of the author nor the names of any co-contributors
17 *    may be used to endorse or promote products derived from this software
18 *    without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33#include <sys/cdefs.h>
34__FBSDID("$FreeBSD: src/sys/dev/mii/rlphy.c,v 1.32.2.5.2.1 2010/12/21 17:09:25 kensmith Exp $");
35
36/*
37 * driver for RealTek 8139 internal PHYs
38 */
39
40#include <sys/param.h>
41#include <sys/systm.h>
42#include <sys/kernel.h>
43#include <sys/module.h>
44#include <sys/socket.h>
45#include <sys/bus.h>
46
47#include <net/if.h>
48#include <net/if_arp.h>
49#include <net/if_media.h>
50
51#include <dev/mii/mii.h>
52#include <dev/mii/miivar.h>
53#include "miidevs.h"
54
55#include <machine/bus.h>
56#include <pci/if_rlreg.h>
57
58#include "miibus_if.h"
59
60static int rlphy_probe(device_t);
61static int rlphy_attach(device_t);
62
63static device_method_t rlphy_methods[] = {
64	/* device interface */
65	DEVMETHOD(device_probe,		rlphy_probe),
66	DEVMETHOD(device_attach,	rlphy_attach),
67	DEVMETHOD(device_detach,	mii_phy_detach),
68	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
69	{ 0, 0 }
70};
71
72static devclass_t rlphy_devclass;
73
74static driver_t rlphy_driver = {
75	"rlphy",
76	rlphy_methods,
77	sizeof(struct mii_softc)
78};
79
80DRIVER_MODULE(rlphy, miibus, rlphy_driver, rlphy_devclass, 0, 0);
81
82static int	rlphy_service(struct mii_softc *, struct mii_data *, int);
83static void	rlphy_status(struct mii_softc *);
84
85/*
86 * RealTek internal PHYs don't have vendor/device ID registers;
87 * re(4) and rl(4) fake up a return value of all zeros.
88 */
89static const struct mii_phydesc rlintphys[] = {
90	{ 0, 0, "RealTek internal media interface" },
91	MII_PHY_END
92};
93
94static const struct mii_phydesc rlphys[] = {
95	MII_PHY_DESC(yyREALTEK, RTL8201L),
96	MII_PHY_DESC(REALTEK, RTL8201E),
97	MII_PHY_DESC(xxICPLUS, IP101),
98	MII_PHY_END
99};
100
101static const struct mii_phy_funcs rlphy_funcs = {
102	rlphy_service,
103	rlphy_status,
104	mii_phy_reset
105};
106
107static int
108rlphy_probe(device_t dev)
109{
110	const char *nic;
111	int rv;
112
113	rv = mii_phy_dev_probe(dev, rlphys, BUS_PROBE_DEFAULT);
114#ifdef __HAIKU__
115	if (rv == BUS_PROBE_DEFAULT)
116		return (rv);
117#else
118	if (rv <= 0)
119		return (rv);
120#endif
121
122	nic = device_get_name(device_get_parent(device_get_parent(dev)));
123	if (strcmp(nic, "rl") == 0 || strcmp(nic, "re") == 0)
124		return (mii_phy_dev_probe(dev, rlintphys, BUS_PROBE_DEFAULT));
125	return (ENXIO);
126}
127
128static int
129rlphy_attach(device_t dev)
130{
131
132	/*
133	 * The RealTek PHY can never be isolated.
134	 */
135	mii_phy_dev_attach(dev, MIIF_NOISOLATE | MIIF_NOMANPAUSE,
136	    &rlphy_funcs, 1);
137	return (0);
138}
139
140static int
141rlphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
142{
143
144	switch (cmd) {
145	case MII_POLLSTAT:
146		break;
147
148	case MII_MEDIACHG:
149		/*
150		 * If the interface is not up, don't do anything.
151		 */
152		if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
153			break;
154
155		mii_phy_setmedia(sc);
156		break;
157
158	case MII_TICK:
159		/*
160		 * Is the interface even up?
161		 */
162		if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
163			return (0);
164
165		/*
166		 * The RealTek PHY's autonegotiation doesn't need to be
167		 * kicked; it continues in the background.
168		 */
169		break;
170	}
171
172	/* Update the media status. */
173	PHY_STATUS(sc);
174
175	/* Callback if something changed. */
176	mii_phy_update(sc, cmd);
177	return (0);
178}
179
180static void
181rlphy_status(struct mii_softc *phy)
182{
183	struct mii_data *mii = phy->mii_pdata;
184	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
185	int bmsr, bmcr, anlpar;
186
187	mii->mii_media_status = IFM_AVALID;
188	mii->mii_media_active = IFM_ETHER;
189
190	bmsr = PHY_READ(phy, MII_BMSR) | PHY_READ(phy, MII_BMSR);
191	if (bmsr & BMSR_LINK)
192		mii->mii_media_status |= IFM_ACTIVE;
193
194	bmcr = PHY_READ(phy, MII_BMCR);
195	if (bmcr & BMCR_ISO) {
196		mii->mii_media_active |= IFM_NONE;
197		mii->mii_media_status = 0;
198		return;
199	}
200
201	if (bmcr & BMCR_LOOP)
202		mii->mii_media_active |= IFM_LOOP;
203
204	if (bmcr & BMCR_AUTOEN) {
205		/*
206		 * NWay autonegotiation takes the highest-order common
207		 * bit of the ANAR and ANLPAR (i.e. best media advertised
208		 * both by us and our link partner).
209		 */
210		if ((bmsr & BMSR_ACOMP) == 0) {
211			/* Erg, still trying, I guess... */
212			mii->mii_media_active |= IFM_NONE;
213			return;
214		}
215
216		if ((anlpar = PHY_READ(phy, MII_ANAR) &
217		    PHY_READ(phy, MII_ANLPAR))) {
218			if (anlpar & ANLPAR_TX_FD)
219				mii->mii_media_active |= IFM_100_TX|IFM_FDX;
220			else if (anlpar & ANLPAR_T4)
221				mii->mii_media_active |= IFM_100_T4|IFM_HDX;
222			else if (anlpar & ANLPAR_TX)
223				mii->mii_media_active |= IFM_100_TX|IFM_HDX;
224			else if (anlpar & ANLPAR_10_FD)
225				mii->mii_media_active |= IFM_10_T|IFM_FDX;
226			else if (anlpar & ANLPAR_10)
227				mii->mii_media_active |= IFM_10_T|IFM_HDX;
228			else
229				mii->mii_media_active |= IFM_NONE;
230			if ((mii->mii_media_active & IFM_FDX) != 0)
231				mii->mii_media_active |=
232				    mii_phy_flowstatus(phy);
233			return;
234		}
235		/*
236		 * If the other side doesn't support NWAY, then the
237		 * best we can do is determine if we have a 10Mbps or
238		 * 100Mbps link. There's no way to know if the link
239		 * is full or half duplex, so we default to half duplex
240		 * and hope that the user is clever enough to manually
241		 * change the media settings if we're wrong.
242		 */
243
244		/*
245		 * The RealTek PHY supports non-NWAY link speed
246		 * detection, however it does not report the link
247		 * detection results via the ANLPAR or BMSR registers.
248		 * (What? RealTek doesn't do things the way everyone
249		 * else does? I'm just shocked, shocked I tell you.)
250		 * To determine the link speed, we have to do one
251		 * of two things:
252		 *
253		 * - If this is a standalone RealTek RTL8201(L) or
254		 *   workalike PHY, we can determine the link speed by
255		 *   testing bit 0 in the magic, vendor-specific register
256		 *   at offset 0x19.
257		 *
258		 * - If this is a RealTek MAC with integrated PHY, we
259		 *   can test the 'SPEED10' bit of the MAC's media status
260		 *   register.
261		 */
262		if (!(phy->mii_mpd_model == 0 && phy->mii_mpd_rev == 0)) {
263			if (PHY_READ(phy, 0x0019) & 0x01)
264				mii->mii_media_active |= IFM_100_TX;
265			else
266				mii->mii_media_active |= IFM_10_T;
267		} else {
268			if (PHY_READ(phy, RL_MEDIASTAT) &
269			    RL_MEDIASTAT_SPEED10)
270				mii->mii_media_active |= IFM_10_T;
271			else
272				mii->mii_media_active |= IFM_100_TX;
273		}
274		mii->mii_media_active |= IFM_HDX;
275	} else
276		mii->mii_media_active = ife->ifm_media;
277}
278