1#ifndef B44MM_H
2#define B44MM_H
3
4#include <PCI.h>
5#include <Drivers.h>
6#include <OS.h>
7#include <ByteOrder.h>
8#include <KernelExport.h>
9
10#include <stdio.h>
11
12typedef vint32 MM_ATOMIC_T;
13
14//#define MM_SWAP_LE16(x) B_SWAP_INT16(x)
15#define MM_SWAP_LE16(x) x
16
17/*#define MM_ATOMIC_SET(ptr, val) atomic_and(ptr, 0); atomic_add(ptr,val)
18#define MM_ATOMIC_READ(ptr) atomic_add(ptr,0)
19#define MM_ATOMIC_INC(ptr) atomic_add(ptr,1)
20#define MM_ATOMIC_ADD(ptr, val) atomic_add(ptr,val)
21#define MM_ATOMIC_DEC(ptr) atomic_add(ptr,-1)
22#define MM_ATOMIC_SUB(ptr, val) atomic_add(ptr,0-val)*/
23
24#define MM_ATOMIC_SET(ptr, val) *(ptr)=val
25#define MM_ATOMIC_READ(ptr) *(ptr)
26#define MM_ATOMIC_INC(ptr) (*(ptr))++
27#define MM_ATOMIC_ADD(ptr, val) *(ptr)+=val
28#define MM_ATOMIC_DEC(ptr) (*(ptr))--
29#define MM_ATOMIC_SUB(ptr, val) *(ptr)-=val
30
31/* All critical sections are protected by locking mechanisms already */
32
33#define __io_virt(x) ((void *)(x))
34#define readl(addr) (*(volatile unsigned int *) __io_virt(addr))
35#define writel(b,addr) (*(volatile unsigned int *) __io_virt(addr) = (b))
36#define __raw_readl readl
37#define __raw_writel writel
38
39#define udelay spin
40
41#define MM_MEMWRITEL(ptr, val) __raw_writel(val, ptr)
42#define MM_MEMREADL(ptr) __raw_readl(ptr)
43
44#ifdef __INTEL__
45#define mb()    __asm__ __volatile__ ("lock; addl $0,0(%%esp)": : :"memory")
46#else
47#ifdef __HAIKU__
48#define mb()	memory_write_barrier()
49#else
50#warning no memory barrier function defined.
51#define mb()
52#endif
53#endif
54#define wmb()    mb()
55
56#define readl(addr) (*(volatile unsigned int *) __io_virt(addr))
57
58#define MM_MB() mb()
59#define MM_WMB() wmb()
60
61#define STATIC static
62
63extern int b44_Packet_Desc_Size;
64
65#define B44_MM_PACKET_DESC_SIZE b44_Packet_Desc_Size
66
67#include "b44lm.h"
68#include "b44queue.h"
69#include "b44.h"
70
71struct be_b44_dev {
72	LM_DEVICE_BLOCK lm_dev;
73
74	struct pci_info pci_data;
75
76	sem_id packet_release_sem;
77	//sem_id interrupt_sem;
78	//thread_id interrupt_handler;
79
80    LM_RX_PACKET_Q RxPacketReadQ;
81
82	void *mem_list[16];
83	int mem_list_num;
84
85	area_id lockmem_list[16];
86	int lockmem_list_num;
87
88	area_id mem_base;
89
90	vint32 opened;
91
92	int block;
93	spinlock lock;
94
95#ifdef HAIKU_TARGET_PLATFORM_HAIKU
96	sem_id				linkChangeSem;
97#endif
98};
99
100struct B_UM_PACKET {
101	struct _LM_PACKET pkt;
102
103	void *data;
104	size_t size;
105};
106
107static inline void b44_MM_MapRxDma(PLM_DEVICE_BLOCK pDevice,
108	struct _LM_PACKET *pPacket,
109	LM_UINT32 *paddr)
110{
111	physical_entry entry;
112
113	get_memory_map(pPacket->u.Rx.pRxBufferVirt,pPacket->u.Rx.RxBufferSize,&entry,1);
114	*paddr = entry.address;
115}
116
117static inline void b44_MM_MapTxDma(PLM_DEVICE_BLOCK pDevice,
118	struct _LM_PACKET *pPacket,
119	LM_UINT32 *paddr, LM_UINT32 *len, int frag)
120{
121	struct B_UM_PACKET *pkt = (struct B_UM_PACKET *)pPacket;
122	physical_entry entry;
123
124	get_memory_map(pkt->data,pkt->size,&entry,1);
125	*paddr = entry.address;
126	*len = pPacket->PacketSize;
127}
128
129#if (BITS_PER_LONG == 64)
130#define B44_MM_GETSTATS(_Ctr) \
131	(unsigned long) (_Ctr).Low + ((unsigned long) (_Ctr).High << 32)
132#else
133#define B44_MM_GETSTATS(_Ctr) \
134	(unsigned long) (_Ctr).Low
135#endif
136
137#define B44_MM_PTR(_ptr)   ((unsigned long) (_ptr))
138#define printf(fmt, args...) dprintf(fmt, ##args)
139#define DbgPrint(fmt, arg...) dprintf(fmt, ##arg)
140#define DbgBreakPoint()
141#define b44_MM_Wait(time) udelay(time)
142#define ASSERT(expr)							\
143	if (!(expr)) {							\
144		dprintf("ASSERT failed: %s\n", #expr);	\
145	}
146
147#endif
148