1/*
2 * Copyright 2007-2010 Haiku, Inc.  All rights reserved.
3 * Distributed under the terms of the MIT license.
4 *
5 * Authors:
6 *		Gerald Zajac
7 */
8
9#include <KernelExport.h>
10#include <PCI.h>
11#include <malloc.h>
12#include <stdio.h>
13#include <string.h>
14#include <graphic_driver.h>
15#ifdef __HAIKU__
16#include <boot_item.h>
17#endif	// __HAIKU__
18
19#include "DriverInterface.h"
20
21
22#undef TRACE
23
24#ifdef ENABLE_DEBUG_TRACE
25#	define TRACE(x...) dprintf("3dfx: " x)
26#else
27#	define TRACE(x...) ;
28#endif
29
30
31#define ACCELERANT_NAME	 "3dfx.accelerant"
32
33#define ROUND_TO_PAGE_SIZE(x) (((x) + (B_PAGE_SIZE) - 1) & ~((B_PAGE_SIZE) - 1))
34
35#define SKD_HANDLER_INSTALLED 0x80000000
36#define MAX_DEVICES		4
37#define DEVICE_FORMAT	"%04X_%04X_%02X%02X%02X"
38
39int32 api_version = B_CUR_DRIVER_API_VERSION;	// revision of driver API used
40
41#define VENDOR_ID	0x121A		// 3DFX vendor ID
42
43
44struct ChipInfo {
45	uint16		chipID;			// PCI device id of the chip
46	ChipType	chipType;		// assigned chip type identifier
47	const char*	chipName;		// user recognizable name for chip
48								//   (must be < 32 chars)
49};
50
51
52// This table maps a PCI device ID to a chip type identifier and the chip name.
53
54static const ChipInfo chipTable[] = {
55	{ 0x03, BANSHEE,	"Banshee"	},
56	{ 0x05, VOODOO_3,	"Voodoo 3"	},
57	{ 0x09, VOODOO_5,	"Voodoo 5"	},
58	{ 0,	TDFX_NONE,	NULL }
59};
60
61
62struct DeviceInfo {
63	uint32			openCount;		// count of how many times device has been opened
64	int32			flags;
65	area_id 		sharedArea;		// area shared between driver and all accelerants
66	SharedInfo* 	sharedInfo;		// pointer to shared info area memory
67	vuint8*	 		regs;			// pointer to memory mapped registers
68	const ChipInfo*	pChipInfo;		// info about the selected chip
69	pci_info		pciInfo;		// copy of pci info for this device
70	char			name[B_OS_NAME_LENGTH]; // name of device
71};
72
73
74static Benaphore		gLock;
75static DeviceInfo		gDeviceInfo[MAX_DEVICES];
76static char*			gDeviceNames[MAX_DEVICES + 1];
77static pci_module_info*	gPCI;
78
79
80// Prototypes for device hook functions.
81
82static status_t device_open(const char* name, uint32 flags, void** cookie);
83static status_t device_close(void* dev);
84static status_t device_free(void* dev);
85static status_t device_read(void* dev, off_t pos, void* buf, size_t* len);
86static status_t device_write(void* dev, off_t pos, const void* buf,
87					size_t* len);
88static status_t device_ioctl(void* dev, uint32 msg, void* buf, size_t len);
89
90static device_hooks gDeviceHooks =
91{
92	device_open,
93	device_close,
94	device_free,
95	device_ioctl,
96	device_read,
97	device_write,
98	NULL,
99	NULL,
100	NULL,
101	NULL
102};
103
104
105
106static inline uint32
107GetPCI(pci_info& info, uint8 offset, uint8 size)
108{
109	return gPCI->read_pci_config(info.bus, info.device, info.function, offset,
110		size);
111}
112
113
114static inline void
115SetPCI(pci_info& info, uint8 offset, uint8 size, uint32 value)
116{
117	gPCI->write_pci_config(info.bus, info.device, info.function, offset, size,
118		value);
119}
120
121
122static status_t
123MapDevice(DeviceInfo& di)
124{
125	SharedInfo& si = *(di.sharedInfo);
126	pci_info& pciInfo = di.pciInfo;
127
128	TRACE("enter MapDevice()\n");
129
130	// Enable memory mapped IO and bus master.
131
132	SetPCI(pciInfo, PCI_command, 2, GetPCI(pciInfo, PCI_command, 2)
133		| PCI_command_io | PCI_command_memory | PCI_command_master);
134
135	// Map the video memory.
136
137	phys_addr_t videoRamAddr = pciInfo.u.h0.base_registers[1];
138	uint32 videoRamSize = pciInfo.u.h0.base_register_sizes[1];
139	si.videoMemPCI = videoRamAddr;
140	char frameBufferAreaName[] = "3DFX frame buffer";
141
142	si.videoMemArea = map_physical_memory(
143		frameBufferAreaName,
144		videoRamAddr,
145		videoRamSize,
146		B_ANY_KERNEL_BLOCK_ADDRESS | B_MTR_WC,
147		B_READ_AREA + B_WRITE_AREA,
148		(void**)&si.videoMemAddr);
149
150	TRACE("Video memory, area: %ld,  addr: 0x%lX, size: %ld\n",
151		si.videoMemArea, (uint32)(si.videoMemAddr), videoRamSize);
152
153	if (si.videoMemArea < 0) {
154		// Try to map this time without write combining.
155		si.videoMemArea = map_physical_memory(
156			frameBufferAreaName,
157			videoRamAddr,
158			videoRamSize,
159			B_ANY_KERNEL_BLOCK_ADDRESS,
160			B_READ_AREA + B_WRITE_AREA,
161			(void**)&si.videoMemAddr);
162	}
163
164	if (si.videoMemArea < 0)
165		return si.videoMemArea;
166
167	// Map the MMIO register area.
168
169	phys_addr_t regsBase = pciInfo.u.h0.base_registers[0];
170	uint32 regAreaSize = pciInfo.u.h0.base_register_sizes[0];
171
172	si.regsArea = map_physical_memory("3DFX mmio registers",
173		regsBase,
174		regAreaSize,
175		B_ANY_KERNEL_ADDRESS,
176		0,		// neither read nor write, to hide it from user space apps
177		(void**)&di.regs);
178
179	// If there was an error, delete other areas.
180	if (si.regsArea < 0) {
181		delete_area(si.videoMemArea);
182		si.videoMemArea = -1;
183	}
184
185	TRACE("leave MapDevice(); result: %ld\n", si.regsArea);
186	return si.regsArea;
187}
188
189
190static void
191UnmapDevice(DeviceInfo& di)
192{
193	SharedInfo& si = *(di.sharedInfo);
194
195	if (si.regsArea >= 0)
196		delete_area(si.regsArea);
197	if (si.videoMemArea >= 0)
198		delete_area(si.videoMemArea);
199
200	si.regsArea = si.videoMemArea = -1;
201	si.videoMemAddr = (addr_t)NULL;
202	di.regs = NULL;
203}
204
205
206static status_t
207InitDevice(DeviceInfo& di)
208{
209	// Perform initialization and mapping of the device, and return B_OK if
210	// sucessful;  else, return error code.
211
212	// Create the area for shared info with NO user-space read or write
213	// permissions, to prevent accidental damage.
214
215	TRACE("enter InitDevice()\n");
216
217	size_t sharedSize = (sizeof(SharedInfo) + 7) & ~7;
218
219	di.sharedArea = create_area("3DFX shared info",
220		(void**) &(di.sharedInfo),
221		B_ANY_KERNEL_ADDRESS,
222		ROUND_TO_PAGE_SIZE(sharedSize),
223		B_FULL_LOCK, 0);
224	if (di.sharedArea < 0)
225		return di.sharedArea;	// return error code
226
227	SharedInfo& si = *(di.sharedInfo);
228
229	memset(&si, 0, sharedSize);
230
231	pci_info& pciInfo = di.pciInfo;
232
233	si.vendorID = pciInfo.vendor_id;
234	si.deviceID = pciInfo.device_id;
235	si.revision = pciInfo.revision;
236	si.chipType = di.pChipInfo->chipType;
237	strcpy(si.chipName, di.pChipInfo->chipName);
238
239	status_t status = MapDevice(di);
240	if (status < 0) {
241		delete_area(di.sharedArea);
242		di.sharedArea = -1;
243		di.sharedInfo = NULL;
244		return status;		// return error code
245	}
246
247	return B_OK;
248}
249
250
251static const ChipInfo*
252GetNextSupportedDevice(uint32& pciIndex, pci_info& pciInfo)
253{
254	// Search the PCI devices for a device that is supported by this driver.
255	// The search starts at the device specified by argument pciIndex, and
256	// continues until a supported device is found or there are no more devices
257	// to examine.  Argument pciIndex is incremented after each device is
258	// examined.
259
260	// If a supported device is found, return a pointer to the struct containing
261	// the chip info; else return NULL.
262
263	while (gPCI->get_nth_pci_info(pciIndex, &pciInfo) == B_OK) {
264
265		if (pciInfo.vendor_id == VENDOR_ID) {
266
267			// Search the table of supported devices to find a chip/device that
268			// matches device ID of the current PCI device.
269
270			const ChipInfo* pDevice = chipTable;
271
272			while (pDevice->chipID != 0) {	// end of table?
273				if (pDevice->chipID == pciInfo.device_id)
274					return pDevice;		// matching device/chip found
275
276				pDevice++;
277			}
278		}
279
280		pciIndex++;
281	}
282
283	return NULL;		// no supported device found
284}
285
286
287
288//	#pragma mark - Kernel Interface
289
290
291status_t
292init_hardware(void)
293{
294	// Return B_OK if a device supported by this driver is found; otherwise,
295	// return B_ERROR so the driver will be unloaded.
296
297	if (get_module(B_PCI_MODULE_NAME, (module_info**)&gPCI) != B_OK)
298		return B_ERROR;		// unable to access PCI bus
299
300	// Check pci devices for a device supported by this driver.
301
302	uint32 pciIndex = 0;
303	pci_info pciInfo;
304	const ChipInfo* pDevice = GetNextSupportedDevice(pciIndex, pciInfo);
305
306	TRACE("init_hardware() - %s\n",
307		pDevice == NULL ? "no supported devices" : "device supported");
308
309	put_module(B_PCI_MODULE_NAME);		// put away the module manager
310
311	return (pDevice == NULL ? B_ERROR : B_OK);
312}
313
314
315status_t
316init_driver(void)
317{
318	// Get handle for the pci bus.
319
320	if (get_module(B_PCI_MODULE_NAME, (module_info**)&gPCI) != B_OK)
321		return B_ERROR;
322
323	status_t status = gLock.Init("3DFX driver lock");
324	if (status < B_OK)
325		return status;
326
327	// Get info about all the devices supported by this driver.
328
329	uint32 pciIndex = 0;
330	uint32 count = 0;
331
332	while (count < MAX_DEVICES) {
333		DeviceInfo& di = gDeviceInfo[count];
334
335		const ChipInfo* pDevice = GetNextSupportedDevice(pciIndex, di.pciInfo);
336		if (pDevice == NULL)
337			break;			// all supported devices have been obtained
338
339		// Compose device name.
340		sprintf(di.name, "graphics/" DEVICE_FORMAT,
341				  di.pciInfo.vendor_id, di.pciInfo.device_id,
342				  di.pciInfo.bus, di.pciInfo.device, di.pciInfo.function);
343		TRACE("init_driver() match found; name: %s\n", di.name);
344
345		gDeviceNames[count] = di.name;
346		di.openCount = 0;		// mark driver as available for R/W open
347		di.sharedArea = -1;		// indicate shared area not yet created
348		di.sharedInfo = NULL;
349		di.pChipInfo = pDevice;
350		count++;
351		pciIndex++;
352	}
353
354	gDeviceNames[count] = NULL;	// terminate list with null pointer
355
356	TRACE("init_driver() %ld supported devices\n", count);
357
358	return B_OK;
359}
360
361
362void
363uninit_driver(void)
364{
365	// Free the driver data.
366
367	gLock.Delete();
368	put_module(B_PCI_MODULE_NAME);	// put the pci module away
369}
370
371
372const char**
373publish_devices(void)
374{
375	return (const char**)gDeviceNames;	// return list of supported devices
376}
377
378
379device_hooks*
380find_device(const char* name)
381{
382	int i = 0;
383	while (gDeviceNames[i] != NULL) {
384		if (strcmp(name, gDeviceNames[i]) == 0)
385			return &gDeviceHooks;
386		i++;
387	}
388
389	return NULL;
390}
391
392
393
394//	#pragma mark - Device Hooks
395
396
397static status_t
398device_open(const char* name, uint32 /*flags*/, void** cookie)
399{
400	status_t status = B_OK;
401
402	TRACE("device_open() - name: %s, cookie: 0x%08lx)\n", name, (uint32)cookie);
403
404	// Find the device name in the list of devices.
405
406	int32 i = 0;
407	while (gDeviceNames[i] != NULL && (strcmp(name, gDeviceNames[i]) != 0))
408		i++;
409
410	if (gDeviceNames[i] == NULL)
411		return B_BAD_VALUE;		// device name not found in list of devices
412
413	DeviceInfo& di = gDeviceInfo[i];
414
415	gLock.Acquire();	// make sure no one else has write access to common data
416
417	if (di.openCount == 0)
418		status = InitDevice(di);
419
420	gLock.Release();
421
422	if (status == B_OK) {
423		di.openCount++;		// mark device open
424		*cookie = &di;		// send cookie to opener
425	}
426
427	TRACE("device_open() returning 0x%lx,  open count: %ld\n", status,
428		di.openCount);
429	return status;
430}
431
432
433static status_t
434device_read(void* dev, off_t pos, void* buf, size_t* len)
435{
436	// Following 3 lines of code are here to eliminate "unused parameter" warnings.
437	(void)dev;
438	(void)pos;
439	(void)buf;
440
441	*len = 0;
442	return B_NOT_ALLOWED;
443}
444
445
446static status_t
447device_write(void* dev, off_t pos, const void* buf, size_t* len)
448{
449	// Following 3 lines of code are here to eliminate "unused parameter" warnings.
450	(void)dev;
451	(void)pos;
452	(void)buf;
453
454	*len = 0;
455	return B_NOT_ALLOWED;
456}
457
458
459static status_t
460device_close(void* dev)
461{
462	(void)dev;		// avoid compiler warning for unused arg
463
464	TRACE("device_close()\n");
465	return B_NO_ERROR;
466}
467
468
469static status_t
470device_free(void* dev)
471{
472	DeviceInfo& di = *((DeviceInfo*)dev);
473
474	TRACE("enter device_free()\n");
475
476	gLock.Acquire();		// lock driver
477
478	// If opened multiple times, merely decrement the open count and exit.
479
480	if (di.openCount <= 1) {
481		UnmapDevice(di);	// free regs and frame buffer areas
482
483		delete_area(di.sharedArea);
484		di.sharedArea = -1;
485		di.sharedInfo = NULL;
486	}
487
488	if (di.openCount > 0)
489		di.openCount--;		// mark device available
490
491	gLock.Release();	// unlock driver
492
493	TRACE("exit device_free() openCount: %ld\n", di.openCount);
494	return B_OK;
495}
496
497
498static status_t
499device_ioctl(void* dev, uint32 msg, void* buffer, size_t bufferLength)
500{
501	DeviceInfo& di = *((DeviceInfo*)dev);
502
503#ifndef __HAIKU__
504	(void)bufferLength;		// avoid compiler warning for unused arg
505#endif
506
507	switch (msg) {
508		case B_GET_ACCELERANT_SIGNATURE:
509			strcpy((char*)buffer, ACCELERANT_NAME);
510			return B_OK;
511
512		case TDFX_DEVICE_NAME:
513			strncpy((char*)buffer, di.name, B_OS_NAME_LENGTH);
514			((char*)buffer)[B_OS_NAME_LENGTH -1] = '\0';
515			return B_OK;
516
517		case TDFX_GET_SHARED_DATA:
518#ifdef __HAIKU__
519			if (bufferLength != sizeof(area_id))
520				return B_BAD_DATA;
521#endif
522
523			*((area_id*)buffer) = di.sharedArea;
524			return B_OK;
525
526		case TDFX_GET_PIO_REG:
527		{
528#ifdef __HAIKU__
529			if (bufferLength != sizeof(PIORegInfo))
530				return B_BAD_DATA;
531#endif
532
533			PIORegInfo* regInfo = (PIORegInfo*)buffer;
534			if (regInfo->magic == TDFX_PRIVATE_DATA_MAGIC) {
535				int ioAddr = di.pciInfo.u.h0.base_registers[2] + regInfo->offset;
536				if (regInfo->index >= 0) {
537					gPCI->write_io_8(ioAddr, regInfo->index);
538					regInfo->value = gPCI->read_io_8(ioAddr + 1);
539				} else {
540					regInfo->value = gPCI->read_io_8(ioAddr);
541				}
542				return B_OK;
543			}
544			break;
545		}
546
547		case TDFX_SET_PIO_REG:
548		{
549#ifdef __HAIKU__
550			if (bufferLength != sizeof(PIORegInfo))
551				return B_BAD_DATA;
552#endif
553
554			PIORegInfo* regInfo = (PIORegInfo*)buffer;
555			if (regInfo->magic == TDFX_PRIVATE_DATA_MAGIC) {
556				int ioAddr = di.pciInfo.u.h0.base_registers[2] + regInfo->offset;
557				if (regInfo->index >= 0) {
558					gPCI->write_io_8(ioAddr, regInfo->index);
559					gPCI->write_io_8(ioAddr + 1, regInfo->value);
560				} else {
561					gPCI->write_io_8(ioAddr, regInfo->value);
562				}
563				return B_OK;
564			}
565			break;
566		}
567	}
568
569	return B_DEV_INVALID_IOCTL;
570}
571