1// ****************************************************************************
2//
3//		C3gDco.H
4//
5//		Include file for EchoGals generic driver 3g DSP interface class.
6//
7// ----------------------------------------------------------------------------
8//
9// ----------------------------------------------------------------------------
10//
11// This file is part of Echo Digital Audio's generic driver library.
12// Copyright Echo Digital Audio Corporation (c) 1998 - 2005
13// All rights reserved
14// www.echoaudio.com
15//
16// This library is free software; you can redistribute it and/or
17// modify it under the terms of the GNU Lesser General Public
18// License as published by the Free Software Foundation; either
19// version 2.1 of the License, or (at your option) any later version.
20//
21// This library is distributed in the hope that it will be useful,
22// but WITHOUT ANY WARRANTY; without even the implied warranty of
23// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
24// Lesser General Public License for more details.
25//
26// You should have received a copy of the GNU Lesser General Public
27// License along with this library; if not, write to the Free Software
28// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
29//
30// ****************************************************************************
31
32#ifndef	_3GDSPCOMMOBJECT_
33#define	_3GDSPCOMMOBJECT_
34
35#include "CDspCommObject.h"
36
37class C3gDco : public CDspCommObject
38{
39public:
40	//
41	//	Construction/destruction
42	//
43	C3gDco( PDWORD pdwRegBase, PCOsSupport pOsSupport );
44	virtual ~C3gDco();
45
46	//
47	//	Set the DSP sample rate.
48	//	Return rate that was set, -1 if error
49	//
50	virtual DWORD SetSampleRate( DWORD dwNewSampleRate );
51	//
52	//	Send current setting to DSP & return what it is
53	//
54	virtual DWORD SetSampleRate()
55		{ return( SetSampleRate( GetSampleRate() ) ); }
56
57	//
58	//	Card information
59	//
60	virtual WORD GetCardType()
61		{ return( ECHO3G ); }
62
63	virtual void Get3gBoxType(DWORD *pOriginalBoxType,DWORD *pCurrentBoxType);
64
65	//
66	//	Get mask of all supported digital modes
67	//	(See ECHOCAPS_HAS_DIGITAL_MODE_??? defines in EchoGalsXface.h)
68	//
69	virtual DWORD GetDigitalModes();
70
71	//
72	//	Set input clock
73	//
74	virtual ECHOSTATUS SetInputClock(WORD wClock);
75
76	//
77	//	Set digital mode
78	//
79	virtual ECHOSTATUS SetDigitalMode
80	(
81		BYTE	byNewMode
82	);
83
84	//
85	// Set get S/PDIF output format
86	//
87	virtual void SetProfessionalSpdif( BOOL bNewStatus );
88
89	virtual BOOL IsProfessionalSpdif()
90		{ return( m_bProfessionalSpdif ); }
91
92	//
93	// Get/Set S/PDIF out non-audio status bit
94	//
95	virtual BOOL IsSpdifOutNonAudio()
96	{
97			return m_bNonAudio;
98	}
99
100	virtual void SetSpdifOutNonAudio(BOOL bNonAudio);
101
102	void SetPhantomPower( BOOL fPhantom );
103
104	virtual ECHOSTATUS GetAudioMeters
105	(
106		PECHOGALS_METERS	pMeters
107	);
108
109	BOOL DoubleSpeedMode(DWORD *pdwNewCtrlReg = NULL);
110
111	CChannelMask m_Adat38Mask;
112
113protected:
114
115	//
116	// ASIC loader
117	//
118	virtual BOOL LoadASIC();
119
120	//
121	//	Check status of external box
122	//
123	enum
124	{
125		E3G_ASIC_NOT_LOADED	= 0xffff,
126		E3G_BOX_TYPE_MASK			= 0xf0
127	};
128	virtual BOOL CheckAsicStatus();
129	void SetChannelCounts();
130
131	//
132	//	Returns 3G frequency register
133	//
134	DWORD Get3gFreqReg()
135		{ ECHO_ASSERT(NULL != m_pDspCommPage );
136		  return SWAP( m_pDspCommPage->dw3gFreqReg ); }
137
138	//
139	// Write the control reg
140	//
141	ECHOSTATUS WriteControlReg
142	(
143		DWORD dwControlReg,
144		DWORD	dwFreqReg,
145		BOOL 	fForceWrite = FALSE
146	);
147
148	//
149	// Use this to check if a new control reg setting may be
150	// applied
151	//
152	ECHOSTATUS ValidateCtrlReg(DWORD dwNewControlReg );
153
154	//
155	// Set the various S/PDIF status bits
156	//
157	void SetSpdifBits(DWORD *pdwCtrlReg,DWORD dwSampleRate);
158
159	//
160	// Member variables
161	//
162	BOOL m_bProfessionalSpdif;
163	BOOL m_bNonAudio;
164	DWORD m_dwOriginalBoxType;
165	DWORD m_dwCurrentBoxType;
166	BOOL	m_bBoxTypeSet;
167
168};		// class C3gDco
169
170typedef C3gDco* PC3gDco;
171
172//
173// 3G register bits
174//
175#define E3G_CONVERTER_ENABLE		0x0010
176#define E3G_SPDIF_PRO_MODE			0x0020		// Professional S/PDIF == 1, consumer == 0
177#define E3G_SPDIF_SAMPLE_RATE0	0x0040
178#define E3G_SPDIF_SAMPLE_RATE1	0x0080
179#define E3G_SPDIF_TWO_CHANNEL		0x0100		// 1 == two channels, 0 == one channel
180#define E3G_SPDIF_NOT_AUDIO		0x0200
181#define E3G_SPDIF_COPY_PERMIT		0x0400
182#define E3G_SPDIF_24_BIT			0x0800		// 1 == 24 bit, 0 == 20 bit
183#define E3G_DOUBLE_SPEED_MODE		0x4000		// 1 == double speed, 0 == single speed
184#define E3G_PHANTOM_POWER			0x8000		// 1 == phantom power on, 0 == phantom power off
185
186#define E3G_96KHZ						(0x0 | E3G_DOUBLE_SPEED_MODE)
187#define E3G_88KHZ						(0x1 | E3G_DOUBLE_SPEED_MODE)
188#define E3G_48KHZ						0x2
189#define E3G_44KHZ						0x3
190#define E3G_32KHZ						0x4
191#define E3G_22KHZ						0x5
192#define E3G_16KHZ						0x6
193#define E3G_11KHZ						0x7
194#define E3G_8KHZ						0x8
195#define E3G_SPDIF_CLOCK				0x9
196#define E3G_ADAT_CLOCK				0xA
197#define E3G_WORD_CLOCK				0xB
198#define E3G_CONTINUOUS_CLOCK		0xE
199
200#define E3G_ADAT_MODE				0x1000
201#define E3G_SPDIF_OPTICAL_MODE	0x2000
202
203#define E3G_CLOCK_CLEAR_MASK			0xbfffbff0
204#define E3G_DIGITAL_MODE_CLEAR_MASK	0xffffcfff
205#define E3G_SPDIF_FORMAT_CLEAR_MASK	0xfffff01f
206
207//
208//	Clock detect bits reported by the DSP
209//
210#define E3G_CLOCK_DETECT_BIT_WORD96		0x0001
211#define E3G_CLOCK_DETECT_BIT_WORD48		0x0002
212#define E3G_CLOCK_DETECT_BIT_SPDIF48	0x0004
213#define E3G_CLOCK_DETECT_BIT_ADAT		0x0004
214#define E3G_CLOCK_DETECT_BIT_SPDIF96	0x0008
215#define E3G_CLOCK_DETECT_BIT_WORD		(E3G_CLOCK_DETECT_BIT_WORD96|E3G_CLOCK_DETECT_BIT_WORD48)
216#define E3G_CLOCK_DETECT_BIT_SPDIF		(E3G_CLOCK_DETECT_BIT_SPDIF48|E3G_CLOCK_DETECT_BIT_SPDIF96)
217
218
219//
220// Frequency control register
221//
222#define E3G_MAGIC_NUMBER				   677376000
223#define E3G_FREQ_REG_DEFAULT				(E3G_MAGIC_NUMBER / 48000 - 2)
224#define E3G_FREQ_REG_MAX					0xffff
225
226
227//
228// Other stuff
229//
230#define E3G_MAX_OUTPUTS						16
231
232#endif // _3GDSPCOMMOBJECT_
233
234// **** C3gDco.h ****
235