1/* 2 * Copyright 2002-04, Thomas Kurschel. All rights reserved. 3 * Distributed under the terms of the MIT License. 4 */ 5 6/* 7 Promise TX2 series IDE controller driver 8*/ 9 10#include <KernelExport.h> 11#include <stdlib.h> 12#include <string.h> 13 14#include <ata_adapter.h> 15 16#define debug_level_flow 0 17#define debug_level_error 3 18#define debug_level_info 3 19 20#define DEBUG_MSG_PREFIX "PROMISE TX2 -- " 21 22#include "wrapper.h" 23 24#define PROMISE_TX2_CONTROLLER_MODULE_NAME "busses/ata/promise_tx2/driver_v1" 25#define PROMISE_TX2_CHANNEL_MODULE_NAME "busses/ata/promise_tx2/channel/v1" 26 27 28static ata_for_controller_interface *sATA; 29static ata_adapter_interface *sATAAdapter; 30static device_manager_info *sDeviceManager; 31 32 33static void 34set_channel(void *cookie, ata_channel channel) 35{ 36 sATAAdapter->set_channel((ata_adapter_channel_info *)cookie, channel); 37} 38 39 40static status_t 41write_command_block_regs(void *channel_cookie, ata_task_file *tf, ata_reg_mask mask) 42{ 43 return sATAAdapter->write_command_block_regs((ata_adapter_channel_info *)channel_cookie, tf, mask); 44} 45 46 47static status_t 48read_command_block_regs(void *channel_cookie, ata_task_file *tf, ata_reg_mask mask) 49{ 50 return sATAAdapter->read_command_block_regs((ata_adapter_channel_info *)channel_cookie, tf, mask); 51} 52 53 54static uint8 55get_altstatus(void *channel_cookie) 56{ 57 return sATAAdapter->get_altstatus((ata_adapter_channel_info *)channel_cookie); 58} 59 60 61static status_t 62write_device_control(void *channel_cookie, uint8 val) 63{ 64 return sATAAdapter->write_device_control((ata_adapter_channel_info *)channel_cookie, val); 65} 66 67 68static status_t 69write_pio(void *channel_cookie, uint16 *data, int count, bool force_16bit) 70{ 71 return sATAAdapter->write_pio((ata_adapter_channel_info *)channel_cookie, data, count, force_16bit); 72} 73 74 75static status_t 76read_pio(void *channel_cookie, uint16 *data, int count, bool force_16bit) 77{ 78 return sATAAdapter->read_pio((ata_adapter_channel_info *)channel_cookie, data, count, force_16bit); 79} 80 81 82static int32 83handle_interrupt(void *arg) 84{ 85 ata_adapter_channel_info *channel = (ata_adapter_channel_info *)arg; 86 pci_device_module_info *pci = channel->pci; 87 pci_device *device = channel->device; 88 89 SHOW_FLOW0( 3, "" ); 90 91 if (channel->lost) 92 return B_UNHANDLED_INTERRUPT; 93 94 // the controller always tells us whether it generated the IRQ, so ask it first 95 pci->write_io_8(device, channel->bus_master_base + 1, 0x0b); 96 if ((pci->read_io_8(device, channel->bus_master_base + 3) & 0x20) == 0) 97 return B_UNHANDLED_INTERRUPT; 98 99 return sATAAdapter->inthand(arg); 100} 101 102 103static status_t 104prepare_dma(void *channel_cookie, const physical_entry *sg_list, 105 size_t sg_list_count, bool to_device) 106{ 107 return sATAAdapter->prepare_dma((ata_adapter_channel_info *)channel_cookie, sg_list, sg_list_count, to_device); 108} 109 110 111static status_t 112start_dma(void *channel_cookie) 113{ 114 return sATAAdapter->start_dma((ata_adapter_channel_info *)channel_cookie); 115} 116 117 118static status_t 119finish_dma(void *channel_cookie) 120{ 121 return sATAAdapter->finish_dma((ata_adapter_channel_info *)channel_cookie); 122} 123 124 125static status_t 126init_channel(device_node *node, void **channel_cookie) 127{ 128 return sATAAdapter->init_channel(node, 129 (ata_adapter_channel_info **)channel_cookie, 130 sizeof(ata_adapter_channel_info), handle_interrupt); 131} 132 133 134static void 135uninit_channel(void *channel_cookie) 136{ 137 sATAAdapter->uninit_channel((ata_adapter_channel_info *)channel_cookie); 138} 139 140 141static void channel_removed(void *channel_cookie) 142{ 143 return sATAAdapter->channel_removed( 144 (ata_adapter_channel_info *)channel_cookie); 145} 146 147 148static status_t 149init_controller(device_node *node, void **cookie) 150{ 151 return sATAAdapter->init_controller(node, 152 (ata_adapter_controller_info **)cookie, 153 sizeof(ata_adapter_controller_info)); 154} 155 156 157static void 158uninit_controller(void *controller) 159{ 160 sATAAdapter->uninit_controller( 161 (ata_adapter_controller_info *)controller); 162} 163 164 165static void 166controller_removed(void *controller) 167{ 168 return sATAAdapter->controller_removed( 169 (ata_adapter_controller_info *)controller); 170} 171 172 173// publish node of ide controller 174 175static status_t 176publish_controller(device_node *parent, uint16 bus_master_base, uint8 intnum, 177 io_resource *resources, device_node **node) 178{ 179 device_attr attrs[] = { 180 // properties of this controller for ide bus manager 181 // there are always max. 2 devices 182 { ATA_CONTROLLER_MAX_DEVICES_ITEM, B_UINT8_TYPE, { ui8: 2 }}, 183 // of course we can DMA 184 { ATA_CONTROLLER_CAN_DMA_ITEM, B_UINT8_TYPE, { ui8: 1 }}, 185 // choose any name here 186 { ATA_CONTROLLER_CONTROLLER_NAME_ITEM, B_STRING_TYPE, { string: "Promise TX2" }}, 187 188 // DMA properties 189 // some say it must be dword-aligned, others that it can be byte-aligned; 190 // stay on the safe side 191 { B_DMA_ALIGNMENT, B_UINT32_TYPE, { ui32: 3 }}, 192 // one S/G block must not cross 64K boundary 193 { B_DMA_BOUNDARY, B_UINT32_TYPE, { ui32: 0xffff }}, 194 // size of S/G block is 16 bits with zero being 64K 195 { B_DMA_MAX_SEGMENT_BLOCKS, B_UINT32_TYPE, { ui32: 0x10000 }}, 196 { B_DMA_MAX_SEGMENT_COUNT, B_UINT32_TYPE, 197 { ui32: ATA_ADAPTER_MAX_SG_COUNT }}, 198 { B_DMA_HIGH_ADDRESS, B_UINT64_TYPE, { ui64: 0x100000000LL }}, 199 200 // private data to find controller 201 { ATA_ADAPTER_BUS_MASTER_BASE, B_UINT16_TYPE, { ui16: bus_master_base }}, 202 // store interrupt in controller node 203 { ATA_ADAPTER_INTNUM, B_UINT8_TYPE, { ui8: intnum }}, 204 { NULL } 205 }; 206 207 SHOW_FLOW0(2, ""); 208 209 return sDeviceManager->register_node(parent, 210 PROMISE_TX2_CONTROLLER_MODULE_NAME, attrs, resources, node); 211} 212 213 214// detect pure IDE controller, i.e. without channels 215 216static status_t 217detect_controller(pci_device_module_info *pci, pci_device *pci_device, 218 device_node *parent, uint16 bus_master_base, int8 intnum, 219 device_node **node) 220{ 221 SHOW_FLOW0(3, ""); 222 223 if ((bus_master_base & PCI_address_space) != 1) 224 return B_OK; 225 226 bus_master_base &= ~PCI_address_space; 227 228 { 229 io_resource resources[2] = { 230 { B_IO_PORT, bus_master_base, 16 }, 231 {} 232 }; 233 234 return publish_controller(parent, bus_master_base, intnum, resources, 235 node); 236 } 237} 238 239 240static status_t 241probe_controller(device_node *parent) 242{ 243 pci_device_module_info *pci; 244 pci_device *device; 245 uint16 command_block_base[2]; 246 uint16 control_block_base[2]; 247 uint16 bus_master_base; 248 device_node *controller_node; 249 device_node *channels[2]; 250 uint8 intnum; 251 status_t status; 252 253 SHOW_FLOW0(3, ""); 254 255 if (sDeviceManager->get_driver(parent, (driver_module_info **)&pci, 256 (void **)&device) != B_OK) 257 return B_ERROR; 258 259 command_block_base[0] = pci->read_pci_config(device, PCI_base_registers, 4); 260 control_block_base[0] = pci->read_pci_config(device, PCI_base_registers + 4, 4); 261 command_block_base[1] = pci->read_pci_config(device, PCI_base_registers + 8, 4); 262 control_block_base[1] = pci->read_pci_config(device, PCI_base_registers + 12, 4); 263 bus_master_base = pci->read_pci_config(device, PCI_base_registers + 16, 4); 264 intnum = pci->read_pci_config(device, PCI_interrupt_line, 1); 265 266 command_block_base[0] &= PCI_address_io_mask; 267 control_block_base[0] &= PCI_address_io_mask; 268 command_block_base[1] &= PCI_address_io_mask; 269 control_block_base[1] &= PCI_address_io_mask; 270 bus_master_base &= PCI_address_io_mask; 271 272 status = detect_controller(pci, device, parent, bus_master_base, intnum, 273 &controller_node); 274 if (status != B_OK || controller_node == NULL) 275 return status; 276 277 sATAAdapter->detect_channel(pci, device, controller_node, 278 PROMISE_TX2_CHANNEL_MODULE_NAME, true, 279 command_block_base[0], control_block_base[0], bus_master_base, intnum, 280 0, "Primary Channel", &channels[0], false); 281 282 sATAAdapter->detect_channel(pci, device, controller_node, 283 PROMISE_TX2_CHANNEL_MODULE_NAME, true, 284 command_block_base[1], control_block_base[1], bus_master_base, intnum, 285 1, "Secondary Channel", &channels[1], false); 286 287 return B_OK; 288} 289 290 291module_dependency module_dependencies[] = { 292 { ATA_FOR_CONTROLLER_MODULE_NAME, (module_info **)&sATA }, 293 { B_DEVICE_MANAGER_MODULE_NAME, (module_info **)&sDeviceManager }, 294 { ATA_ADAPTER_MODULE_NAME, (module_info **)&sATAAdapter }, 295 {} 296}; 297 298 299// exported interface 300static ata_controller_interface sChannelInterface = { 301 { 302 { 303 PROMISE_TX2_CHANNEL_MODULE_NAME, 304 0, 305 NULL 306 }, 307 308 NULL, // supports_device() 309 NULL, // register_device() 310 init_channel, 311 uninit_channel, 312 NULL, // register_child_devices() 313 NULL, // rescan_child_devices() 314 channel_removed 315 }, 316 317 set_channel, 318 319 write_command_block_regs, 320 read_command_block_regs, 321 322 get_altstatus, 323 write_device_control, 324 325 write_pio, 326 read_pio, 327 328 prepare_dma, 329 start_dma, 330 finish_dma, 331}; 332 333 334static driver_module_info sControllerInterface = { 335 { 336 PROMISE_TX2_CONTROLLER_MODULE_NAME, 337 0, 338 NULL 339 }, 340 341 NULL, 342 probe_controller, 343 init_controller, 344 uninit_controller, 345 NULL, 346 NULL, 347 controller_removed 348}; 349 350module_info *modules[] = { 351 (module_info *)&sControllerInterface, 352 (module_info *)&sChannelInterface, 353 NULL 354}; 355