1/* Search an insn for pseudo regs that must be in hard regs and are not. 2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 3 1998, 1999, 2000 Free Software Foundation, Inc. 4 5This file is part of GNU CC. 6 7GNU CC is free software; you can redistribute it and/or modify 8it under the terms of the GNU General Public License as published by 9the Free Software Foundation; either version 2, or (at your option) 10any later version. 11 12GNU CC is distributed in the hope that it will be useful, 13but WITHOUT ANY WARRANTY; without even the implied warranty of 14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15GNU General Public License for more details. 16 17You should have received a copy of the GNU General Public License 18along with GNU CC; see the file COPYING. If not, write to 19the Free Software Foundation, 59 Temple Place - Suite 330, 20Boston, MA 02111-1307, USA. */ 21 22 23/* This file contains subroutines used only from the file reload1.c. 24 It knows how to scan one insn for operands and values 25 that need to be copied into registers to make valid code. 26 It also finds other operands and values which are valid 27 but for which equivalent values in registers exist and 28 ought to be used instead. 29 30 Before processing the first insn of the function, call `init_reload'. 31 32 To scan an insn, call `find_reloads'. This does two things: 33 1. sets up tables describing which values must be reloaded 34 for this insn, and what kind of hard regs they must be reloaded into; 35 2. optionally record the locations where those values appear in 36 the data, so they can be replaced properly later. 37 This is done only if the second arg to `find_reloads' is nonzero. 38 39 The third arg to `find_reloads' specifies the number of levels 40 of indirect addressing supported by the machine. If it is zero, 41 indirect addressing is not valid. If it is one, (MEM (REG n)) 42 is valid even if (REG n) did not get a hard register; if it is two, 43 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a 44 hard register, and similarly for higher values. 45 46 Then you must choose the hard regs to reload those pseudo regs into, 47 and generate appropriate load insns before this insn and perhaps 48 also store insns after this insn. Set up the array `reload_reg_rtx' 49 to contain the REG rtx's for the registers you used. In some 50 cases `find_reloads' will return a nonzero value in `reload_reg_rtx' 51 for certain reloads. Then that tells you which register to use, 52 so you do not need to allocate one. But you still do need to add extra 53 instructions to copy the value into and out of that register. 54 55 Finally you must call `subst_reloads' to substitute the reload reg rtx's 56 into the locations already recorded. 57 58NOTE SIDE EFFECTS: 59 60 find_reloads can alter the operands of the instruction it is called on. 61 62 1. Two operands of any sort may be interchanged, if they are in a 63 commutative instruction. 64 This happens only if find_reloads thinks the instruction will compile 65 better that way. 66 67 2. Pseudo-registers that are equivalent to constants are replaced 68 with those constants if they are not in hard registers. 69 701 happens every time find_reloads is called. 712 happens only when REPLACE is 1, which is only when 72actually doing the reloads, not when just counting them. 73 74 75Using a reload register for several reloads in one insn: 76 77When an insn has reloads, it is considered as having three parts: 78the input reloads, the insn itself after reloading, and the output reloads. 79Reloads of values used in memory addresses are often needed for only one part. 80 81When this is so, reload_when_needed records which part needs the reload. 82Two reloads for different parts of the insn can share the same reload 83register. 84 85When a reload is used for addresses in multiple parts, or when it is 86an ordinary operand, it is classified as RELOAD_OTHER, and cannot share 87a register with any other reload. */ 88 89#define REG_OK_STRICT 90 91#include "config.h" 92#include "system.h" 93#include "rtl.h" 94#include "insn-config.h" 95#include "insn-codes.h" 96#include "recog.h" 97#include "reload.h" 98#include "regs.h" 99#include "hard-reg-set.h" 100#include "flags.h" 101#include "real.h" 102#include "output.h" 103#include "expr.h" 104#include "toplev.h" 105 106#ifndef REGISTER_MOVE_COST 107#define REGISTER_MOVE_COST(x, y) 2 108#endif 109 110#ifndef REGNO_MODE_OK_FOR_BASE_P 111#define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO) 112#endif 113 114#ifndef REG_MODE_OK_FOR_BASE_P 115#define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO) 116#endif 117 118/* The variables set up by `find_reloads' are: 119 120 n_reloads number of distinct reloads needed; max reload # + 1 121 tables indexed by reload number 122 reload_in rtx for value to reload from 123 reload_out rtx for where to store reload-reg afterward if nec 124 (often the same as reload_in) 125 reload_reg_class enum reg_class, saying what regs to reload into 126 reload_inmode enum machine_mode; mode this operand should have 127 when reloaded, on input. 128 reload_outmode enum machine_mode; mode this operand should have 129 when reloaded, on output. 130 reload_optional char, nonzero for an optional reload. 131 Optional reloads are ignored unless the 132 value is already sitting in a register. 133 reload_nongroup char, nonzero when a reload must use a register 134 not already allocated to a group. 135 reload_inc int, positive amount to increment or decrement by if 136 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC. 137 Ignored otherwise (don't assume it is zero). 138 reload_in_reg rtx. A reg for which reload_in is the equivalent. 139 If reload_in is a symbol_ref which came from 140 reg_equiv_constant, then this is the pseudo 141 which has that symbol_ref as equivalent. 142 reload_reg_rtx rtx. This is the register to reload into. 143 If it is zero when `find_reloads' returns, 144 you must find a suitable register in the class 145 specified by reload_reg_class, and store here 146 an rtx for that register with mode from 147 reload_inmode or reload_outmode. 148 reload_nocombine char, nonzero if this reload shouldn't be 149 combined with another reload. 150 reload_opnum int, operand number being reloaded. This is 151 used to group related reloads and need not always 152 be equal to the actual operand number in the insn, 153 though it current will be; for in-out operands, it 154 is one of the two operand numbers. 155 reload_when_needed enum, classifies reload as needed either for 156 addressing an input reload, addressing an output, 157 for addressing a non-reloaded mem ref, 158 or for unspecified purposes (i.e., more than one 159 of the above). 160 reload_secondary_p int, 1 if this is a secondary register for one 161 or more reloads. 162 reload_secondary_in_reload 163 reload_secondary_out_reload 164 int, gives the reload number of a secondary 165 reload, when needed; otherwise -1 166 reload_secondary_in_icode 167 reload_secondary_out_icode 168 enum insn_code, if a secondary reload is required, 169 gives the INSN_CODE that uses the secondary 170 reload as a scratch register, or CODE_FOR_nothing 171 if the secondary reload register is to be an 172 intermediate register. */ 173int n_reloads; 174 175rtx reload_in[MAX_RELOADS]; 176rtx reload_out[MAX_RELOADS]; 177enum reg_class reload_reg_class[MAX_RELOADS]; 178enum machine_mode reload_inmode[MAX_RELOADS]; 179enum machine_mode reload_outmode[MAX_RELOADS]; 180rtx reload_reg_rtx[MAX_RELOADS]; 181char reload_optional[MAX_RELOADS]; 182char reload_nongroup[MAX_RELOADS]; 183int reload_inc[MAX_RELOADS]; 184rtx reload_in_reg[MAX_RELOADS]; 185rtx reload_out_reg[MAX_RELOADS]; 186char reload_nocombine[MAX_RELOADS]; 187int reload_opnum[MAX_RELOADS]; 188enum reload_type reload_when_needed[MAX_RELOADS]; 189int reload_secondary_p[MAX_RELOADS]; 190int reload_secondary_in_reload[MAX_RELOADS]; 191int reload_secondary_out_reload[MAX_RELOADS]; 192enum insn_code reload_secondary_in_icode[MAX_RELOADS]; 193enum insn_code reload_secondary_out_icode[MAX_RELOADS]; 194 195/* All the "earlyclobber" operands of the current insn 196 are recorded here. */ 197int n_earlyclobbers; 198rtx reload_earlyclobbers[MAX_RECOG_OPERANDS]; 199 200int reload_n_operands; 201 202/* Replacing reloads. 203 204 If `replace_reloads' is nonzero, then as each reload is recorded 205 an entry is made for it in the table `replacements'. 206 Then later `subst_reloads' can look through that table and 207 perform all the replacements needed. */ 208 209/* Nonzero means record the places to replace. */ 210static int replace_reloads; 211 212/* Each replacement is recorded with a structure like this. */ 213struct replacement 214{ 215 rtx *where; /* Location to store in */ 216 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside 217 a SUBREG; 0 otherwise. */ 218 int what; /* which reload this is for */ 219 enum machine_mode mode; /* mode it must have */ 220}; 221 222static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)]; 223 224/* Number of replacements currently recorded. */ 225static int n_replacements; 226 227/* Used to track what is modified by an operand. */ 228struct decomposition 229{ 230 int reg_flag; /* Nonzero if referencing a register. */ 231 int safe; /* Nonzero if this can't conflict with anything. */ 232 rtx base; /* Base address for MEM. */ 233 HOST_WIDE_INT start; /* Starting offset or register number. */ 234 HOST_WIDE_INT end; /* Ending offset or register number. */ 235}; 236 237#ifdef SECONDARY_MEMORY_NEEDED 238 239/* Save MEMs needed to copy from one class of registers to another. One MEM 240 is used per mode, but normally only one or two modes are ever used. 241 242 We keep two versions, before and after register elimination. The one 243 after register elimination is record separately for each operand. This 244 is done in case the address is not valid to be sure that we separately 245 reload each. */ 246 247static rtx secondary_memlocs[NUM_MACHINE_MODES]; 248static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS]; 249#endif 250 251/* The instruction we are doing reloads for; 252 so we can test whether a register dies in it. */ 253static rtx this_insn; 254 255/* Nonzero if this instruction is a user-specified asm with operands. */ 256static int this_insn_is_asm; 257 258/* If hard_regs_live_known is nonzero, 259 we can tell which hard regs are currently live, 260 at least enough to succeed in choosing dummy reloads. */ 261static int hard_regs_live_known; 262 263/* Indexed by hard reg number, 264 element is nonnegative if hard reg has been spilled. 265 This vector is passed to `find_reloads' as an argument 266 and is not changed here. */ 267static short *static_reload_reg_p; 268 269/* Set to 1 in subst_reg_equivs if it changes anything. */ 270static int subst_reg_equivs_changed; 271 272/* On return from push_reload, holds the reload-number for the OUT 273 operand, which can be different for that from the input operand. */ 274static int output_reloadnum; 275 276 /* Compare two RTX's. */ 277#define MATCHES(x, y) \ 278 (x == y || (x != 0 && (GET_CODE (x) == REG \ 279 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \ 280 : rtx_equal_p (x, y) && ! side_effects_p (x)))) 281 282 /* Indicates if two reloads purposes are for similar enough things that we 283 can merge their reloads. */ 284#define MERGABLE_RELOADS(when1, when2, op1, op2) \ 285 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \ 286 || ((when1) == (when2) && (op1) == (op2)) \ 287 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \ 288 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \ 289 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \ 290 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \ 291 && (when2) == RELOAD_FOR_OTHER_ADDRESS)) 292 293 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */ 294#define MERGE_TO_OTHER(when1, when2, op1, op2) \ 295 ((when1) != (when2) \ 296 || ! ((op1) == (op2) \ 297 || (when1) == RELOAD_FOR_INPUT \ 298 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \ 299 || (when1) == RELOAD_FOR_OTHER_ADDRESS)) 300 301 /* If we are going to reload an address, compute the reload type to 302 use. */ 303#define ADDR_TYPE(type) \ 304 ((type) == RELOAD_FOR_INPUT_ADDRESS \ 305 ? RELOAD_FOR_INPADDR_ADDRESS \ 306 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \ 307 ? RELOAD_FOR_OUTADDR_ADDRESS \ 308 : (type))) 309 310#ifdef HAVE_SECONDARY_RELOADS 311static int push_secondary_reload PROTO((int, rtx, int, int, enum reg_class, 312 enum machine_mode, enum reload_type, 313 enum insn_code *)); 314#endif 315static enum reg_class find_valid_class PROTO((enum machine_mode, int)); 316static int push_reload PROTO((rtx, rtx, rtx *, rtx *, enum reg_class, 317 enum machine_mode, enum machine_mode, 318 int, int, int, enum reload_type)); 319static void push_replacement PROTO((rtx *, int, enum machine_mode)); 320static void combine_reloads PROTO((void)); 321static int find_reusable_reload PROTO((rtx *, rtx, enum reg_class, 322 enum reload_type, int, int)); 323static rtx find_dummy_reload PROTO((rtx, rtx, rtx *, rtx *, 324 enum machine_mode, enum machine_mode, 325 enum reg_class, int, int)); 326static int hard_reg_set_here_p PROTO((int, int, rtx)); 327static struct decomposition decompose PROTO((rtx)); 328static int immune_p PROTO((rtx, rtx, struct decomposition)); 329static int alternative_allows_memconst PROTO((const char *, int)); 330static rtx find_reloads_toplev PROTO((rtx, int, enum reload_type, int, int, rtx)); 331static rtx make_memloc PROTO((rtx, int)); 332static int find_reloads_address PROTO((enum machine_mode, rtx *, rtx, rtx *, 333 int, enum reload_type, int, rtx)); 334static rtx subst_reg_equivs PROTO((rtx, rtx)); 335static rtx subst_indexed_address PROTO((rtx)); 336static int find_reloads_address_1 PROTO((enum machine_mode, rtx, int, rtx *, 337 int, enum reload_type,int, rtx)); 338static void find_reloads_address_part PROTO((rtx, rtx *, enum reg_class, 339 enum machine_mode, int, 340 enum reload_type, int)); 341static rtx find_reloads_subreg_address PROTO((rtx, int, int, enum reload_type, 342 int, rtx)); 343static int find_inc_amount PROTO((rtx, rtx)); 344static int loc_mentioned_in_p PROTO((rtx *, rtx)); 345 346#ifdef HAVE_SECONDARY_RELOADS 347 348/* Determine if any secondary reloads are needed for loading (if IN_P is 349 non-zero) or storing (if IN_P is zero) X to or from a reload register of 350 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads 351 are needed, push them. 352 353 Return the reload number of the secondary reload we made, or -1 if 354 we didn't need one. *PICODE is set to the insn_code to use if we do 355 need a secondary reload. */ 356 357static int 358push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode, 359 type, picode) 360 int in_p; 361 rtx x; 362 int opnum; 363 int optional; 364 enum reg_class reload_class; 365 enum machine_mode reload_mode; 366 enum reload_type type; 367 enum insn_code *picode; 368{ 369 enum reg_class class = NO_REGS; 370 enum machine_mode mode = reload_mode; 371 enum insn_code icode = CODE_FOR_nothing; 372 enum reg_class t_class = NO_REGS; 373 enum machine_mode t_mode = VOIDmode; 374 enum insn_code t_icode = CODE_FOR_nothing; 375 enum reload_type secondary_type; 376 int s_reload, t_reload = -1; 377 378 if (type == RELOAD_FOR_INPUT_ADDRESS 379 || type == RELOAD_FOR_OUTPUT_ADDRESS 380 || type == RELOAD_FOR_INPADDR_ADDRESS 381 || type == RELOAD_FOR_OUTADDR_ADDRESS) 382 secondary_type = type; 383 else 384 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS; 385 386 *picode = CODE_FOR_nothing; 387 388 /* If X is a paradoxical SUBREG, use the inner value to determine both the 389 mode and object being reloaded. */ 390 if (GET_CODE (x) == SUBREG 391 && (GET_MODE_SIZE (GET_MODE (x)) 392 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))) 393 { 394 x = SUBREG_REG (x); 395 reload_mode = GET_MODE (x); 396 } 397 398 /* If X is a pseudo-register that has an equivalent MEM (actually, if it 399 is still a pseudo-register by now, it *must* have an equivalent MEM 400 but we don't want to assume that), use that equivalent when seeing if 401 a secondary reload is needed since whether or not a reload is needed 402 might be sensitive to the form of the MEM. */ 403 404 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER 405 && reg_equiv_mem[REGNO (x)] != 0) 406 x = reg_equiv_mem[REGNO (x)]; 407 408#ifdef SECONDARY_INPUT_RELOAD_CLASS 409 if (in_p) 410 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x); 411#endif 412 413#ifdef SECONDARY_OUTPUT_RELOAD_CLASS 414 if (! in_p) 415 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x); 416#endif 417 418 /* If we don't need any secondary registers, done. */ 419 if (class == NO_REGS) 420 return -1; 421 422 /* Get a possible insn to use. If the predicate doesn't accept X, don't 423 use the insn. */ 424 425 icode = (in_p ? reload_in_optab[(int) reload_mode] 426 : reload_out_optab[(int) reload_mode]); 427 428 if (icode != CODE_FOR_nothing 429 && insn_operand_predicate[(int) icode][in_p] 430 && (! (insn_operand_predicate[(int) icode][in_p]) (x, reload_mode))) 431 icode = CODE_FOR_nothing; 432 433 /* If we will be using an insn, see if it can directly handle the reload 434 register we will be using. If it can, the secondary reload is for a 435 scratch register. If it can't, we will use the secondary reload for 436 an intermediate register and require a tertiary reload for the scratch 437 register. */ 438 439 if (icode != CODE_FOR_nothing) 440 { 441 /* If IN_P is non-zero, the reload register will be the output in 442 operand 0. If IN_P is zero, the reload register will be the input 443 in operand 1. Outputs should have an initial "=", which we must 444 skip. */ 445 446 char insn_letter = insn_operand_constraint[(int) icode][!in_p][in_p]; 447 enum reg_class insn_class 448 = (insn_letter == 'r' ? GENERAL_REGS 449 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter)); 450 451 if (insn_class == NO_REGS 452 || (in_p && insn_operand_constraint[(int) icode][!in_p][0] != '=') 453 /* The scratch register's constraint must start with "=&". */ 454 || insn_operand_constraint[(int) icode][2][0] != '=' 455 || insn_operand_constraint[(int) icode][2][1] != '&') 456 abort (); 457 458 if (reg_class_subset_p (reload_class, insn_class)) 459 mode = insn_operand_mode[(int) icode][2]; 460 else 461 { 462 char t_letter = insn_operand_constraint[(int) icode][2][2]; 463 class = insn_class; 464 t_mode = insn_operand_mode[(int) icode][2]; 465 t_class = (t_letter == 'r' ? GENERAL_REGS 466 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter)); 467 t_icode = icode; 468 icode = CODE_FOR_nothing; 469 } 470 } 471 472 /* This case isn't valid, so fail. Reload is allowed to use the same 473 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but 474 in the case of a secondary register, we actually need two different 475 registers for correct code. We fail here to prevent the possibility of 476 silently generating incorrect code later. 477 478 The convention is that secondary input reloads are valid only if the 479 secondary_class is different from class. If you have such a case, you 480 can not use secondary reloads, you must work around the problem some 481 other way. 482 483 Allow this when MODE is not reload_mode and assume that the generated 484 code handles this case (it does on the Alpha, which is the only place 485 this currently happens). */ 486 487 if (in_p && class == reload_class && mode == reload_mode) 488 abort (); 489 490 /* If we need a tertiary reload, see if we have one we can reuse or else 491 make a new one. */ 492 493 if (t_class != NO_REGS) 494 { 495 for (t_reload = 0; t_reload < n_reloads; t_reload++) 496 if (reload_secondary_p[t_reload] 497 && (reg_class_subset_p (t_class, reload_reg_class[t_reload]) 498 || reg_class_subset_p (reload_reg_class[t_reload], t_class)) 499 && ((in_p && reload_inmode[t_reload] == t_mode) 500 || (! in_p && reload_outmode[t_reload] == t_mode)) 501 && ((in_p && (reload_secondary_in_icode[t_reload] 502 == CODE_FOR_nothing)) 503 || (! in_p &&(reload_secondary_out_icode[t_reload] 504 == CODE_FOR_nothing))) 505 && (reg_class_size[(int) t_class] == 1 || SMALL_REGISTER_CLASSES) 506 && MERGABLE_RELOADS (secondary_type, 507 reload_when_needed[t_reload], 508 opnum, reload_opnum[t_reload])) 509 { 510 if (in_p) 511 reload_inmode[t_reload] = t_mode; 512 if (! in_p) 513 reload_outmode[t_reload] = t_mode; 514 515 if (reg_class_subset_p (t_class, reload_reg_class[t_reload])) 516 reload_reg_class[t_reload] = t_class; 517 518 reload_opnum[t_reload] = MIN (reload_opnum[t_reload], opnum); 519 reload_optional[t_reload] &= optional; 520 reload_secondary_p[t_reload] = 1; 521 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[t_reload], 522 opnum, reload_opnum[t_reload])) 523 reload_when_needed[t_reload] = RELOAD_OTHER; 524 } 525 526 if (t_reload == n_reloads) 527 { 528 /* We need to make a new tertiary reload for this register class. */ 529 reload_in[t_reload] = reload_out[t_reload] = 0; 530 reload_reg_class[t_reload] = t_class; 531 reload_inmode[t_reload] = in_p ? t_mode : VOIDmode; 532 reload_outmode[t_reload] = ! in_p ? t_mode : VOIDmode; 533 reload_reg_rtx[t_reload] = 0; 534 reload_optional[t_reload] = optional; 535 reload_nongroup[t_reload] = 0; 536 reload_inc[t_reload] = 0; 537 /* Maybe we could combine these, but it seems too tricky. */ 538 reload_nocombine[t_reload] = 1; 539 reload_in_reg[t_reload] = 0; 540 reload_out_reg[t_reload] = 0; 541 reload_opnum[t_reload] = opnum; 542 reload_when_needed[t_reload] = secondary_type; 543 reload_secondary_in_reload[t_reload] = -1; 544 reload_secondary_out_reload[t_reload] = -1; 545 reload_secondary_in_icode[t_reload] = CODE_FOR_nothing; 546 reload_secondary_out_icode[t_reload] = CODE_FOR_nothing; 547 reload_secondary_p[t_reload] = 1; 548 549 n_reloads++; 550 } 551 } 552 553 /* See if we can reuse an existing secondary reload. */ 554 for (s_reload = 0; s_reload < n_reloads; s_reload++) 555 if (reload_secondary_p[s_reload] 556 && (reg_class_subset_p (class, reload_reg_class[s_reload]) 557 || reg_class_subset_p (reload_reg_class[s_reload], class)) 558 && ((in_p && reload_inmode[s_reload] == mode) 559 || (! in_p && reload_outmode[s_reload] == mode)) 560 && ((in_p && reload_secondary_in_reload[s_reload] == t_reload) 561 || (! in_p && reload_secondary_out_reload[s_reload] == t_reload)) 562 && ((in_p && reload_secondary_in_icode[s_reload] == t_icode) 563 || (! in_p && reload_secondary_out_icode[s_reload] == t_icode)) 564 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES) 565 && MERGABLE_RELOADS (secondary_type, reload_when_needed[s_reload], 566 opnum, reload_opnum[s_reload])) 567 { 568 if (in_p) 569 reload_inmode[s_reload] = mode; 570 if (! in_p) 571 reload_outmode[s_reload] = mode; 572 573 if (reg_class_subset_p (class, reload_reg_class[s_reload])) 574 reload_reg_class[s_reload] = class; 575 576 reload_opnum[s_reload] = MIN (reload_opnum[s_reload], opnum); 577 reload_optional[s_reload] &= optional; 578 reload_secondary_p[s_reload] = 1; 579 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[s_reload], 580 opnum, reload_opnum[s_reload])) 581 reload_when_needed[s_reload] = RELOAD_OTHER; 582 } 583 584 if (s_reload == n_reloads) 585 { 586#ifdef SECONDARY_MEMORY_NEEDED 587 /* If we need a memory location to copy between the two reload regs, 588 set it up now. Note that we do the input case before making 589 the reload and the output case after. This is due to the 590 way reloads are output. */ 591 592 if (in_p && icode == CODE_FOR_nothing 593 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode)) 594 { 595 get_secondary_mem (x, reload_mode, opnum, type); 596 597 /* We may have just added new reloads. Make sure we add 598 the new reload at the end. */ 599 s_reload = n_reloads; 600 } 601#endif 602 603 /* We need to make a new secondary reload for this register class. */ 604 reload_in[s_reload] = reload_out[s_reload] = 0; 605 reload_reg_class[s_reload] = class; 606 607 reload_inmode[s_reload] = in_p ? mode : VOIDmode; 608 reload_outmode[s_reload] = ! in_p ? mode : VOIDmode; 609 reload_reg_rtx[s_reload] = 0; 610 reload_optional[s_reload] = optional; 611 reload_nongroup[s_reload] = 0; 612 reload_inc[s_reload] = 0; 613 /* Maybe we could combine these, but it seems too tricky. */ 614 reload_nocombine[s_reload] = 1; 615 reload_in_reg[s_reload] = 0; 616 reload_out_reg[s_reload] = 0; 617 reload_opnum[s_reload] = opnum; 618 reload_when_needed[s_reload] = secondary_type; 619 reload_secondary_in_reload[s_reload] = in_p ? t_reload : -1; 620 reload_secondary_out_reload[s_reload] = ! in_p ? t_reload : -1; 621 reload_secondary_in_icode[s_reload] = in_p ? t_icode : CODE_FOR_nothing; 622 reload_secondary_out_icode[s_reload] 623 = ! in_p ? t_icode : CODE_FOR_nothing; 624 reload_secondary_p[s_reload] = 1; 625 626 n_reloads++; 627 628#ifdef SECONDARY_MEMORY_NEEDED 629 if (! in_p && icode == CODE_FOR_nothing 630 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode)) 631 get_secondary_mem (x, mode, opnum, type); 632#endif 633 } 634 635 *picode = icode; 636 return s_reload; 637} 638#endif /* HAVE_SECONDARY_RELOADS */ 639 640#ifdef SECONDARY_MEMORY_NEEDED 641 642/* Return a memory location that will be used to copy X in mode MODE. 643 If we haven't already made a location for this mode in this insn, 644 call find_reloads_address on the location being returned. */ 645 646rtx 647get_secondary_mem (x, mode, opnum, type) 648 rtx x; 649 enum machine_mode mode; 650 int opnum; 651 enum reload_type type; 652{ 653 rtx loc; 654 int mem_valid; 655 656 /* By default, if MODE is narrower than a word, widen it to a word. 657 This is required because most machines that require these memory 658 locations do not support short load and stores from all registers 659 (e.g., FP registers). */ 660 661#ifdef SECONDARY_MEMORY_NEEDED_MODE 662 mode = SECONDARY_MEMORY_NEEDED_MODE (mode); 663#else 664 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD) 665 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0); 666#endif 667 668 /* If we already have made a MEM for this operand in MODE, return it. */ 669 if (secondary_memlocs_elim[(int) mode][opnum] != 0) 670 return secondary_memlocs_elim[(int) mode][opnum]; 671 672 /* If this is the first time we've tried to get a MEM for this mode, 673 allocate a new one. `something_changed' in reload will get set 674 by noticing that the frame size has changed. */ 675 676 if (secondary_memlocs[(int) mode] == 0) 677 { 678#ifdef SECONDARY_MEMORY_NEEDED_RTX 679 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode); 680#else 681 secondary_memlocs[(int) mode] 682 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0); 683#endif 684 } 685 686 /* Get a version of the address doing any eliminations needed. If that 687 didn't give us a new MEM, make a new one if it isn't valid. */ 688 689 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX); 690 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0)); 691 692 if (! mem_valid && loc == secondary_memlocs[(int) mode]) 693 loc = copy_rtx (loc); 694 695 /* The only time the call below will do anything is if the stack 696 offset is too large. In that case IND_LEVELS doesn't matter, so we 697 can just pass a zero. Adjust the type to be the address of the 698 corresponding object. If the address was valid, save the eliminated 699 address. If it wasn't valid, we need to make a reload each time, so 700 don't save it. */ 701 702 if (! mem_valid) 703 { 704 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS 705 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS 706 : RELOAD_OTHER); 707 708 find_reloads_address (mode, NULL_PTR, XEXP (loc, 0), &XEXP (loc, 0), 709 opnum, type, 0, 0); 710 } 711 712 secondary_memlocs_elim[(int) mode][opnum] = loc; 713 return loc; 714} 715 716/* Clear any secondary memory locations we've made. */ 717 718void 719clear_secondary_mem () 720{ 721 bzero ((char *) secondary_memlocs, sizeof secondary_memlocs); 722} 723#endif /* SECONDARY_MEMORY_NEEDED */ 724 725/* Find the largest class for which every register number plus N is valid in 726 M1 (if in range). Abort if no such class exists. */ 727 728static enum reg_class 729find_valid_class (m1, n) 730 enum machine_mode m1; 731 int n; 732{ 733 int class; 734 int regno; 735 enum reg_class best_class; 736 int best_size = 0; 737 738 for (class = 1; class < N_REG_CLASSES; class++) 739 { 740 int bad = 0; 741 for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++) 742 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno) 743 && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n) 744 && ! HARD_REGNO_MODE_OK (regno + n, m1)) 745 bad = 1; 746 747 if (! bad && reg_class_size[class] > best_size) 748 best_class = class, best_size = reg_class_size[class]; 749 } 750 751 if (best_size == 0) 752 abort (); 753 754 return best_class; 755} 756 757/* Return the number of a previously made reload that can be combined with 758 a new one, or n_reloads if none of the existing reloads can be used. 759 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to 760 push_reload, they determine the kind of the new reload that we try to 761 combine. P_IN points to the corresponding value of IN, which can be 762 modified by this function. 763 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */ 764static int 765find_reusable_reload (p_in, out, class, type, opnum, dont_share) 766 rtx *p_in, out; 767 enum reg_class class; 768 enum reload_type type; 769 int opnum, dont_share; 770{ 771 rtx in = *p_in; 772 int i; 773 /* We can't merge two reloads if the output of either one is 774 earlyclobbered. */ 775 776 if (earlyclobber_operand_p (out)) 777 return n_reloads; 778 779 /* We can use an existing reload if the class is right 780 and at least one of IN and OUT is a match 781 and the other is at worst neutral. 782 (A zero compared against anything is neutral.) 783 784 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are 785 for the same thing since that can cause us to need more reload registers 786 than we otherwise would. */ 787 788 for (i = 0; i < n_reloads; i++) 789 if ((reg_class_subset_p (class, reload_reg_class[i]) 790 || reg_class_subset_p (reload_reg_class[i], class)) 791 /* If the existing reload has a register, it must fit our class. */ 792 && (reload_reg_rtx[i] == 0 793 || TEST_HARD_REG_BIT (reg_class_contents[(int) class], 794 true_regnum (reload_reg_rtx[i]))) 795 && ((in != 0 && MATCHES (reload_in[i], in) && ! dont_share 796 && (out == 0 || reload_out[i] == 0 || MATCHES (reload_out[i], out))) 797 || 798 (out != 0 && MATCHES (reload_out[i], out) 799 && (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in)))) 800 && (reload_out[i] == 0 || ! earlyclobber_operand_p (reload_out[i])) 801 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES) 802 && MERGABLE_RELOADS (type, reload_when_needed[i], 803 opnum, reload_opnum[i])) 804 return i; 805 806 /* Reloading a plain reg for input can match a reload to postincrement 807 that reg, since the postincrement's value is the right value. 808 Likewise, it can match a preincrement reload, since we regard 809 the preincrementation as happening before any ref in this insn 810 to that register. */ 811 for (i = 0; i < n_reloads; i++) 812 if ((reg_class_subset_p (class, reload_reg_class[i]) 813 || reg_class_subset_p (reload_reg_class[i], class)) 814 /* If the existing reload has a register, it must fit our 815 class. */ 816 && (reload_reg_rtx[i] == 0 817 || TEST_HARD_REG_BIT (reg_class_contents[(int) class], 818 true_regnum (reload_reg_rtx[i]))) 819 && out == 0 && reload_out[i] == 0 && reload_in[i] != 0 820 && ((GET_CODE (in) == REG 821 && (GET_CODE (reload_in[i]) == POST_INC 822 || GET_CODE (reload_in[i]) == POST_DEC 823 || GET_CODE (reload_in[i]) == PRE_INC 824 || GET_CODE (reload_in[i]) == PRE_DEC) 825 && MATCHES (XEXP (reload_in[i], 0), in)) 826 || 827 (GET_CODE (reload_in[i]) == REG 828 && (GET_CODE (in) == POST_INC 829 || GET_CODE (in) == POST_DEC 830 || GET_CODE (in) == PRE_INC 831 || GET_CODE (in) == PRE_DEC) 832 && MATCHES (XEXP (in, 0), reload_in[i]))) 833 && (reload_out[i] == 0 || ! earlyclobber_operand_p (reload_out[i])) 834 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES) 835 && MERGABLE_RELOADS (type, reload_when_needed[i], 836 opnum, reload_opnum[i])) 837 { 838 /* Make sure reload_in ultimately has the increment, 839 not the plain register. */ 840 if (GET_CODE (in) == REG) 841 *p_in = reload_in[i]; 842 return i; 843 } 844 return n_reloads; 845} 846 847/* Record one reload that needs to be performed. 848 IN is an rtx saying where the data are to be found before this instruction. 849 OUT says where they must be stored after the instruction. 850 (IN is zero for data not read, and OUT is zero for data not written.) 851 INLOC and OUTLOC point to the places in the instructions where 852 IN and OUT were found. 853 If IN and OUT are both non-zero, it means the same register must be used 854 to reload both IN and OUT. 855 856 CLASS is a register class required for the reloaded data. 857 INMODE is the machine mode that the instruction requires 858 for the reg that replaces IN and OUTMODE is likewise for OUT. 859 860 If IN is zero, then OUT's location and mode should be passed as 861 INLOC and INMODE. 862 863 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx. 864 865 OPTIONAL nonzero means this reload does not need to be performed: 866 it can be discarded if that is more convenient. 867 868 OPNUM and TYPE say what the purpose of this reload is. 869 870 The return value is the reload-number for this reload. 871 872 If both IN and OUT are nonzero, in some rare cases we might 873 want to make two separate reloads. (Actually we never do this now.) 874 Therefore, the reload-number for OUT is stored in 875 output_reloadnum when we return; the return value applies to IN. 876 Usually (presently always), when IN and OUT are nonzero, 877 the two reload-numbers are equal, but the caller should be careful to 878 distinguish them. */ 879 880static int 881push_reload (in, out, inloc, outloc, class, 882 inmode, outmode, strict_low, optional, opnum, type) 883 rtx in, out; 884 rtx *inloc, *outloc; 885 enum reg_class class; 886 enum machine_mode inmode, outmode; 887 int strict_low; 888 int optional; 889 int opnum; 890 enum reload_type type; 891{ 892 register int i; 893 int dont_share = 0; 894 int dont_remove_subreg = 0; 895 rtx *in_subreg_loc = 0, *out_subreg_loc = 0; 896 int secondary_in_reload = -1, secondary_out_reload = -1; 897 enum insn_code secondary_in_icode = CODE_FOR_nothing; 898 enum insn_code secondary_out_icode = CODE_FOR_nothing; 899 900 /* INMODE and/or OUTMODE could be VOIDmode if no mode 901 has been specified for the operand. In that case, 902 use the operand's mode as the mode to reload. */ 903 if (inmode == VOIDmode && in != 0) 904 inmode = GET_MODE (in); 905 if (outmode == VOIDmode && out != 0) 906 outmode = GET_MODE (out); 907 908 /* If IN is a pseudo register everywhere-equivalent to a constant, and 909 it is not in a hard register, reload straight from the constant, 910 since we want to get rid of such pseudo registers. 911 Often this is done earlier, but not always in find_reloads_address. */ 912 if (in != 0 && GET_CODE (in) == REG) 913 { 914 register int regno = REGNO (in); 915 916 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 917 && reg_equiv_constant[regno] != 0) 918 in = reg_equiv_constant[regno]; 919 } 920 921 /* Likewise for OUT. Of course, OUT will never be equivalent to 922 an actual constant, but it might be equivalent to a memory location 923 (in the case of a parameter). */ 924 if (out != 0 && GET_CODE (out) == REG) 925 { 926 register int regno = REGNO (out); 927 928 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 929 && reg_equiv_constant[regno] != 0) 930 out = reg_equiv_constant[regno]; 931 } 932 933 /* If we have a read-write operand with an address side-effect, 934 change either IN or OUT so the side-effect happens only once. */ 935 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out)) 936 { 937 if (GET_CODE (XEXP (in, 0)) == POST_INC 938 || GET_CODE (XEXP (in, 0)) == POST_DEC) 939 in = gen_rtx_MEM (GET_MODE (in), XEXP (XEXP (in, 0), 0)); 940 if (GET_CODE (XEXP (in, 0)) == PRE_INC 941 || GET_CODE (XEXP (in, 0)) == PRE_DEC) 942 out = gen_rtx_MEM (GET_MODE (out), XEXP (XEXP (out, 0), 0)); 943 } 944 945 /* If we are reloading a (SUBREG constant ...), really reload just the 946 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)). 947 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still 948 a pseudo and hence will become a MEM) with M1 wider than M2 and the 949 register is a pseudo, also reload the inside expression. 950 For machines that extend byte loads, do this for any SUBREG of a pseudo 951 where both M1 and M2 are a word or smaller, M1 is wider than M2, and 952 M2 is an integral mode that gets extended when loaded. 953 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where 954 either M1 is not valid for R or M2 is wider than a word but we only 955 need one word to store an M2-sized quantity in R. 956 (However, if OUT is nonzero, we need to reload the reg *and* 957 the subreg, so do nothing here, and let following statement handle it.) 958 959 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere; 960 we can't handle it here because CONST_INT does not indicate a mode. 961 962 Similarly, we must reload the inside expression if we have a 963 STRICT_LOW_PART (presumably, in == out in the cas). 964 965 Also reload the inner expression if it does not require a secondary 966 reload but the SUBREG does. 967 968 Finally, reload the inner expression if it is a register that is in 969 the class whose registers cannot be referenced in a different size 970 and M1 is not the same size as M2. If SUBREG_WORD is nonzero, we 971 cannot reload just the inside since we might end up with the wrong 972 register class. But if it is inside a STRICT_LOW_PART, we have 973 no choice, so we hope we do get the right register class there. */ 974 975 if (in != 0 && GET_CODE (in) == SUBREG 976 && (SUBREG_WORD (in) == 0 || strict_low) 977#ifdef CLASS_CANNOT_CHANGE_SIZE 978 && class != CLASS_CANNOT_CHANGE_SIZE 979#endif 980 && (CONSTANT_P (SUBREG_REG (in)) 981 || GET_CODE (SUBREG_REG (in)) == PLUS 982 || strict_low 983 || (((GET_CODE (SUBREG_REG (in)) == REG 984 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER) 985 || GET_CODE (SUBREG_REG (in)) == MEM) 986 && ((GET_MODE_SIZE (inmode) 987 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))) 988#ifdef LOAD_EXTEND_OP 989 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD 990 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 991 <= UNITS_PER_WORD) 992 && (GET_MODE_SIZE (inmode) 993 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))) 994 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in))) 995 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL) 996#endif 997#ifdef WORD_REGISTER_OPERATIONS 998 || ((GET_MODE_SIZE (inmode) 999 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))) 1000 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD == 1001 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1) 1002 / UNITS_PER_WORD))) 1003#endif 1004 )) 1005 || (GET_CODE (SUBREG_REG (in)) == REG 1006 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER 1007 /* The case where out is nonzero 1008 is handled differently in the following statement. */ 1009 && (out == 0 || SUBREG_WORD (in) == 0) 1010 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD 1011 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 1012 > UNITS_PER_WORD) 1013 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 1014 / UNITS_PER_WORD) 1015 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)), 1016 GET_MODE (SUBREG_REG (in))))) 1017 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in)) 1018 + SUBREG_WORD (in)), 1019 inmode))) 1020#ifdef SECONDARY_INPUT_RELOAD_CLASS 1021 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS 1022 && (SECONDARY_INPUT_RELOAD_CLASS (class, 1023 GET_MODE (SUBREG_REG (in)), 1024 SUBREG_REG (in)) 1025 == NO_REGS)) 1026#endif 1027#ifdef CLASS_CANNOT_CHANGE_SIZE 1028 || (GET_CODE (SUBREG_REG (in)) == REG 1029 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER 1030 && (TEST_HARD_REG_BIT 1031 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE], 1032 REGNO (SUBREG_REG (in)))) 1033 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 1034 != GET_MODE_SIZE (inmode))) 1035#endif 1036 )) 1037 { 1038 in_subreg_loc = inloc; 1039 inloc = &SUBREG_REG (in); 1040 in = *inloc; 1041#if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS) 1042 if (GET_CODE (in) == MEM) 1043 /* This is supposed to happen only for paradoxical subregs made by 1044 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */ 1045 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode)) 1046 abort (); 1047#endif 1048 inmode = GET_MODE (in); 1049 } 1050 1051 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where 1052 either M1 is not valid for R or M2 is wider than a word but we only 1053 need one word to store an M2-sized quantity in R. 1054 1055 However, we must reload the inner reg *as well as* the subreg in 1056 that case. */ 1057 1058 /* Similar issue for (SUBREG constant ...) if it was not handled by the 1059 code above. This can happen if SUBREG_WORD != 0. */ 1060 1061 if (in != 0 && GET_CODE (in) == SUBREG 1062 && (CONSTANT_P (SUBREG_REG (in)) 1063 || (GET_CODE (SUBREG_REG (in)) == REG 1064 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER 1065 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in)) 1066 + SUBREG_WORD (in), 1067 inmode) 1068 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD 1069 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 1070 > UNITS_PER_WORD) 1071 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 1072 / UNITS_PER_WORD) 1073 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)), 1074 GET_MODE (SUBREG_REG (in))))))))) 1075 { 1076 /* This relies on the fact that emit_reload_insns outputs the 1077 instructions for input reloads of type RELOAD_OTHER in the same 1078 order as the reloads. Thus if the outer reload is also of type 1079 RELOAD_OTHER, we are guaranteed that this inner reload will be 1080 output before the outer reload. */ 1081 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), NULL_PTR, 1082 find_valid_class (inmode, SUBREG_WORD (in)), 1083 VOIDmode, VOIDmode, 0, 0, opnum, type); 1084 dont_remove_subreg = 1; 1085 } 1086 1087 /* Similarly for paradoxical and problematical SUBREGs on the output. 1088 Note that there is no reason we need worry about the previous value 1089 of SUBREG_REG (out); even if wider than out, 1090 storing in a subreg is entitled to clobber it all 1091 (except in the case of STRICT_LOW_PART, 1092 and in that case the constraint should label it input-output.) */ 1093 if (out != 0 && GET_CODE (out) == SUBREG 1094 && (SUBREG_WORD (out) == 0 || strict_low) 1095#ifdef CLASS_CANNOT_CHANGE_SIZE 1096 && class != CLASS_CANNOT_CHANGE_SIZE 1097#endif 1098 && (CONSTANT_P (SUBREG_REG (out)) 1099 || strict_low 1100 || (((GET_CODE (SUBREG_REG (out)) == REG 1101 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER) 1102 || GET_CODE (SUBREG_REG (out)) == MEM) 1103 && ((GET_MODE_SIZE (outmode) 1104 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))) 1105#ifdef WORD_REGISTER_OPERATIONS 1106 || ((GET_MODE_SIZE (outmode) 1107 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))) 1108 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD == 1109 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1) 1110 / UNITS_PER_WORD))) 1111#endif 1112 )) 1113 || (GET_CODE (SUBREG_REG (out)) == REG 1114 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER 1115 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD 1116 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) 1117 > UNITS_PER_WORD) 1118 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) 1119 / UNITS_PER_WORD) 1120 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)), 1121 GET_MODE (SUBREG_REG (out))))) 1122 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out)) 1123 + SUBREG_WORD (out)), 1124 outmode))) 1125#ifdef SECONDARY_OUTPUT_RELOAD_CLASS 1126 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS 1127 && (SECONDARY_OUTPUT_RELOAD_CLASS (class, 1128 GET_MODE (SUBREG_REG (out)), 1129 SUBREG_REG (out)) 1130 == NO_REGS)) 1131#endif 1132#ifdef CLASS_CANNOT_CHANGE_SIZE 1133 || (GET_CODE (SUBREG_REG (out)) == REG 1134 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER 1135 && (TEST_HARD_REG_BIT 1136 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE], 1137 REGNO (SUBREG_REG (out)))) 1138 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) 1139 != GET_MODE_SIZE (outmode))) 1140#endif 1141 )) 1142 { 1143 out_subreg_loc = outloc; 1144 outloc = &SUBREG_REG (out); 1145 out = *outloc; 1146#if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS) 1147 if (GET_CODE (out) == MEM 1148 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode)) 1149 abort (); 1150#endif 1151 outmode = GET_MODE (out); 1152 } 1153 1154 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where 1155 either M1 is not valid for R or M2 is wider than a word but we only 1156 need one word to store an M2-sized quantity in R. 1157 1158 However, we must reload the inner reg *as well as* the subreg in 1159 that case. In this case, the inner reg is an in-out reload. */ 1160 1161 if (out != 0 && GET_CODE (out) == SUBREG 1162 && GET_CODE (SUBREG_REG (out)) == REG 1163 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER 1164 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out)) + SUBREG_WORD (out), 1165 outmode) 1166 || (GET_MODE_SIZE (outmode) <= UNITS_PER_WORD 1167 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) 1168 > UNITS_PER_WORD) 1169 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) 1170 / UNITS_PER_WORD) 1171 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)), 1172 GET_MODE (SUBREG_REG (out))))))) 1173 { 1174 /* This relies on the fact that emit_reload_insns outputs the 1175 instructions for output reloads of type RELOAD_OTHER in reverse 1176 order of the reloads. Thus if the outer reload is also of type 1177 RELOAD_OTHER, we are guaranteed that this inner reload will be 1178 output after the outer reload. */ 1179 dont_remove_subreg = 1; 1180 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out), 1181 &SUBREG_REG (out), 1182 find_valid_class (outmode, SUBREG_WORD (out)), 1183 VOIDmode, VOIDmode, 0, 0, 1184 opnum, RELOAD_OTHER); 1185 } 1186 1187 /* If IN appears in OUT, we can't share any input-only reload for IN. */ 1188 if (in != 0 && out != 0 && GET_CODE (out) == MEM 1189 && (GET_CODE (in) == REG || GET_CODE (in) == MEM) 1190 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0))) 1191 dont_share = 1; 1192 1193 /* If IN is a SUBREG of a hard register, make a new REG. This 1194 simplifies some of the cases below. */ 1195 1196 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG 1197 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER 1198 && ! dont_remove_subreg) 1199 in = gen_rtx_REG (GET_MODE (in), 1200 REGNO (SUBREG_REG (in)) + SUBREG_WORD (in)); 1201 1202 /* Similarly for OUT. */ 1203 if (out != 0 && GET_CODE (out) == SUBREG 1204 && GET_CODE (SUBREG_REG (out)) == REG 1205 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER 1206 && ! dont_remove_subreg) 1207 out = gen_rtx_REG (GET_MODE (out), 1208 REGNO (SUBREG_REG (out)) + SUBREG_WORD (out)); 1209 1210 /* Narrow down the class of register wanted if that is 1211 desirable on this machine for efficiency. */ 1212 if (in != 0) 1213 class = PREFERRED_RELOAD_CLASS (in, class); 1214 1215 /* Output reloads may need analogous treatment, different in detail. */ 1216#ifdef PREFERRED_OUTPUT_RELOAD_CLASS 1217 if (out != 0) 1218 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class); 1219#endif 1220 1221 /* Make sure we use a class that can handle the actual pseudo 1222 inside any subreg. For example, on the 386, QImode regs 1223 can appear within SImode subregs. Although GENERAL_REGS 1224 can handle SImode, QImode needs a smaller class. */ 1225#ifdef LIMIT_RELOAD_CLASS 1226 if (in_subreg_loc) 1227 class = LIMIT_RELOAD_CLASS (inmode, class); 1228 else if (in != 0 && GET_CODE (in) == SUBREG) 1229 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class); 1230 1231 if (out_subreg_loc) 1232 class = LIMIT_RELOAD_CLASS (outmode, class); 1233 if (out != 0 && GET_CODE (out) == SUBREG) 1234 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class); 1235#endif 1236 1237 /* Verify that this class is at least possible for the mode that 1238 is specified. */ 1239 if (this_insn_is_asm) 1240 { 1241 enum machine_mode mode; 1242 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode)) 1243 mode = inmode; 1244 else 1245 mode = outmode; 1246 if (mode == VOIDmode) 1247 { 1248 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'"); 1249 mode = word_mode; 1250 if (in != 0) 1251 inmode = word_mode; 1252 if (out != 0) 1253 outmode = word_mode; 1254 } 1255 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 1256 if (HARD_REGNO_MODE_OK (i, mode) 1257 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i)) 1258 { 1259 int nregs = HARD_REGNO_NREGS (i, mode); 1260 1261 int j; 1262 for (j = 1; j < nregs; j++) 1263 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j)) 1264 break; 1265 if (j == nregs) 1266 break; 1267 } 1268 if (i == FIRST_PSEUDO_REGISTER) 1269 { 1270 error_for_asm (this_insn, "impossible register constraint in `asm'"); 1271 class = ALL_REGS; 1272 } 1273 } 1274 1275 /* Optional output reloads are always OK even if we have no register class, 1276 since the function of these reloads is only to have spill_reg_store etc. 1277 set, so that the storing insn can be deleted later. */ 1278 if (class == NO_REGS 1279 && (optional == 0 || type != RELOAD_FOR_OUTPUT)) 1280 abort (); 1281 1282 i = find_reusable_reload (&in, out, class, type, opnum, dont_share); 1283 1284 if (i == n_reloads) 1285 { 1286 /* See if we need a secondary reload register to move between CLASS 1287 and IN or CLASS and OUT. Get the icode and push any required reloads 1288 needed for each of them if so. */ 1289 1290#ifdef SECONDARY_INPUT_RELOAD_CLASS 1291 if (in != 0) 1292 secondary_in_reload 1293 = push_secondary_reload (1, in, opnum, optional, class, inmode, type, 1294 &secondary_in_icode); 1295#endif 1296 1297#ifdef SECONDARY_OUTPUT_RELOAD_CLASS 1298 if (out != 0 && GET_CODE (out) != SCRATCH) 1299 secondary_out_reload 1300 = push_secondary_reload (0, out, opnum, optional, class, outmode, 1301 type, &secondary_out_icode); 1302#endif 1303 1304 /* We found no existing reload suitable for re-use. 1305 So add an additional reload. */ 1306 1307#ifdef SECONDARY_MEMORY_NEEDED 1308 /* If a memory location is needed for the copy, make one. */ 1309 if (in != 0 && GET_CODE (in) == REG 1310 && REGNO (in) < FIRST_PSEUDO_REGISTER 1311 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)), 1312 class, inmode)) 1313 get_secondary_mem (in, inmode, opnum, type); 1314#endif 1315 1316 i = n_reloads; 1317 reload_in[i] = in; 1318 reload_out[i] = out; 1319 reload_reg_class[i] = class; 1320 reload_inmode[i] = inmode; 1321 reload_outmode[i] = outmode; 1322 reload_reg_rtx[i] = 0; 1323 reload_optional[i] = optional; 1324 reload_nongroup[i] = 0; 1325 reload_inc[i] = 0; 1326 reload_nocombine[i] = 0; 1327 reload_in_reg[i] = inloc ? *inloc : 0; 1328 reload_out_reg[i] = outloc ? *outloc : 0; 1329 reload_opnum[i] = opnum; 1330 reload_when_needed[i] = type; 1331 reload_secondary_in_reload[i] = secondary_in_reload; 1332 reload_secondary_out_reload[i] = secondary_out_reload; 1333 reload_secondary_in_icode[i] = secondary_in_icode; 1334 reload_secondary_out_icode[i] = secondary_out_icode; 1335 reload_secondary_p[i] = 0; 1336 1337 n_reloads++; 1338 1339#ifdef SECONDARY_MEMORY_NEEDED 1340 if (out != 0 && GET_CODE (out) == REG 1341 && REGNO (out) < FIRST_PSEUDO_REGISTER 1342 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)), 1343 outmode)) 1344 get_secondary_mem (out, outmode, opnum, type); 1345#endif 1346 } 1347 else 1348 { 1349 /* We are reusing an existing reload, 1350 but we may have additional information for it. 1351 For example, we may now have both IN and OUT 1352 while the old one may have just one of them. */ 1353 1354 /* The modes can be different. If they are, we want to reload in 1355 the larger mode, so that the value is valid for both modes. */ 1356 if (inmode != VOIDmode 1357 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (reload_inmode[i])) 1358 reload_inmode[i] = inmode; 1359 if (outmode != VOIDmode 1360 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (reload_outmode[i])) 1361 reload_outmode[i] = outmode; 1362 if (in != 0) 1363 { 1364 rtx in_reg = inloc ? *inloc : 0; 1365 /* If we merge reloads for two distinct rtl expressions that 1366 are identical in content, there might be duplicate address 1367 reloads. Remove the extra set now, so that if we later find 1368 that we can inherit this reload, we can get rid of the 1369 address reloads altogether. 1370 1371 Do not do this if both reloads are optional since the result 1372 would be an optional reload which could potentially leave 1373 unresolved address replacements. 1374 1375 It is not sufficient to call transfer_replacements since 1376 choose_reload_regs will remove the replacements for address 1377 reloads of inherited reloads which results in the same 1378 problem. */ 1379 if (reload_in[i] != in && rtx_equal_p (in, reload_in[i]) 1380 && ! (reload_optional[i] && optional)) 1381 { 1382 /* We must keep the address reload with the lower operand 1383 number alive. */ 1384 if (opnum > reload_opnum[i]) 1385 { 1386 remove_address_replacements (in); 1387 in = reload_in[i]; 1388 in_reg = reload_in_reg[i]; 1389 } 1390 else 1391 remove_address_replacements (reload_in[i]); 1392 } 1393 reload_in[i] = in; 1394 reload_in_reg[i] = in_reg; 1395 } 1396 if (out != 0) 1397 { 1398 reload_out[i] = out; 1399 reload_out_reg[i] = outloc ? *outloc : 0; 1400 } 1401 if (reg_class_subset_p (class, reload_reg_class[i])) 1402 reload_reg_class[i] = class; 1403 reload_optional[i] &= optional; 1404 if (MERGE_TO_OTHER (type, reload_when_needed[i], 1405 opnum, reload_opnum[i])) 1406 reload_when_needed[i] = RELOAD_OTHER; 1407 reload_opnum[i] = MIN (reload_opnum[i], opnum); 1408 } 1409 1410 /* If the ostensible rtx being reload differs from the rtx found 1411 in the location to substitute, this reload is not safe to combine 1412 because we cannot reliably tell whether it appears in the insn. */ 1413 1414 if (in != 0 && in != *inloc) 1415 reload_nocombine[i] = 1; 1416 1417#if 0 1418 /* This was replaced by changes in find_reloads_address_1 and the new 1419 function inc_for_reload, which go with a new meaning of reload_inc. */ 1420 1421 /* If this is an IN/OUT reload in an insn that sets the CC, 1422 it must be for an autoincrement. It doesn't work to store 1423 the incremented value after the insn because that would clobber the CC. 1424 So we must do the increment of the value reloaded from, 1425 increment it, store it back, then decrement again. */ 1426 if (out != 0 && sets_cc0_p (PATTERN (this_insn))) 1427 { 1428 out = 0; 1429 reload_out[i] = 0; 1430 reload_inc[i] = find_inc_amount (PATTERN (this_insn), in); 1431 /* If we did not find a nonzero amount-to-increment-by, 1432 that contradicts the belief that IN is being incremented 1433 in an address in this insn. */ 1434 if (reload_inc[i] == 0) 1435 abort (); 1436 } 1437#endif 1438 1439 /* If we will replace IN and OUT with the reload-reg, 1440 record where they are located so that substitution need 1441 not do a tree walk. */ 1442 1443 if (replace_reloads) 1444 { 1445 if (inloc != 0) 1446 { 1447 register struct replacement *r = &replacements[n_replacements++]; 1448 r->what = i; 1449 r->subreg_loc = in_subreg_loc; 1450 r->where = inloc; 1451 r->mode = inmode; 1452 } 1453 if (outloc != 0 && outloc != inloc) 1454 { 1455 register struct replacement *r = &replacements[n_replacements++]; 1456 r->what = i; 1457 r->where = outloc; 1458 r->subreg_loc = out_subreg_loc; 1459 r->mode = outmode; 1460 } 1461 } 1462 1463 /* If this reload is just being introduced and it has both 1464 an incoming quantity and an outgoing quantity that are 1465 supposed to be made to match, see if either one of the two 1466 can serve as the place to reload into. 1467 1468 If one of them is acceptable, set reload_reg_rtx[i] 1469 to that one. */ 1470 1471 if (in != 0 && out != 0 && in != out && reload_reg_rtx[i] == 0) 1472 { 1473 reload_reg_rtx[i] = find_dummy_reload (in, out, inloc, outloc, 1474 inmode, outmode, 1475 reload_reg_class[i], i, 1476 earlyclobber_operand_p (out)); 1477 1478 /* If the outgoing register already contains the same value 1479 as the incoming one, we can dispense with loading it. 1480 The easiest way to tell the caller that is to give a phony 1481 value for the incoming operand (same as outgoing one). */ 1482 if (reload_reg_rtx[i] == out 1483 && (GET_CODE (in) == REG || CONSTANT_P (in)) 1484 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out), 1485 static_reload_reg_p, i, inmode)) 1486 reload_in[i] = out; 1487 } 1488 1489 /* If this is an input reload and the operand contains a register that 1490 dies in this insn and is used nowhere else, see if it is the right class 1491 to be used for this reload. Use it if so. (This occurs most commonly 1492 in the case of paradoxical SUBREGs and in-out reloads). We cannot do 1493 this if it is also an output reload that mentions the register unless 1494 the output is a SUBREG that clobbers an entire register. 1495 1496 Note that the operand might be one of the spill regs, if it is a 1497 pseudo reg and we are in a block where spilling has not taken place. 1498 But if there is no spilling in this block, that is OK. 1499 An explicitly used hard reg cannot be a spill reg. */ 1500 1501 if (reload_reg_rtx[i] == 0 && in != 0) 1502 { 1503 rtx note; 1504 int regno; 1505 1506 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1)) 1507 if (REG_NOTE_KIND (note) == REG_DEAD 1508 && GET_CODE (XEXP (note, 0)) == REG 1509 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER 1510 && reg_mentioned_p (XEXP (note, 0), in) 1511 && ! refers_to_regno_for_reload_p (regno, 1512 (regno 1513 + HARD_REGNO_NREGS (regno, 1514 inmode)), 1515 PATTERN (this_insn), inloc) 1516 /* If this is also an output reload, IN cannot be used as 1517 the reload register if it is set in this insn unless IN 1518 is also OUT. */ 1519 && (out == 0 || in == out 1520 || ! hard_reg_set_here_p (regno, 1521 (regno 1522 + HARD_REGNO_NREGS (regno, 1523 inmode)), 1524 PATTERN (this_insn))) 1525 /* ??? Why is this code so different from the previous? 1526 Is there any simple coherent way to describe the two together? 1527 What's going on here. */ 1528 && (in != out 1529 || (GET_CODE (in) == SUBREG 1530 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1)) 1531 / UNITS_PER_WORD) 1532 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 1533 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))) 1534 /* Make sure the operand fits in the reg that dies. */ 1535 && GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))) 1536 && HARD_REGNO_MODE_OK (regno, inmode) 1537 && GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))) 1538 && HARD_REGNO_MODE_OK (regno, outmode)) 1539 { 1540 unsigned int offs; 1541 unsigned int nregs = MAX (HARD_REGNO_NREGS (regno, inmode), 1542 HARD_REGNO_NREGS (regno, outmode)); 1543 1544 for (offs = 0; offs < nregs; offs++) 1545 if (fixed_regs[regno + offs] 1546 || ! TEST_HARD_REG_BIT (reg_class_contents[(int) class], 1547 regno + offs)) 1548 break; 1549 1550 if (offs == nregs) 1551 { 1552 reload_reg_rtx[i] = gen_rtx_REG (inmode, regno); 1553 break; 1554 } 1555 } 1556 } 1557 1558 if (out) 1559 output_reloadnum = i; 1560 1561 return i; 1562} 1563 1564/* Record an additional place we must replace a value 1565 for which we have already recorded a reload. 1566 RELOADNUM is the value returned by push_reload 1567 when the reload was recorded. 1568 This is used in insn patterns that use match_dup. */ 1569 1570static void 1571push_replacement (loc, reloadnum, mode) 1572 rtx *loc; 1573 int reloadnum; 1574 enum machine_mode mode; 1575{ 1576 if (replace_reloads) 1577 { 1578 register struct replacement *r = &replacements[n_replacements++]; 1579 r->what = reloadnum; 1580 r->where = loc; 1581 r->subreg_loc = 0; 1582 r->mode = mode; 1583 } 1584} 1585 1586/* Transfer all replacements that used to be in reload FROM to be in 1587 reload TO. */ 1588 1589void 1590transfer_replacements (to, from) 1591 int to, from; 1592{ 1593 int i; 1594 1595 for (i = 0; i < n_replacements; i++) 1596 if (replacements[i].what == from) 1597 replacements[i].what = to; 1598} 1599 1600/* IN_RTX is the value loaded by a reload that we now decided to inherit, 1601 or a subpart of it. If we have any replacements registered for IN_RTX, 1602 cancel the reloads that were supposed to load them. 1603 Return non-zero if we canceled any reloads. */ 1604int 1605remove_address_replacements (in_rtx) 1606 rtx in_rtx; 1607{ 1608 int i, j; 1609 char reload_flags[MAX_RELOADS]; 1610 int something_changed = 0; 1611 1612 bzero (reload_flags, sizeof reload_flags); 1613 for (i = 0, j = 0; i < n_replacements; i++) 1614 { 1615 if (loc_mentioned_in_p (replacements[i].where, in_rtx)) 1616 reload_flags[replacements[i].what] |= 1; 1617 else 1618 { 1619 replacements[j++] = replacements[i]; 1620 reload_flags[replacements[i].what] |= 2; 1621 } 1622 } 1623 /* Note that the following store must be done before the recursive calls. */ 1624 n_replacements = j; 1625 1626 for (i = n_reloads - 1; i >= 0; i--) 1627 { 1628 if (reload_flags[i] == 1) 1629 { 1630 deallocate_reload_reg (i); 1631 remove_address_replacements (reload_in[i]); 1632 reload_in[i] = 0; 1633 something_changed = 1; 1634 } 1635 } 1636 return something_changed; 1637} 1638 1639/* Return non-zero if IN contains a piece of rtl that has the address LOC */ 1640static int 1641loc_mentioned_in_p (loc, in) 1642 rtx *loc, in; 1643{ 1644 enum rtx_code code = GET_CODE (in); 1645 char *fmt = GET_RTX_FORMAT (code); 1646 int i, j; 1647 1648 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 1649 { 1650 if (loc == &XEXP (in, i)) 1651 return 1; 1652 if (fmt[i] == 'e') 1653 { 1654 if (loc_mentioned_in_p (loc, XEXP (in, i))) 1655 return 1; 1656 } 1657 else if (fmt[i] == 'E') 1658 for (j = XVECLEN (in, i) - 1; i >= 0; i--) 1659 if (loc_mentioned_in_p (loc, XVECEXP (in, i, j))) 1660 return 1; 1661 } 1662 return 0; 1663} 1664 1665/* If there is only one output reload, and it is not for an earlyclobber 1666 operand, try to combine it with a (logically unrelated) input reload 1667 to reduce the number of reload registers needed. 1668 1669 This is safe if the input reload does not appear in 1670 the value being output-reloaded, because this implies 1671 it is not needed any more once the original insn completes. 1672 1673 If that doesn't work, see we can use any of the registers that 1674 die in this insn as a reload register. We can if it is of the right 1675 class and does not appear in the value being output-reloaded. */ 1676 1677static void 1678combine_reloads () 1679{ 1680 int i; 1681 int output_reload = -1; 1682 int secondary_out = -1; 1683 rtx note; 1684 1685 /* Find the output reload; return unless there is exactly one 1686 and that one is mandatory. */ 1687 1688 for (i = 0; i < n_reloads; i++) 1689 if (reload_out[i] != 0) 1690 { 1691 if (output_reload >= 0) 1692 return; 1693 output_reload = i; 1694 } 1695 1696 if (output_reload < 0 || reload_optional[output_reload]) 1697 return; 1698 1699 /* An input-output reload isn't combinable. */ 1700 1701 if (reload_in[output_reload] != 0) 1702 return; 1703 1704 /* If this reload is for an earlyclobber operand, we can't do anything. */ 1705 if (earlyclobber_operand_p (reload_out[output_reload])) 1706 return; 1707 1708 /* Check each input reload; can we combine it? */ 1709 1710 for (i = 0; i < n_reloads; i++) 1711 if (reload_in[i] && ! reload_optional[i] && ! reload_nocombine[i] 1712 /* Life span of this reload must not extend past main insn. */ 1713 && reload_when_needed[i] != RELOAD_FOR_OUTPUT_ADDRESS 1714 && reload_when_needed[i] != RELOAD_FOR_OUTADDR_ADDRESS 1715 && reload_when_needed[i] != RELOAD_OTHER 1716 && (CLASS_MAX_NREGS (reload_reg_class[i], reload_inmode[i]) 1717 == CLASS_MAX_NREGS (reload_reg_class[output_reload], 1718 reload_outmode[output_reload])) 1719 && reload_inc[i] == 0 1720 && reload_reg_rtx[i] == 0 1721#ifdef SECONDARY_MEMORY_NEEDED 1722 /* Don't combine two reloads with different secondary 1723 memory locations. */ 1724 && (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]] == 0 1725 || secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] == 0 1726 || rtx_equal_p (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]], 1727 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]])) 1728#endif 1729 && (SMALL_REGISTER_CLASSES 1730 ? (reload_reg_class[i] == reload_reg_class[output_reload]) 1731 : (reg_class_subset_p (reload_reg_class[i], 1732 reload_reg_class[output_reload]) 1733 || reg_class_subset_p (reload_reg_class[output_reload], 1734 reload_reg_class[i]))) 1735 && (MATCHES (reload_in[i], reload_out[output_reload]) 1736 /* Args reversed because the first arg seems to be 1737 the one that we imagine being modified 1738 while the second is the one that might be affected. */ 1739 || (! reg_overlap_mentioned_for_reload_p (reload_out[output_reload], 1740 reload_in[i]) 1741 /* However, if the input is a register that appears inside 1742 the output, then we also can't share. 1743 Imagine (set (mem (reg 69)) (plus (reg 69) ...)). 1744 If the same reload reg is used for both reg 69 and the 1745 result to be stored in memory, then that result 1746 will clobber the address of the memory ref. */ 1747 && ! (GET_CODE (reload_in[i]) == REG 1748 && reg_overlap_mentioned_for_reload_p (reload_in[i], 1749 reload_out[output_reload])))) 1750 && (reg_class_size[(int) reload_reg_class[i]] 1751 || SMALL_REGISTER_CLASSES) 1752 /* We will allow making things slightly worse by combining an 1753 input and an output, but no worse than that. */ 1754 && (reload_when_needed[i] == RELOAD_FOR_INPUT 1755 || reload_when_needed[i] == RELOAD_FOR_OUTPUT)) 1756 { 1757 int j; 1758 1759 /* We have found a reload to combine with! */ 1760 reload_out[i] = reload_out[output_reload]; 1761 reload_out_reg[i] = reload_out_reg[output_reload]; 1762 reload_outmode[i] = reload_outmode[output_reload]; 1763 /* Mark the old output reload as inoperative. */ 1764 reload_out[output_reload] = 0; 1765 /* The combined reload is needed for the entire insn. */ 1766 reload_when_needed[i] = RELOAD_OTHER; 1767 /* If the output reload had a secondary reload, copy it. */ 1768 if (reload_secondary_out_reload[output_reload] != -1) 1769 { 1770 reload_secondary_out_reload[i] 1771 = reload_secondary_out_reload[output_reload]; 1772 reload_secondary_out_icode[i] 1773 = reload_secondary_out_icode[output_reload]; 1774 } 1775 1776#ifdef SECONDARY_MEMORY_NEEDED 1777 /* Copy any secondary MEM. */ 1778 if (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] != 0) 1779 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]] 1780 = secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]]; 1781#endif 1782 /* If required, minimize the register class. */ 1783 if (reg_class_subset_p (reload_reg_class[output_reload], 1784 reload_reg_class[i])) 1785 reload_reg_class[i] = reload_reg_class[output_reload]; 1786 1787 /* Transfer all replacements from the old reload to the combined. */ 1788 for (j = 0; j < n_replacements; j++) 1789 if (replacements[j].what == output_reload) 1790 replacements[j].what = i; 1791 1792 return; 1793 } 1794 1795 /* If this insn has only one operand that is modified or written (assumed 1796 to be the first), it must be the one corresponding to this reload. It 1797 is safe to use anything that dies in this insn for that output provided 1798 that it does not occur in the output (we already know it isn't an 1799 earlyclobber. If this is an asm insn, give up. */ 1800 1801 if (INSN_CODE (this_insn) == -1) 1802 return; 1803 1804 for (i = 1; i < insn_n_operands[INSN_CODE (this_insn)]; i++) 1805 if (insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '=' 1806 || insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '+') 1807 return; 1808 1809 /* See if some hard register that dies in this insn and is not used in 1810 the output is the right class. Only works if the register we pick 1811 up can fully hold our output reload. */ 1812 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1)) 1813 if (REG_NOTE_KIND (note) == REG_DEAD 1814 && GET_CODE (XEXP (note, 0)) == REG 1815 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0), 1816 reload_out[output_reload]) 1817 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER 1818 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), reload_outmode[output_reload]) 1819 && TEST_HARD_REG_BIT (reg_class_contents[(int) reload_reg_class[output_reload]], 1820 REGNO (XEXP (note, 0))) 1821 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), reload_outmode[output_reload]) 1822 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0)))) 1823 /* Ensure that a secondary or tertiary reload for this output 1824 won't want this register. */ 1825 && ((secondary_out = reload_secondary_out_reload[output_reload]) == -1 1826 || (! (TEST_HARD_REG_BIT 1827 (reg_class_contents[(int) reload_reg_class[secondary_out]], 1828 REGNO (XEXP (note, 0)))) 1829 && ((secondary_out = reload_secondary_out_reload[secondary_out]) == -1 1830 || ! (TEST_HARD_REG_BIT 1831 (reg_class_contents[(int) reload_reg_class[secondary_out]], 1832 REGNO (XEXP (note, 0))))))) 1833 && ! fixed_regs[REGNO (XEXP (note, 0))]) 1834 { 1835 reload_reg_rtx[output_reload] 1836 = gen_rtx_REG (reload_outmode[output_reload], 1837 REGNO (XEXP (note, 0))); 1838 return; 1839 } 1840} 1841 1842/* Try to find a reload register for an in-out reload (expressions IN and OUT). 1843 See if one of IN and OUT is a register that may be used; 1844 this is desirable since a spill-register won't be needed. 1845 If so, return the register rtx that proves acceptable. 1846 1847 INLOC and OUTLOC are locations where IN and OUT appear in the insn. 1848 CLASS is the register class required for the reload. 1849 1850 If FOR_REAL is >= 0, it is the number of the reload, 1851 and in some cases when it can be discovered that OUT doesn't need 1852 to be computed, clear out reload_out[FOR_REAL]. 1853 1854 If FOR_REAL is -1, this should not be done, because this call 1855 is just to see if a register can be found, not to find and install it. 1856 1857 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This 1858 puts an additional constraint on being able to use IN for OUT since 1859 IN must not appear elsewhere in the insn (it is assumed that IN itself 1860 is safe from the earlyclobber). */ 1861 1862static rtx 1863find_dummy_reload (real_in, real_out, inloc, outloc, 1864 inmode, outmode, class, for_real, earlyclobber) 1865 rtx real_in, real_out; 1866 rtx *inloc, *outloc; 1867 enum machine_mode inmode, outmode; 1868 enum reg_class class; 1869 int for_real; 1870 int earlyclobber; 1871{ 1872 rtx in = real_in; 1873 rtx out = real_out; 1874 int in_offset = 0; 1875 int out_offset = 0; 1876 rtx value = 0; 1877 1878 /* If operands exceed a word, we can't use either of them 1879 unless they have the same size. */ 1880 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode) 1881 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD 1882 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD)) 1883 return 0; 1884 1885 /* Find the inside of any subregs. */ 1886 while (GET_CODE (out) == SUBREG) 1887 { 1888 out_offset = SUBREG_WORD (out); 1889 out = SUBREG_REG (out); 1890 } 1891 while (GET_CODE (in) == SUBREG) 1892 { 1893 in_offset = SUBREG_WORD (in); 1894 in = SUBREG_REG (in); 1895 } 1896 1897 /* Narrow down the reg class, the same way push_reload will; 1898 otherwise we might find a dummy now, but push_reload won't. */ 1899 class = PREFERRED_RELOAD_CLASS (in, class); 1900 1901 /* See if OUT will do. */ 1902 if (GET_CODE (out) == REG 1903 && REGNO (out) < FIRST_PSEUDO_REGISTER) 1904 { 1905 register int regno = REGNO (out) + out_offset; 1906 int nwords = HARD_REGNO_NREGS (regno, outmode); 1907 rtx saved_rtx; 1908 1909 /* When we consider whether the insn uses OUT, 1910 ignore references within IN. They don't prevent us 1911 from copying IN into OUT, because those refs would 1912 move into the insn that reloads IN. 1913 1914 However, we only ignore IN in its role as this reload. 1915 If the insn uses IN elsewhere and it contains OUT, 1916 that counts. We can't be sure it's the "same" operand 1917 so it might not go through this reload. */ 1918 saved_rtx = *inloc; 1919 *inloc = const0_rtx; 1920 1921 if (regno < FIRST_PSEUDO_REGISTER 1922 /* A fixed reg that can overlap other regs better not be used 1923 for reloading in any way. */ 1924#ifdef OVERLAPPING_REGNO_P 1925 && ! (fixed_regs[regno] && OVERLAPPING_REGNO_P (regno)) 1926#endif 1927 && ! refers_to_regno_for_reload_p (regno, regno + nwords, 1928 PATTERN (this_insn), outloc)) 1929 { 1930 int i; 1931 for (i = 0; i < nwords; i++) 1932 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], 1933 regno + i)) 1934 break; 1935 1936 if (i == nwords) 1937 { 1938 if (GET_CODE (real_out) == REG) 1939 value = real_out; 1940 else 1941 value = gen_rtx_REG (outmode, regno); 1942 } 1943 } 1944 1945 *inloc = saved_rtx; 1946 } 1947 1948 /* Consider using IN if OUT was not acceptable 1949 or if OUT dies in this insn (like the quotient in a divmod insn). 1950 We can't use IN unless it is dies in this insn, 1951 which means we must know accurately which hard regs are live. 1952 Also, the result can't go in IN if IN is used within OUT, 1953 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */ 1954 if (hard_regs_live_known 1955 && GET_CODE (in) == REG 1956 && REGNO (in) < FIRST_PSEUDO_REGISTER 1957 && (value == 0 1958 || find_reg_note (this_insn, REG_UNUSED, real_out)) 1959 && find_reg_note (this_insn, REG_DEAD, real_in) 1960 && !fixed_regs[REGNO (in)] 1961 && HARD_REGNO_MODE_OK (REGNO (in), 1962 /* The only case where out and real_out might 1963 have different modes is where real_out 1964 is a subreg, and in that case, out 1965 has a real mode. */ 1966 (GET_MODE (out) != VOIDmode 1967 ? GET_MODE (out) : outmode))) 1968 { 1969 register int regno = REGNO (in) + in_offset; 1970 int nwords = HARD_REGNO_NREGS (regno, inmode); 1971 1972 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, NULL_PTR) 1973 && ! hard_reg_set_here_p (regno, regno + nwords, 1974 PATTERN (this_insn)) 1975 && (! earlyclobber 1976 || ! refers_to_regno_for_reload_p (regno, regno + nwords, 1977 PATTERN (this_insn), inloc))) 1978 { 1979 int i; 1980 for (i = 0; i < nwords; i++) 1981 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], 1982 regno + i)) 1983 break; 1984 1985 if (i == nwords) 1986 { 1987 /* If we were going to use OUT as the reload reg 1988 and changed our mind, it means OUT is a dummy that 1989 dies here. So don't bother copying value to it. */ 1990 if (for_real >= 0 && value == real_out) 1991 reload_out[for_real] = 0; 1992 if (GET_CODE (real_in) == REG) 1993 value = real_in; 1994 else 1995 value = gen_rtx_REG (inmode, regno); 1996 } 1997 } 1998 } 1999 2000 return value; 2001} 2002 2003/* This page contains subroutines used mainly for determining 2004 whether the IN or an OUT of a reload can serve as the 2005 reload register. */ 2006 2007/* Return 1 if X is an operand of an insn that is being earlyclobbered. */ 2008 2009int 2010earlyclobber_operand_p (x) 2011 rtx x; 2012{ 2013 int i; 2014 2015 for (i = 0; i < n_earlyclobbers; i++) 2016 if (reload_earlyclobbers[i] == x) 2017 return 1; 2018 2019 return 0; 2020} 2021 2022/* Return 1 if expression X alters a hard reg in the range 2023 from BEG_REGNO (inclusive) to END_REGNO (exclusive), 2024 either explicitly or in the guise of a pseudo-reg allocated to REGNO. 2025 X should be the body of an instruction. */ 2026 2027static int 2028hard_reg_set_here_p (beg_regno, end_regno, x) 2029 register int beg_regno, end_regno; 2030 rtx x; 2031{ 2032 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER) 2033 { 2034 register rtx op0 = SET_DEST (x); 2035 while (GET_CODE (op0) == SUBREG) 2036 op0 = SUBREG_REG (op0); 2037 if (GET_CODE (op0) == REG) 2038 { 2039 register int r = REGNO (op0); 2040 /* See if this reg overlaps range under consideration. */ 2041 if (r < end_regno 2042 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno) 2043 return 1; 2044 } 2045 } 2046 else if (GET_CODE (x) == PARALLEL) 2047 { 2048 register int i = XVECLEN (x, 0) - 1; 2049 for (; i >= 0; i--) 2050 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i))) 2051 return 1; 2052 } 2053 2054 return 0; 2055} 2056 2057/* Return 1 if ADDR is a valid memory address for mode MODE, 2058 and check that each pseudo reg has the proper kind of 2059 hard reg. */ 2060 2061int 2062strict_memory_address_p (mode, addr) 2063 enum machine_mode mode; 2064 register rtx addr; 2065{ 2066 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win); 2067 return 0; 2068 2069 win: 2070 return 1; 2071} 2072 2073/* Like rtx_equal_p except that it allows a REG and a SUBREG to match 2074 if they are the same hard reg, and has special hacks for 2075 autoincrement and autodecrement. 2076 This is specifically intended for find_reloads to use 2077 in determining whether two operands match. 2078 X is the operand whose number is the lower of the two. 2079 2080 The value is 2 if Y contains a pre-increment that matches 2081 a non-incrementing address in X. */ 2082 2083/* ??? To be completely correct, we should arrange to pass 2084 for X the output operand and for Y the input operand. 2085 For now, we assume that the output operand has the lower number 2086 because that is natural in (SET output (... input ...)). */ 2087 2088int 2089operands_match_p (x, y) 2090 register rtx x, y; 2091{ 2092 register int i; 2093 register RTX_CODE code = GET_CODE (x); 2094 register char *fmt; 2095 int success_2; 2096 2097 if (x == y) 2098 return 1; 2099 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)) 2100 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG 2101 && GET_CODE (SUBREG_REG (y)) == REG))) 2102 { 2103 register int j; 2104 2105 if (code == SUBREG) 2106 { 2107 i = REGNO (SUBREG_REG (x)); 2108 if (i >= FIRST_PSEUDO_REGISTER) 2109 goto slow; 2110 i += SUBREG_WORD (x); 2111 } 2112 else 2113 i = REGNO (x); 2114 2115 if (GET_CODE (y) == SUBREG) 2116 { 2117 j = REGNO (SUBREG_REG (y)); 2118 if (j >= FIRST_PSEUDO_REGISTER) 2119 goto slow; 2120 j += SUBREG_WORD (y); 2121 } 2122 else 2123 j = REGNO (y); 2124 2125 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a 2126 multiple hard register group, so that for example (reg:DI 0) and 2127 (reg:SI 1) will be considered the same register. */ 2128 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD 2129 && i < FIRST_PSEUDO_REGISTER) 2130 i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1; 2131 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD 2132 && j < FIRST_PSEUDO_REGISTER) 2133 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1; 2134 2135 return i == j; 2136 } 2137 /* If two operands must match, because they are really a single 2138 operand of an assembler insn, then two postincrements are invalid 2139 because the assembler insn would increment only once. 2140 On the other hand, an postincrement matches ordinary indexing 2141 if the postincrement is the output operand. */ 2142 if (code == POST_DEC || code == POST_INC) 2143 return operands_match_p (XEXP (x, 0), y); 2144 /* Two preincrements are invalid 2145 because the assembler insn would increment only once. 2146 On the other hand, an preincrement matches ordinary indexing 2147 if the preincrement is the input operand. 2148 In this case, return 2, since some callers need to do special 2149 things when this happens. */ 2150 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC) 2151 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0; 2152 2153 slow: 2154 2155 /* Now we have disposed of all the cases 2156 in which different rtx codes can match. */ 2157 if (code != GET_CODE (y)) 2158 return 0; 2159 if (code == LABEL_REF) 2160 return XEXP (x, 0) == XEXP (y, 0); 2161 if (code == SYMBOL_REF) 2162 return XSTR (x, 0) == XSTR (y, 0); 2163 2164 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */ 2165 2166 if (GET_MODE (x) != GET_MODE (y)) 2167 return 0; 2168 2169 /* Compare the elements. If any pair of corresponding elements 2170 fail to match, return 0 for the whole things. */ 2171 2172 success_2 = 0; 2173 fmt = GET_RTX_FORMAT (code); 2174 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 2175 { 2176 int val, j; 2177 switch (fmt[i]) 2178 { 2179 case 'w': 2180 if (XWINT (x, i) != XWINT (y, i)) 2181 return 0; 2182 break; 2183 2184 case 'i': 2185 if (XINT (x, i) != XINT (y, i)) 2186 return 0; 2187 break; 2188 2189 case 'e': 2190 val = operands_match_p (XEXP (x, i), XEXP (y, i)); 2191 if (val == 0) 2192 return 0; 2193 /* If any subexpression returns 2, 2194 we should return 2 if we are successful. */ 2195 if (val == 2) 2196 success_2 = 1; 2197 break; 2198 2199 case '0': 2200 break; 2201 2202 case 'E': 2203 if (XVECLEN (x, i) != XVECLEN (y, i)) 2204 return 0; 2205 for (j = XVECLEN (x, i) - 1; j >= 0; --j) 2206 { 2207 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j)); 2208 if (val == 0) 2209 return 0; 2210 if (val == 2) 2211 success_2 = 1; 2212 } 2213 break; 2214 2215 /* It is believed that rtx's at this level will never 2216 contain anything but integers and other rtx's, 2217 except for within LABEL_REFs and SYMBOL_REFs. */ 2218 default: 2219 abort (); 2220 } 2221 } 2222 return 1 + success_2; 2223} 2224 2225/* Describe the range of registers or memory referenced by X. 2226 If X is a register, set REG_FLAG and put the first register 2227 number into START and the last plus one into END. 2228 If X is a memory reference, put a base address into BASE 2229 and a range of integer offsets into START and END. 2230 If X is pushing on the stack, we can assume it causes no trouble, 2231 so we set the SAFE field. */ 2232 2233static struct decomposition 2234decompose (x) 2235 rtx x; 2236{ 2237 struct decomposition val; 2238 int all_const = 0; 2239 2240 val.reg_flag = 0; 2241 val.safe = 0; 2242 val.base = 0; 2243 if (GET_CODE (x) == MEM) 2244 { 2245 rtx base, offset = 0; 2246 rtx addr = XEXP (x, 0); 2247 2248 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC 2249 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC) 2250 { 2251 val.base = XEXP (addr, 0); 2252 val.start = - GET_MODE_SIZE (GET_MODE (x)); 2253 val.end = GET_MODE_SIZE (GET_MODE (x)); 2254 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM; 2255 return val; 2256 } 2257 2258 if (GET_CODE (addr) == CONST) 2259 { 2260 addr = XEXP (addr, 0); 2261 all_const = 1; 2262 } 2263 if (GET_CODE (addr) == PLUS) 2264 { 2265 if (CONSTANT_P (XEXP (addr, 0))) 2266 { 2267 base = XEXP (addr, 1); 2268 offset = XEXP (addr, 0); 2269 } 2270 else if (CONSTANT_P (XEXP (addr, 1))) 2271 { 2272 base = XEXP (addr, 0); 2273 offset = XEXP (addr, 1); 2274 } 2275 } 2276 2277 if (offset == 0) 2278 { 2279 base = addr; 2280 offset = const0_rtx; 2281 } 2282 if (GET_CODE (offset) == CONST) 2283 offset = XEXP (offset, 0); 2284 if (GET_CODE (offset) == PLUS) 2285 { 2286 if (GET_CODE (XEXP (offset, 0)) == CONST_INT) 2287 { 2288 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1)); 2289 offset = XEXP (offset, 0); 2290 } 2291 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT) 2292 { 2293 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0)); 2294 offset = XEXP (offset, 1); 2295 } 2296 else 2297 { 2298 base = gen_rtx_PLUS (GET_MODE (base), base, offset); 2299 offset = const0_rtx; 2300 } 2301 } 2302 else if (GET_CODE (offset) != CONST_INT) 2303 { 2304 base = gen_rtx_PLUS (GET_MODE (base), base, offset); 2305 offset = const0_rtx; 2306 } 2307 2308 if (all_const && GET_CODE (base) == PLUS) 2309 base = gen_rtx_CONST (GET_MODE (base), base); 2310 2311 if (GET_CODE (offset) != CONST_INT) 2312 abort (); 2313 2314 val.start = INTVAL (offset); 2315 val.end = val.start + GET_MODE_SIZE (GET_MODE (x)); 2316 val.base = base; 2317 return val; 2318 } 2319 else if (GET_CODE (x) == REG) 2320 { 2321 val.reg_flag = 1; 2322 val.start = true_regnum (x); 2323 if (val.start < 0) 2324 { 2325 /* A pseudo with no hard reg. */ 2326 val.start = REGNO (x); 2327 val.end = val.start + 1; 2328 } 2329 else 2330 /* A hard reg. */ 2331 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x)); 2332 } 2333 else if (GET_CODE (x) == SUBREG) 2334 { 2335 if (GET_CODE (SUBREG_REG (x)) != REG) 2336 /* This could be more precise, but it's good enough. */ 2337 return decompose (SUBREG_REG (x)); 2338 val.reg_flag = 1; 2339 val.start = true_regnum (x); 2340 if (val.start < 0) 2341 return decompose (SUBREG_REG (x)); 2342 else 2343 /* A hard reg. */ 2344 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x)); 2345 } 2346 else if (CONSTANT_P (x) 2347 /* This hasn't been assigned yet, so it can't conflict yet. */ 2348 || GET_CODE (x) == SCRATCH) 2349 val.safe = 1; 2350 else 2351 abort (); 2352 return val; 2353} 2354 2355/* Return 1 if altering Y will not modify the value of X. 2356 Y is also described by YDATA, which should be decompose (Y). */ 2357 2358static int 2359immune_p (x, y, ydata) 2360 rtx x, y; 2361 struct decomposition ydata; 2362{ 2363 struct decomposition xdata; 2364 2365 if (ydata.reg_flag) 2366 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, NULL_PTR); 2367 if (ydata.safe) 2368 return 1; 2369 2370 if (GET_CODE (y) != MEM) 2371 abort (); 2372 /* If Y is memory and X is not, Y can't affect X. */ 2373 if (GET_CODE (x) != MEM) 2374 return 1; 2375 2376 xdata = decompose (x); 2377 2378 if (! rtx_equal_p (xdata.base, ydata.base)) 2379 { 2380 /* If bases are distinct symbolic constants, there is no overlap. */ 2381 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base)) 2382 return 1; 2383 /* Constants and stack slots never overlap. */ 2384 if (CONSTANT_P (xdata.base) 2385 && (ydata.base == frame_pointer_rtx 2386 || ydata.base == hard_frame_pointer_rtx 2387 || ydata.base == stack_pointer_rtx)) 2388 return 1; 2389 if (CONSTANT_P (ydata.base) 2390 && (xdata.base == frame_pointer_rtx 2391 || xdata.base == hard_frame_pointer_rtx 2392 || xdata.base == stack_pointer_rtx)) 2393 return 1; 2394 /* If either base is variable, we don't know anything. */ 2395 return 0; 2396 } 2397 2398 2399 return (xdata.start >= ydata.end || ydata.start >= xdata.end); 2400} 2401 2402/* Similar, but calls decompose. */ 2403 2404int 2405safe_from_earlyclobber (op, clobber) 2406 rtx op, clobber; 2407{ 2408 struct decomposition early_data; 2409 2410 early_data = decompose (clobber); 2411 return immune_p (op, clobber, early_data); 2412} 2413 2414/* Main entry point of this file: search the body of INSN 2415 for values that need reloading and record them with push_reload. 2416 REPLACE nonzero means record also where the values occur 2417 so that subst_reloads can be used. 2418 2419 IND_LEVELS says how many levels of indirection are supported by this 2420 machine; a value of zero means that a memory reference is not a valid 2421 memory address. 2422 2423 LIVE_KNOWN says we have valid information about which hard 2424 regs are live at each point in the program; this is true when 2425 we are called from global_alloc but false when stupid register 2426 allocation has been done. 2427 2428 RELOAD_REG_P if nonzero is a vector indexed by hard reg number 2429 which is nonnegative if the reg has been commandeered for reloading into. 2430 It is copied into STATIC_RELOAD_REG_P and referenced from there 2431 by various subroutines. 2432 2433 Return TRUE if some operands need to be changed, because of swapping 2434 commutative operands, reg_equiv_address substitution, or whatever. */ 2435 2436int 2437find_reloads (insn, replace, ind_levels, live_known, reload_reg_p) 2438 rtx insn; 2439 int replace, ind_levels; 2440 int live_known; 2441 short *reload_reg_p; 2442{ 2443#ifdef REGISTER_CONSTRAINTS 2444 2445 register int insn_code_number; 2446 register int i, j; 2447 int noperands; 2448 /* These start out as the constraints for the insn 2449 and they are chewed up as we consider alternatives. */ 2450 char *constraints[MAX_RECOG_OPERANDS]; 2451 /* These are the preferred classes for an operand, or NO_REGS if it isn't 2452 a register. */ 2453 enum reg_class preferred_class[MAX_RECOG_OPERANDS]; 2454 char pref_or_nothing[MAX_RECOG_OPERANDS]; 2455 /* Nonzero for a MEM operand whose entire address needs a reload. */ 2456 int address_reloaded[MAX_RECOG_OPERANDS]; 2457 /* Value of enum reload_type to use for operand. */ 2458 enum reload_type operand_type[MAX_RECOG_OPERANDS]; 2459 /* Value of enum reload_type to use within address of operand. */ 2460 enum reload_type address_type[MAX_RECOG_OPERANDS]; 2461 /* Save the usage of each operand. */ 2462 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS]; 2463 int no_input_reloads = 0, no_output_reloads = 0; 2464 int n_alternatives; 2465 int this_alternative[MAX_RECOG_OPERANDS]; 2466 char this_alternative_win[MAX_RECOG_OPERANDS]; 2467 char this_alternative_offmemok[MAX_RECOG_OPERANDS]; 2468 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS]; 2469 int this_alternative_matches[MAX_RECOG_OPERANDS]; 2470 int swapped; 2471 int goal_alternative[MAX_RECOG_OPERANDS]; 2472 int this_alternative_number; 2473 int goal_alternative_number; 2474 int operand_reloadnum[MAX_RECOG_OPERANDS]; 2475 int goal_alternative_matches[MAX_RECOG_OPERANDS]; 2476 int goal_alternative_matched[MAX_RECOG_OPERANDS]; 2477 char goal_alternative_win[MAX_RECOG_OPERANDS]; 2478 char goal_alternative_offmemok[MAX_RECOG_OPERANDS]; 2479 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS]; 2480 int goal_alternative_swapped; 2481 int best; 2482 int commutative; 2483 int changed; 2484 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS]; 2485 rtx substed_operand[MAX_RECOG_OPERANDS]; 2486 rtx body = PATTERN (insn); 2487 rtx set = single_set (insn); 2488 int goal_earlyclobber, this_earlyclobber; 2489 enum machine_mode operand_mode[MAX_RECOG_OPERANDS]; 2490 int retval = 0; 2491 /* Cache the last regno for the last pseudo we did an output reload 2492 for in case the next insn uses it. */ 2493 static int last_output_reload_regno = -1; 2494 2495 this_insn = insn; 2496 n_reloads = 0; 2497 n_replacements = 0; 2498 n_earlyclobbers = 0; 2499 replace_reloads = replace; 2500 hard_regs_live_known = live_known; 2501 static_reload_reg_p = reload_reg_p; 2502 2503 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads; 2504 neither are insns that SET cc0. Insns that use CC0 are not allowed 2505 to have any input reloads. */ 2506 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN) 2507 no_output_reloads = 1; 2508 2509#ifdef HAVE_cc0 2510 if (reg_referenced_p (cc0_rtx, PATTERN (insn))) 2511 no_input_reloads = 1; 2512 if (reg_set_p (cc0_rtx, PATTERN (insn))) 2513 no_output_reloads = 1; 2514#endif 2515 2516#ifdef SECONDARY_MEMORY_NEEDED 2517 /* The eliminated forms of any secondary memory locations are per-insn, so 2518 clear them out here. */ 2519 2520 bzero ((char *) secondary_memlocs_elim, sizeof secondary_memlocs_elim); 2521#endif 2522 2523 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it 2524 is cheap to move between them. If it is not, there may not be an insn 2525 to do the copy, so we may need a reload. */ 2526 if (GET_CODE (body) == SET 2527 && GET_CODE (SET_DEST (body)) == REG 2528 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER 2529 && GET_CODE (SET_SRC (body)) == REG 2530 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER 2531 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body))), 2532 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2) 2533 return 0; 2534 2535 extract_insn (insn); 2536 2537 noperands = reload_n_operands = recog_n_operands; 2538 n_alternatives = recog_n_alternatives; 2539 2540 /* Just return "no reloads" if insn has no operands with constraints. */ 2541 if (noperands == 0 || n_alternatives == 0) 2542 return 0; 2543 2544 insn_code_number = INSN_CODE (insn); 2545 this_insn_is_asm = insn_code_number < 0; 2546 2547 bcopy ((char *) recog_operand_mode, (char *) operand_mode, 2548 noperands * sizeof (enum machine_mode)); 2549 bcopy ((char *) recog_constraints, (char *) constraints, 2550 noperands * sizeof (char *)); 2551 2552 commutative = -1; 2553 2554 /* If we will need to know, later, whether some pair of operands 2555 are the same, we must compare them now and save the result. 2556 Reloading the base and index registers will clobber them 2557 and afterward they will fail to match. */ 2558 2559 for (i = 0; i < noperands; i++) 2560 { 2561 register char *p; 2562 register int c; 2563 2564 substed_operand[i] = recog_operand[i]; 2565 p = constraints[i]; 2566 2567 modified[i] = RELOAD_READ; 2568 2569 /* Scan this operand's constraint to see if it is an output operand, 2570 an in-out operand, is commutative, or should match another. */ 2571 2572 while ((c = *p++)) 2573 { 2574 if (c == '=') 2575 modified[i] = RELOAD_WRITE; 2576 else if (c == '+') 2577 modified[i] = RELOAD_READ_WRITE; 2578 else if (c == '%') 2579 { 2580 /* The last operand should not be marked commutative. */ 2581 if (i == noperands - 1) 2582 abort (); 2583 2584 commutative = i; 2585 } 2586 else if (c >= '0' && c <= '9') 2587 { 2588 c -= '0'; 2589 operands_match[c][i] 2590 = operands_match_p (recog_operand[c], recog_operand[i]); 2591 2592 /* An operand may not match itself. */ 2593 if (c == i) 2594 abort (); 2595 2596 /* If C can be commuted with C+1, and C might need to match I, 2597 then C+1 might also need to match I. */ 2598 if (commutative >= 0) 2599 { 2600 if (c == commutative || c == commutative + 1) 2601 { 2602 int other = c + (c == commutative ? 1 : -1); 2603 operands_match[other][i] 2604 = operands_match_p (recog_operand[other], recog_operand[i]); 2605 } 2606 if (i == commutative || i == commutative + 1) 2607 { 2608 int other = i + (i == commutative ? 1 : -1); 2609 operands_match[c][other] 2610 = operands_match_p (recog_operand[c], recog_operand[other]); 2611 } 2612 /* Note that C is supposed to be less than I. 2613 No need to consider altering both C and I because in 2614 that case we would alter one into the other. */ 2615 } 2616 } 2617 } 2618 } 2619 2620 /* Examine each operand that is a memory reference or memory address 2621 and reload parts of the addresses into index registers. 2622 Also here any references to pseudo regs that didn't get hard regs 2623 but are equivalent to constants get replaced in the insn itself 2624 with those constants. Nobody will ever see them again. 2625 2626 Finally, set up the preferred classes of each operand. */ 2627 2628 for (i = 0; i < noperands; i++) 2629 { 2630 register RTX_CODE code = GET_CODE (recog_operand[i]); 2631 2632 address_reloaded[i] = 0; 2633 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT 2634 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT 2635 : RELOAD_OTHER); 2636 address_type[i] 2637 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS 2638 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS 2639 : RELOAD_OTHER); 2640 2641 if (*constraints[i] == 0) 2642 /* Ignore things like match_operator operands. */ 2643 ; 2644 else if (constraints[i][0] == 'p') 2645 { 2646 find_reloads_address (VOIDmode, NULL_PTR, 2647 recog_operand[i], recog_operand_loc[i], 2648 i, operand_type[i], ind_levels, insn); 2649 2650 /* If we now have a simple operand where we used to have a 2651 PLUS or MULT, re-recognize and try again. */ 2652 if ((GET_RTX_CLASS (GET_CODE (*recog_operand_loc[i])) == 'o' 2653 || GET_CODE (*recog_operand_loc[i]) == SUBREG) 2654 && (GET_CODE (recog_operand[i]) == MULT 2655 || GET_CODE (recog_operand[i]) == PLUS)) 2656 { 2657 INSN_CODE (insn) = -1; 2658 retval = find_reloads (insn, replace, ind_levels, live_known, 2659 reload_reg_p); 2660 return retval; 2661 } 2662 2663 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]; 2664 } 2665 else if (code == MEM) 2666 { 2667 address_reloaded[i] 2668 = find_reloads_address (GET_MODE (recog_operand[i]), 2669 recog_operand_loc[i], 2670 XEXP (recog_operand[i], 0), 2671 &XEXP (recog_operand[i], 0), 2672 i, address_type[i], ind_levels, insn); 2673 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]; 2674 } 2675 else if (code == SUBREG) 2676 { 2677 rtx reg = SUBREG_REG (recog_operand[i]); 2678 rtx op 2679 = find_reloads_toplev (recog_operand[i], i, address_type[i], 2680 ind_levels, 2681 set != 0 2682 && &SET_DEST (set) == recog_operand_loc[i], 2683 insn); 2684 2685 /* If we made a MEM to load (a part of) the stackslot of a pseudo 2686 that didn't get a hard register, emit a USE with a REG_EQUAL 2687 note in front so that we might inherit a previous, possibly 2688 wider reload. */ 2689 2690 if (replace 2691 && GET_CODE (op) == MEM 2692 && GET_CODE (reg) == REG 2693 && (GET_MODE_SIZE (GET_MODE (reg)) 2694 >= GET_MODE_SIZE (GET_MODE (op)))) 2695 REG_NOTES (emit_insn_before (gen_rtx_USE (VOIDmode, reg), insn)) 2696 = gen_rtx_EXPR_LIST (REG_EQUAL, 2697 reg_equiv_memory_loc[REGNO (reg)], NULL_RTX); 2698 2699 substed_operand[i] = recog_operand[i] = op; 2700 } 2701 else if (code == PLUS || GET_RTX_CLASS (code) == '1') 2702 /* We can get a PLUS as an "operand" as a result of register 2703 elimination. See eliminate_regs and gen_reload. We handle 2704 a unary operator by reloading the operand. */ 2705 substed_operand[i] = recog_operand[i] 2706 = find_reloads_toplev (recog_operand[i], i, address_type[i], 2707 ind_levels, 0, insn); 2708 else if (code == REG) 2709 { 2710 /* This is equivalent to calling find_reloads_toplev. 2711 The code is duplicated for speed. 2712 When we find a pseudo always equivalent to a constant, 2713 we replace it by the constant. We must be sure, however, 2714 that we don't try to replace it in the insn in which it 2715 is being set. */ 2716 register int regno = REGNO (recog_operand[i]); 2717 if (reg_equiv_constant[regno] != 0 2718 && (set == 0 || &SET_DEST (set) != recog_operand_loc[i])) 2719 { 2720 /* Record the existing mode so that the check if constants are 2721 allowed will work when operand_mode isn't specified. */ 2722 2723 if (operand_mode[i] == VOIDmode) 2724 operand_mode[i] = GET_MODE (recog_operand[i]); 2725 2726 substed_operand[i] = recog_operand[i] 2727 = reg_equiv_constant[regno]; 2728 } 2729 if (reg_equiv_memory_loc[regno] != 0 2730 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)) 2731 /* We need not give a valid is_set_dest argument since the case 2732 of a constant equivalence was checked above. */ 2733 substed_operand[i] = recog_operand[i] 2734 = find_reloads_toplev (recog_operand[i], i, address_type[i], 2735 ind_levels, 0, insn); 2736 } 2737 /* If the operand is still a register (we didn't replace it with an 2738 equivalent), get the preferred class to reload it into. */ 2739 code = GET_CODE (recog_operand[i]); 2740 preferred_class[i] 2741 = ((code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER) 2742 ? reg_preferred_class (REGNO (recog_operand[i])) : NO_REGS); 2743 pref_or_nothing[i] 2744 = (code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER 2745 && reg_alternate_class (REGNO (recog_operand[i])) == NO_REGS); 2746 } 2747 2748#ifdef HAVE_cc0 2749 /* If we made any reloads for addresses, see if they violate a 2750 "no input reloads" requirement for this insn. */ 2751 if (no_input_reloads) 2752 for (i = 0; i < n_reloads; i++) 2753 if (reload_in[i] != 0) 2754 abort (); 2755#endif 2756 2757 /* If this is simply a copy from operand 1 to operand 0, merge the 2758 preferred classes for the operands. */ 2759 if (set != 0 && noperands >= 2 && recog_operand[0] == SET_DEST (set) 2760 && recog_operand[1] == SET_SRC (set)) 2761 { 2762 preferred_class[0] = preferred_class[1] 2763 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]]; 2764 pref_or_nothing[0] |= pref_or_nothing[1]; 2765 pref_or_nothing[1] |= pref_or_nothing[0]; 2766 } 2767 2768 /* Now see what we need for pseudo-regs that didn't get hard regs 2769 or got the wrong kind of hard reg. For this, we must consider 2770 all the operands together against the register constraints. */ 2771 2772 best = MAX_RECOG_OPERANDS * 2 + 600; 2773 2774 swapped = 0; 2775 goal_alternative_swapped = 0; 2776 try_swapped: 2777 2778 /* The constraints are made of several alternatives. 2779 Each operand's constraint looks like foo,bar,... with commas 2780 separating the alternatives. The first alternatives for all 2781 operands go together, the second alternatives go together, etc. 2782 2783 First loop over alternatives. */ 2784 2785 for (this_alternative_number = 0; 2786 this_alternative_number < n_alternatives; 2787 this_alternative_number++) 2788 { 2789 /* Loop over operands for one constraint alternative. */ 2790 /* LOSERS counts those that don't fit this alternative 2791 and would require loading. */ 2792 int losers = 0; 2793 /* BAD is set to 1 if it some operand can't fit this alternative 2794 even after reloading. */ 2795 int bad = 0; 2796 /* REJECT is a count of how undesirable this alternative says it is 2797 if any reloading is required. If the alternative matches exactly 2798 then REJECT is ignored, but otherwise it gets this much 2799 counted against it in addition to the reloading needed. Each 2800 ? counts three times here since we want the disparaging caused by 2801 a bad register class to only count 1/3 as much. */ 2802 int reject = 0; 2803 2804 this_earlyclobber = 0; 2805 2806 for (i = 0; i < noperands; i++) 2807 { 2808 register char *p = constraints[i]; 2809 register int win = 0; 2810 /* 0 => this operand can be reloaded somehow for this alternative */ 2811 int badop = 1; 2812 /* 0 => this operand can be reloaded if the alternative allows regs. */ 2813 int winreg = 0; 2814 int c; 2815 register rtx operand = recog_operand[i]; 2816 int offset = 0; 2817 /* Nonzero means this is a MEM that must be reloaded into a reg 2818 regardless of what the constraint says. */ 2819 int force_reload = 0; 2820 int offmemok = 0; 2821 /* Nonzero if a constant forced into memory would be OK for this 2822 operand. */ 2823 int constmemok = 0; 2824 int earlyclobber = 0; 2825 2826 /* If the predicate accepts a unary operator, it means that 2827 we need to reload the operand, but do not do this for 2828 match_operator and friends. */ 2829 if (GET_RTX_CLASS (GET_CODE (operand)) == '1' && *p != 0) 2830 operand = XEXP (operand, 0); 2831 2832 /* If the operand is a SUBREG, extract 2833 the REG or MEM (or maybe even a constant) within. 2834 (Constants can occur as a result of reg_equiv_constant.) */ 2835 2836 while (GET_CODE (operand) == SUBREG) 2837 { 2838 offset += SUBREG_WORD (operand); 2839 operand = SUBREG_REG (operand); 2840 /* Force reload if this is a constant or PLUS or if there may 2841 be a problem accessing OPERAND in the outer mode. */ 2842 if (CONSTANT_P (operand) 2843 || GET_CODE (operand) == PLUS 2844 /* We must force a reload of paradoxical SUBREGs 2845 of a MEM because the alignment of the inner value 2846 may not be enough to do the outer reference. On 2847 big-endian machines, it may also reference outside 2848 the object. 2849 2850 On machines that extend byte operations and we have a 2851 SUBREG where both the inner and outer modes are no wider 2852 than a word and the inner mode is narrower, is integral, 2853 and gets extended when loaded from memory, combine.c has 2854 made assumptions about the behavior of the machine in such 2855 register access. If the data is, in fact, in memory we 2856 must always load using the size assumed to be in the 2857 register and let the insn do the different-sized 2858 accesses. 2859 2860 This is doubly true if WORD_REGISTER_OPERATIONS. In 2861 this case eliminate_regs has left non-paradoxical 2862 subregs for push_reloads to see. Make sure it does 2863 by forcing the reload. 2864 2865 ??? When is it right at this stage to have a subreg 2866 of a mem that is _not_ to be handled specialy? IMO 2867 those should have been reduced to just a mem. */ 2868 || ((GET_CODE (operand) == MEM 2869 || (GET_CODE (operand)== REG 2870 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)) 2871#ifndef WORD_REGISTER_OPERATIONS 2872 && (((GET_MODE_BITSIZE (GET_MODE (operand)) 2873 < BIGGEST_ALIGNMENT) 2874 && (GET_MODE_SIZE (operand_mode[i]) 2875 > GET_MODE_SIZE (GET_MODE (operand)))) 2876 || (GET_CODE (operand) == MEM && BYTES_BIG_ENDIAN) 2877#ifdef LOAD_EXTEND_OP 2878 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD 2879 && (GET_MODE_SIZE (GET_MODE (operand)) 2880 <= UNITS_PER_WORD) 2881 && (GET_MODE_SIZE (operand_mode[i]) 2882 > GET_MODE_SIZE (GET_MODE (operand))) 2883 && INTEGRAL_MODE_P (GET_MODE (operand)) 2884 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL) 2885#endif 2886 ) 2887#endif 2888 ) 2889 /* Subreg of a hard reg which can't handle the subreg's mode 2890 or which would handle that mode in the wrong number of 2891 registers for subregging to work. */ 2892 || (GET_CODE (operand) == REG 2893 && REGNO (operand) < FIRST_PSEUDO_REGISTER 2894 && ((GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD 2895 && (GET_MODE_SIZE (GET_MODE (operand)) 2896 > UNITS_PER_WORD) 2897 && ((GET_MODE_SIZE (GET_MODE (operand)) 2898 / UNITS_PER_WORD) 2899 != HARD_REGNO_NREGS (REGNO (operand), 2900 GET_MODE (operand)))) 2901 || ! HARD_REGNO_MODE_OK (REGNO (operand) + offset, 2902 operand_mode[i])))) 2903 force_reload = 1; 2904 } 2905 2906 this_alternative[i] = (int) NO_REGS; 2907 this_alternative_win[i] = 0; 2908 this_alternative_offmemok[i] = 0; 2909 this_alternative_earlyclobber[i] = 0; 2910 this_alternative_matches[i] = -1; 2911 2912 /* An empty constraint or empty alternative 2913 allows anything which matched the pattern. */ 2914 if (*p == 0 || *p == ',') 2915 win = 1, badop = 0; 2916 2917 /* Scan this alternative's specs for this operand; 2918 set WIN if the operand fits any letter in this alternative. 2919 Otherwise, clear BADOP if this operand could 2920 fit some letter after reloads, 2921 or set WINREG if this operand could fit after reloads 2922 provided the constraint allows some registers. */ 2923 2924 while (*p && (c = *p++) != ',') 2925 switch (c) 2926 { 2927 case '=': 2928 case '+': 2929 case '*': 2930 break; 2931 2932 case '%': 2933 /* The last operand should not be marked commutative. */ 2934 if (i != noperands - 1) 2935 commutative = i; 2936 break; 2937 2938 case '?': 2939 reject += 6; 2940 break; 2941 2942 case '!': 2943 reject = 600; 2944 break; 2945 2946 case '#': 2947 /* Ignore rest of this alternative as far as 2948 reloading is concerned. */ 2949 while (*p && *p != ',') p++; 2950 break; 2951 2952 case '0': 2953 case '1': 2954 case '2': 2955 case '3': 2956 case '4': 2957 c -= '0'; 2958 this_alternative_matches[i] = c; 2959 /* We are supposed to match a previous operand. 2960 If we do, we win if that one did. 2961 If we do not, count both of the operands as losers. 2962 (This is too conservative, since most of the time 2963 only a single reload insn will be needed to make 2964 the two operands win. As a result, this alternative 2965 may be rejected when it is actually desirable.) */ 2966 if ((swapped && (c != commutative || i != commutative + 1)) 2967 /* If we are matching as if two operands were swapped, 2968 also pretend that operands_match had been computed 2969 with swapped. 2970 But if I is the second of those and C is the first, 2971 don't exchange them, because operands_match is valid 2972 only on one side of its diagonal. */ 2973 ? (operands_match 2974 [(c == commutative || c == commutative + 1) 2975 ? 2*commutative + 1 - c : c] 2976 [(i == commutative || i == commutative + 1) 2977 ? 2*commutative + 1 - i : i]) 2978 : operands_match[c][i]) 2979 { 2980 /* If we are matching a non-offsettable address where an 2981 offsettable address was expected, then we must reject 2982 this combination, because we can't reload it. */ 2983 if (this_alternative_offmemok[c] 2984 && GET_CODE (recog_operand[c]) == MEM 2985 && this_alternative[c] == (int) NO_REGS 2986 && ! this_alternative_win[c]) 2987 bad = 1; 2988 2989 win = this_alternative_win[c]; 2990 } 2991 else 2992 { 2993 /* Operands don't match. */ 2994 rtx value; 2995 /* Retroactively mark the operand we had to match 2996 as a loser, if it wasn't already. */ 2997 if (this_alternative_win[c]) 2998 losers++; 2999 this_alternative_win[c] = 0; 3000 if (this_alternative[c] == (int) NO_REGS) 3001 bad = 1; 3002 /* But count the pair only once in the total badness of 3003 this alternative, if the pair can be a dummy reload. */ 3004 value 3005 = find_dummy_reload (recog_operand[i], recog_operand[c], 3006 recog_operand_loc[i], recog_operand_loc[c], 3007 operand_mode[i], operand_mode[c], 3008 this_alternative[c], -1, 3009 this_alternative_earlyclobber[c]); 3010 3011 if (value != 0) 3012 losers--; 3013 } 3014 /* This can be fixed with reloads if the operand 3015 we are supposed to match can be fixed with reloads. */ 3016 badop = 0; 3017 this_alternative[i] = this_alternative[c]; 3018 3019 /* If we have to reload this operand and some previous 3020 operand also had to match the same thing as this 3021 operand, we don't know how to do that. So reject this 3022 alternative. */ 3023 if (! win || force_reload) 3024 for (j = 0; j < i; j++) 3025 if (this_alternative_matches[j] 3026 == this_alternative_matches[i]) 3027 badop = 1; 3028 3029 break; 3030 3031 case 'p': 3032 /* All necessary reloads for an address_operand 3033 were handled in find_reloads_address. */ 3034 this_alternative[i] = (int) BASE_REG_CLASS; 3035 win = 1; 3036 break; 3037 3038 case 'm': 3039 if (force_reload) 3040 break; 3041 if (GET_CODE (operand) == MEM 3042 || (GET_CODE (operand) == REG 3043 && REGNO (operand) >= FIRST_PSEUDO_REGISTER 3044 && reg_renumber[REGNO (operand)] < 0)) 3045 win = 1; 3046 if (CONSTANT_P (operand) 3047 /* force_const_mem does not accept HIGH. */ 3048 && GET_CODE (operand) != HIGH) 3049 badop = 0; 3050 constmemok = 1; 3051 break; 3052 3053 case '<': 3054 if (GET_CODE (operand) == MEM 3055 && ! address_reloaded[i] 3056 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC 3057 || GET_CODE (XEXP (operand, 0)) == POST_DEC)) 3058 win = 1; 3059 break; 3060 3061 case '>': 3062 if (GET_CODE (operand) == MEM 3063 && ! address_reloaded[i] 3064 && (GET_CODE (XEXP (operand, 0)) == PRE_INC 3065 || GET_CODE (XEXP (operand, 0)) == POST_INC)) 3066 win = 1; 3067 break; 3068 3069 /* Memory operand whose address is not offsettable. */ 3070 case 'V': 3071 if (force_reload) 3072 break; 3073 if (GET_CODE (operand) == MEM 3074 && ! (ind_levels ? offsettable_memref_p (operand) 3075 : offsettable_nonstrict_memref_p (operand)) 3076 /* Certain mem addresses will become offsettable 3077 after they themselves are reloaded. This is important; 3078 we don't want our own handling of unoffsettables 3079 to override the handling of reg_equiv_address. */ 3080 && !(GET_CODE (XEXP (operand, 0)) == REG 3081 && (ind_levels == 0 3082 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0))) 3083 win = 1; 3084 break; 3085 3086 /* Memory operand whose address is offsettable. */ 3087 case 'o': 3088 if (force_reload) 3089 break; 3090 if ((GET_CODE (operand) == MEM 3091 /* If IND_LEVELS, find_reloads_address won't reload a 3092 pseudo that didn't get a hard reg, so we have to 3093 reject that case. */ 3094 && ((ind_levels ? offsettable_memref_p (operand) 3095 : offsettable_nonstrict_memref_p (operand)) 3096 /* A reloaded address is offsettable because it is now 3097 just a simple register indirect. */ 3098 || address_reloaded[i])) 3099 || (GET_CODE (operand) == REG 3100 && REGNO (operand) >= FIRST_PSEUDO_REGISTER 3101 && reg_renumber[REGNO (operand)] < 0 3102 /* If reg_equiv_address is nonzero, we will be 3103 loading it into a register; hence it will be 3104 offsettable, but we cannot say that reg_equiv_mem 3105 is offsettable without checking. */ 3106 && ((reg_equiv_mem[REGNO (operand)] != 0 3107 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)])) 3108 || (reg_equiv_address[REGNO (operand)] != 0)))) 3109 win = 1; 3110 /* force_const_mem does not accept HIGH. */ 3111 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH) 3112 || GET_CODE (operand) == MEM) 3113 badop = 0; 3114 constmemok = 1; 3115 offmemok = 1; 3116 break; 3117 3118 case '&': 3119 /* Output operand that is stored before the need for the 3120 input operands (and their index registers) is over. */ 3121 earlyclobber = 1, this_earlyclobber = 1; 3122 break; 3123 3124 case 'E': 3125#ifndef REAL_ARITHMETIC 3126 /* Match any floating double constant, but only if 3127 we can examine the bits of it reliably. */ 3128 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT 3129 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD) 3130 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float) 3131 break; 3132#endif 3133 if (GET_CODE (operand) == CONST_DOUBLE) 3134 win = 1; 3135 break; 3136 3137 case 'F': 3138 if (GET_CODE (operand) == CONST_DOUBLE) 3139 win = 1; 3140 break; 3141 3142 case 'G': 3143 case 'H': 3144 if (GET_CODE (operand) == CONST_DOUBLE 3145 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c)) 3146 win = 1; 3147 break; 3148 3149 case 's': 3150 if (GET_CODE (operand) == CONST_INT 3151 || (GET_CODE (operand) == CONST_DOUBLE 3152 && GET_MODE (operand) == VOIDmode)) 3153 break; 3154 case 'i': 3155 if (CONSTANT_P (operand) 3156#ifdef LEGITIMATE_PIC_OPERAND_P 3157 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand)) 3158#endif 3159 ) 3160 win = 1; 3161 break; 3162 3163 case 'n': 3164 if (GET_CODE (operand) == CONST_INT 3165 || (GET_CODE (operand) == CONST_DOUBLE 3166 && GET_MODE (operand) == VOIDmode)) 3167 win = 1; 3168 break; 3169 3170 case 'I': 3171 case 'J': 3172 case 'K': 3173 case 'L': 3174 case 'M': 3175 case 'N': 3176 case 'O': 3177 case 'P': 3178 if (GET_CODE (operand) == CONST_INT 3179 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c)) 3180 win = 1; 3181 break; 3182 3183 case 'X': 3184 win = 1; 3185 break; 3186 3187 case 'g': 3188 if (! force_reload 3189 /* A PLUS is never a valid operand, but reload can make 3190 it from a register when eliminating registers. */ 3191 && GET_CODE (operand) != PLUS 3192 /* A SCRATCH is not a valid operand. */ 3193 && GET_CODE (operand) != SCRATCH 3194#ifdef LEGITIMATE_PIC_OPERAND_P 3195 && (! CONSTANT_P (operand) 3196 || ! flag_pic 3197 || LEGITIMATE_PIC_OPERAND_P (operand)) 3198#endif 3199 && (GENERAL_REGS == ALL_REGS 3200 || GET_CODE (operand) != REG 3201 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER 3202 && reg_renumber[REGNO (operand)] < 0))) 3203 win = 1; 3204 /* Drop through into 'r' case */ 3205 3206 case 'r': 3207 this_alternative[i] 3208 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS]; 3209 goto reg; 3210 3211#ifdef EXTRA_CONSTRAINT 3212 case 'Q': 3213 case 'R': 3214 case 'S': 3215 case 'T': 3216 case 'U': 3217 if (EXTRA_CONSTRAINT (operand, c)) 3218 win = 1; 3219 break; 3220#endif 3221 3222 default: 3223 this_alternative[i] 3224 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)]; 3225 3226 reg: 3227 if (GET_MODE (operand) == BLKmode) 3228 break; 3229 winreg = 1; 3230 if (GET_CODE (operand) == REG 3231 && reg_fits_class_p (operand, this_alternative[i], 3232 offset, GET_MODE (recog_operand[i]))) 3233 win = 1; 3234 break; 3235 } 3236 3237 constraints[i] = p; 3238 3239 /* If this operand could be handled with a reg, 3240 and some reg is allowed, then this operand can be handled. */ 3241 if (winreg && this_alternative[i] != (int) NO_REGS) 3242 badop = 0; 3243 3244 /* Record which operands fit this alternative. */ 3245 this_alternative_earlyclobber[i] = earlyclobber; 3246 if (win && ! force_reload) 3247 this_alternative_win[i] = 1; 3248 else 3249 { 3250 int const_to_mem = 0; 3251 3252 this_alternative_offmemok[i] = offmemok; 3253 losers++; 3254 if (badop) 3255 bad = 1; 3256 /* Alternative loses if it has no regs for a reg operand. */ 3257 if (GET_CODE (operand) == REG 3258 && this_alternative[i] == (int) NO_REGS 3259 && this_alternative_matches[i] < 0) 3260 bad = 1; 3261 3262#if 0 3263 /* If this is a pseudo-register that is set in the previous 3264 insns, there's a good chance that it will already be in a 3265 spill register and we can use that spill register. So 3266 make this case cheaper. 3267 3268 Disabled for egcs. egcs has better inheritance code and 3269 this change causes problems with the improved reload 3270 inheritance code. */ 3271 if (GET_CODE (operand) == REG 3272 && REGNO (operand) >= FIRST_PSEUDO_REGISTER 3273 && REGNO (operand) == last_output_reload_regno) 3274 reject--; 3275#endif 3276 3277 /* If this is a constant that is reloaded into the desired 3278 class by copying it to memory first, count that as another 3279 reload. This is consistent with other code and is 3280 required to avoid choosing another alternative when 3281 the constant is moved into memory by this function on 3282 an early reload pass. Note that the test here is 3283 precisely the same as in the code below that calls 3284 force_const_mem. */ 3285 if (CONSTANT_P (operand) 3286 /* force_const_mem does not accept HIGH. */ 3287 && GET_CODE (operand) != HIGH 3288 && ((PREFERRED_RELOAD_CLASS (operand, 3289 (enum reg_class) this_alternative[i]) 3290 == NO_REGS) 3291 || no_input_reloads) 3292 && operand_mode[i] != VOIDmode) 3293 { 3294 const_to_mem = 1; 3295 if (this_alternative[i] != (int) NO_REGS) 3296 losers++; 3297 } 3298 3299 /* If we can't reload this value at all, reject this 3300 alternative. Note that we could also lose due to 3301 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that 3302 here. */ 3303 3304 if (! CONSTANT_P (operand) 3305 && (enum reg_class) this_alternative[i] != NO_REGS 3306 && (PREFERRED_RELOAD_CLASS (operand, 3307 (enum reg_class) this_alternative[i]) 3308 == NO_REGS)) 3309 bad = 1; 3310 3311 /* Alternative loses if it requires a type of reload not 3312 permitted for this insn. We can always reload SCRATCH 3313 and objects with a REG_UNUSED note. */ 3314 else if (GET_CODE (operand) != SCRATCH 3315 && modified[i] != RELOAD_READ && no_output_reloads 3316 && ! find_reg_note (insn, REG_UNUSED, operand)) 3317 bad = 1; 3318 else if (modified[i] != RELOAD_WRITE && no_input_reloads 3319 && ! const_to_mem) 3320 bad = 1; 3321 3322 3323 /* We prefer to reload pseudos over reloading other things, 3324 since such reloads may be able to be eliminated later. 3325 If we are reloading a SCRATCH, we won't be generating any 3326 insns, just using a register, so it is also preferred. 3327 So bump REJECT in other cases. Don't do this in the 3328 case where we are forcing a constant into memory and 3329 it will then win since we don't want to have a different 3330 alternative match then. */ 3331 if (! (GET_CODE (operand) == REG 3332 && REGNO (operand) >= FIRST_PSEUDO_REGISTER) 3333 && GET_CODE (operand) != SCRATCH 3334 && ! (const_to_mem && constmemok)) 3335 reject += 2; 3336 3337 /* Input reloads can be inherited more often than output 3338 reloads can be removed, so penalize output reloads. */ 3339 if (operand_type[i] != RELOAD_FOR_INPUT 3340 && GET_CODE (operand) != SCRATCH) 3341 reject++; 3342 } 3343 3344 /* If this operand is a pseudo register that didn't get a hard 3345 reg and this alternative accepts some register, see if the 3346 class that we want is a subset of the preferred class for this 3347 register. If not, but it intersects that class, use the 3348 preferred class instead. If it does not intersect the preferred 3349 class, show that usage of this alternative should be discouraged; 3350 it will be discouraged more still if the register is `preferred 3351 or nothing'. We do this because it increases the chance of 3352 reusing our spill register in a later insn and avoiding a pair 3353 of memory stores and loads. 3354 3355 Don't bother with this if this alternative will accept this 3356 operand. 3357 3358 Don't do this for a multiword operand, since it is only a 3359 small win and has the risk of requiring more spill registers, 3360 which could cause a large loss. 3361 3362 Don't do this if the preferred class has only one register 3363 because we might otherwise exhaust the class. */ 3364 3365 3366 if (! win && this_alternative[i] != (int) NO_REGS 3367 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD 3368 && reg_class_size[(int) preferred_class[i]] > 1) 3369 { 3370 if (! reg_class_subset_p (this_alternative[i], 3371 preferred_class[i])) 3372 { 3373 /* Since we don't have a way of forming the intersection, 3374 we just do something special if the preferred class 3375 is a subset of the class we have; that's the most 3376 common case anyway. */ 3377 if (reg_class_subset_p (preferred_class[i], 3378 this_alternative[i])) 3379 this_alternative[i] = (int) preferred_class[i]; 3380 else 3381 reject += (2 + 2 * pref_or_nothing[i]); 3382 } 3383 } 3384 } 3385 3386 /* Now see if any output operands that are marked "earlyclobber" 3387 in this alternative conflict with any input operands 3388 or any memory addresses. */ 3389 3390 for (i = 0; i < noperands; i++) 3391 if (this_alternative_earlyclobber[i] 3392 && this_alternative_win[i]) 3393 { 3394 struct decomposition early_data; 3395 3396 early_data = decompose (recog_operand[i]); 3397 3398 if (modified[i] == RELOAD_READ) 3399 abort (); 3400 3401 if (this_alternative[i] == NO_REGS) 3402 { 3403 this_alternative_earlyclobber[i] = 0; 3404 if (this_insn_is_asm) 3405 error_for_asm (this_insn, 3406 "`&' constraint used with no register class"); 3407 else 3408 abort (); 3409 } 3410 3411 for (j = 0; j < noperands; j++) 3412 /* Is this an input operand or a memory ref? */ 3413 if ((GET_CODE (recog_operand[j]) == MEM 3414 || modified[j] != RELOAD_WRITE) 3415 && j != i 3416 /* Ignore things like match_operator operands. */ 3417 && *recog_constraints[j] != 0 3418 /* Don't count an input operand that is constrained to match 3419 the early clobber operand. */ 3420 && ! (this_alternative_matches[j] == i 3421 && rtx_equal_p (recog_operand[i], recog_operand[j])) 3422 /* Is it altered by storing the earlyclobber operand? */ 3423 && !immune_p (recog_operand[j], recog_operand[i], early_data)) 3424 { 3425 /* If the output is in a single-reg class, 3426 it's costly to reload it, so reload the input instead. */ 3427 if (reg_class_size[this_alternative[i]] == 1 3428 && (GET_CODE (recog_operand[j]) == REG 3429 || GET_CODE (recog_operand[j]) == SUBREG)) 3430 { 3431 losers++; 3432 this_alternative_win[j] = 0; 3433 } 3434 else 3435 break; 3436 } 3437 /* If an earlyclobber operand conflicts with something, 3438 it must be reloaded, so request this and count the cost. */ 3439 if (j != noperands) 3440 { 3441 losers++; 3442 this_alternative_win[i] = 0; 3443 for (j = 0; j < noperands; j++) 3444 if (this_alternative_matches[j] == i 3445 && this_alternative_win[j]) 3446 { 3447 this_alternative_win[j] = 0; 3448 losers++; 3449 } 3450 } 3451 } 3452 3453 /* If one alternative accepts all the operands, no reload required, 3454 choose that alternative; don't consider the remaining ones. */ 3455 if (losers == 0) 3456 { 3457 /* Unswap these so that they are never swapped at `finish'. */ 3458 if (commutative >= 0) 3459 { 3460 recog_operand[commutative] = substed_operand[commutative]; 3461 recog_operand[commutative + 1] 3462 = substed_operand[commutative + 1]; 3463 } 3464 for (i = 0; i < noperands; i++) 3465 { 3466 goal_alternative_win[i] = 1; 3467 goal_alternative[i] = this_alternative[i]; 3468 goal_alternative_offmemok[i] = this_alternative_offmemok[i]; 3469 goal_alternative_matches[i] = this_alternative_matches[i]; 3470 goal_alternative_earlyclobber[i] 3471 = this_alternative_earlyclobber[i]; 3472 } 3473 goal_alternative_number = this_alternative_number; 3474 goal_alternative_swapped = swapped; 3475 goal_earlyclobber = this_earlyclobber; 3476 goto finish; 3477 } 3478 3479 /* REJECT, set by the ! and ? constraint characters and when a register 3480 would be reloaded into a non-preferred class, discourages the use of 3481 this alternative for a reload goal. REJECT is incremented by six 3482 for each ? and two for each non-preferred class. */ 3483 losers = losers * 6 + reject; 3484 3485 /* If this alternative can be made to work by reloading, 3486 and it needs less reloading than the others checked so far, 3487 record it as the chosen goal for reloading. */ 3488 if (! bad && best > losers) 3489 { 3490 for (i = 0; i < noperands; i++) 3491 { 3492 goal_alternative[i] = this_alternative[i]; 3493 goal_alternative_win[i] = this_alternative_win[i]; 3494 goal_alternative_offmemok[i] = this_alternative_offmemok[i]; 3495 goal_alternative_matches[i] = this_alternative_matches[i]; 3496 goal_alternative_earlyclobber[i] 3497 = this_alternative_earlyclobber[i]; 3498 } 3499 goal_alternative_swapped = swapped; 3500 best = losers; 3501 goal_alternative_number = this_alternative_number; 3502 goal_earlyclobber = this_earlyclobber; 3503 } 3504 } 3505 3506 /* If insn is commutative (it's safe to exchange a certain pair of operands) 3507 then we need to try each alternative twice, 3508 the second time matching those two operands 3509 as if we had exchanged them. 3510 To do this, really exchange them in operands. 3511 3512 If we have just tried the alternatives the second time, 3513 return operands to normal and drop through. */ 3514 3515 if (commutative >= 0) 3516 { 3517 swapped = !swapped; 3518 if (swapped) 3519 { 3520 register enum reg_class tclass; 3521 register int t; 3522 3523 recog_operand[commutative] = substed_operand[commutative + 1]; 3524 recog_operand[commutative + 1] = substed_operand[commutative]; 3525 3526 tclass = preferred_class[commutative]; 3527 preferred_class[commutative] = preferred_class[commutative + 1]; 3528 preferred_class[commutative + 1] = tclass; 3529 3530 t = pref_or_nothing[commutative]; 3531 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1]; 3532 pref_or_nothing[commutative + 1] = t; 3533 3534 bcopy ((char *) recog_constraints, (char *) constraints, 3535 noperands * sizeof (char *)); 3536 goto try_swapped; 3537 } 3538 else 3539 { 3540 recog_operand[commutative] = substed_operand[commutative]; 3541 recog_operand[commutative + 1] = substed_operand[commutative + 1]; 3542 } 3543 } 3544 3545 /* The operands don't meet the constraints. 3546 goal_alternative describes the alternative 3547 that we could reach by reloading the fewest operands. 3548 Reload so as to fit it. */ 3549 3550 if (best == MAX_RECOG_OPERANDS * 2 + 600) 3551 { 3552 /* No alternative works with reloads?? */ 3553 if (insn_code_number >= 0) 3554 fatal_insn ("Unable to generate reloads for:", insn); 3555 error_for_asm (insn, "inconsistent operand constraints in an `asm'"); 3556 /* Avoid further trouble with this insn. */ 3557 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 3558 n_reloads = 0; 3559 return 0; 3560 } 3561 3562 /* Jump to `finish' from above if all operands are valid already. 3563 In that case, goal_alternative_win is all 1. */ 3564 finish: 3565 3566 /* Right now, for any pair of operands I and J that are required to match, 3567 with I < J, 3568 goal_alternative_matches[J] is I. 3569 Set up goal_alternative_matched as the inverse function: 3570 goal_alternative_matched[I] = J. */ 3571 3572 for (i = 0; i < noperands; i++) 3573 goal_alternative_matched[i] = -1; 3574 3575 for (i = 0; i < noperands; i++) 3576 if (! goal_alternative_win[i] 3577 && goal_alternative_matches[i] >= 0) 3578 goal_alternative_matched[goal_alternative_matches[i]] = i; 3579 3580 /* If the best alternative is with operands 1 and 2 swapped, 3581 consider them swapped before reporting the reloads. Update the 3582 operand numbers of any reloads already pushed. */ 3583 3584 if (goal_alternative_swapped) 3585 { 3586 register rtx tem; 3587 3588 tem = substed_operand[commutative]; 3589 substed_operand[commutative] = substed_operand[commutative + 1]; 3590 substed_operand[commutative + 1] = tem; 3591 tem = recog_operand[commutative]; 3592 recog_operand[commutative] = recog_operand[commutative + 1]; 3593 recog_operand[commutative + 1] = tem; 3594 tem = *recog_operand_loc[commutative]; 3595 *recog_operand_loc[commutative] = *recog_operand_loc[commutative+1]; 3596 *recog_operand_loc[commutative+1] = tem; 3597 3598 for (i = 0; i < n_reloads; i++) 3599 { 3600 if (reload_opnum[i] == commutative) 3601 reload_opnum[i] = commutative + 1; 3602 else if (reload_opnum[i] == commutative + 1) 3603 reload_opnum[i] = commutative; 3604 } 3605 } 3606 3607 for (i = 0; i < noperands; i++) 3608 { 3609 operand_reloadnum[i] = -1; 3610 3611 /* If this is an earlyclobber operand, we need to widen the scope. 3612 The reload must remain valid from the start of the insn being 3613 reloaded until after the operand is stored into its destination. 3614 We approximate this with RELOAD_OTHER even though we know that we 3615 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads. 3616 3617 One special case that is worth checking is when we have an 3618 output that is earlyclobber but isn't used past the insn (typically 3619 a SCRATCH). In this case, we only need have the reload live 3620 through the insn itself, but not for any of our input or output 3621 reloads. 3622 But we must not accidentally narrow the scope of an existing 3623 RELOAD_OTHER reload - leave these alone. 3624 3625 In any case, anything needed to address this operand can remain 3626 however they were previously categorized. */ 3627 3628 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER) 3629 operand_type[i] 3630 = (find_reg_note (insn, REG_UNUSED, recog_operand[i]) 3631 ? RELOAD_FOR_INSN : RELOAD_OTHER); 3632 } 3633 3634 /* Any constants that aren't allowed and can't be reloaded 3635 into registers are here changed into memory references. */ 3636 for (i = 0; i < noperands; i++) 3637 if (! goal_alternative_win[i] 3638 && CONSTANT_P (recog_operand[i]) 3639 /* force_const_mem does not accept HIGH. */ 3640 && GET_CODE (recog_operand[i]) != HIGH 3641 && ((PREFERRED_RELOAD_CLASS (recog_operand[i], 3642 (enum reg_class) goal_alternative[i]) 3643 == NO_REGS) 3644 || no_input_reloads) 3645 && operand_mode[i] != VOIDmode) 3646 { 3647 substed_operand[i] = recog_operand[i] 3648 = find_reloads_toplev (force_const_mem (operand_mode[i], 3649 recog_operand[i]), 3650 i, address_type[i], ind_levels, 0, insn); 3651 if (alternative_allows_memconst (recog_constraints[i], 3652 goal_alternative_number)) 3653 goal_alternative_win[i] = 1; 3654 } 3655 3656 /* Record the values of the earlyclobber operands for the caller. */ 3657 if (goal_earlyclobber) 3658 for (i = 0; i < noperands; i++) 3659 if (goal_alternative_earlyclobber[i]) 3660 reload_earlyclobbers[n_earlyclobbers++] = recog_operand[i]; 3661 3662 /* Now record reloads for all the operands that need them. */ 3663 last_output_reload_regno = -1; 3664 for (i = 0; i < noperands; i++) 3665 if (! goal_alternative_win[i]) 3666 { 3667 /* Operands that match previous ones have already been handled. */ 3668 if (goal_alternative_matches[i] >= 0) 3669 ; 3670 /* Handle an operand with a nonoffsettable address 3671 appearing where an offsettable address will do 3672 by reloading the address into a base register. 3673 3674 ??? We can also do this when the operand is a register and 3675 reg_equiv_mem is not offsettable, but this is a bit tricky, 3676 so we don't bother with it. It may not be worth doing. */ 3677 else if (goal_alternative_matched[i] == -1 3678 && goal_alternative_offmemok[i] 3679 && GET_CODE (recog_operand[i]) == MEM) 3680 { 3681 operand_reloadnum[i] 3682 = push_reload (XEXP (recog_operand[i], 0), NULL_RTX, 3683 &XEXP (recog_operand[i], 0), NULL_PTR, 3684 BASE_REG_CLASS, GET_MODE (XEXP (recog_operand[i], 0)), 3685 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT); 3686 reload_inc[operand_reloadnum[i]] 3687 = GET_MODE_SIZE (GET_MODE (recog_operand[i])); 3688 3689 /* If this operand is an output, we will have made any 3690 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but 3691 now we are treating part of the operand as an input, so 3692 we must change these to RELOAD_FOR_INPUT_ADDRESS. */ 3693 3694 if (modified[i] == RELOAD_WRITE) 3695 { 3696 for (j = 0; j < n_reloads; j++) 3697 { 3698 if (reload_opnum[j] == i) 3699 { 3700 if (reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS) 3701 reload_when_needed[j] = RELOAD_FOR_INPUT_ADDRESS; 3702 else if (reload_when_needed[j] 3703 == RELOAD_FOR_OUTADDR_ADDRESS) 3704 reload_when_needed[j] = RELOAD_FOR_INPADDR_ADDRESS; 3705 } 3706 } 3707 } 3708 } 3709 else if (goal_alternative_matched[i] == -1) 3710 { 3711 operand_reloadnum[i] 3712 = push_reload ((modified[i] != RELOAD_WRITE 3713 ? recog_operand[i] : 0), 3714 modified[i] != RELOAD_READ ? recog_operand[i] : 0, 3715 (modified[i] != RELOAD_WRITE 3716 ? recog_operand_loc[i] : 0), 3717 (modified[i] != RELOAD_READ 3718 ? recog_operand_loc[i] : 0), 3719 (enum reg_class) goal_alternative[i], 3720 (modified[i] == RELOAD_WRITE 3721 ? VOIDmode : operand_mode[i]), 3722 (modified[i] == RELOAD_READ 3723 ? VOIDmode : operand_mode[i]), 3724 (insn_code_number < 0 ? 0 3725 : insn_operand_strict_low[insn_code_number][i]), 3726 0, i, operand_type[i]); 3727 if (modified[i] != RELOAD_READ 3728 && GET_CODE (recog_operand[i]) == REG) 3729 last_output_reload_regno = REGNO (recog_operand[i]); 3730 } 3731 /* In a matching pair of operands, one must be input only 3732 and the other must be output only. 3733 Pass the input operand as IN and the other as OUT. */ 3734 else if (modified[i] == RELOAD_READ 3735 && modified[goal_alternative_matched[i]] == RELOAD_WRITE) 3736 { 3737 operand_reloadnum[i] 3738 = push_reload (recog_operand[i], 3739 recog_operand[goal_alternative_matched[i]], 3740 recog_operand_loc[i], 3741 recog_operand_loc[goal_alternative_matched[i]], 3742 (enum reg_class) goal_alternative[i], 3743 operand_mode[i], 3744 operand_mode[goal_alternative_matched[i]], 3745 0, 0, i, RELOAD_OTHER); 3746 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum; 3747 if (GET_CODE (recog_operand[goal_alternative_matched[i]]) == REG) 3748 last_output_reload_regno 3749 = REGNO (recog_operand[goal_alternative_matched[i]]); 3750 } 3751 else if (modified[i] == RELOAD_WRITE 3752 && modified[goal_alternative_matched[i]] == RELOAD_READ) 3753 { 3754 operand_reloadnum[goal_alternative_matched[i]] 3755 = push_reload (recog_operand[goal_alternative_matched[i]], 3756 recog_operand[i], 3757 recog_operand_loc[goal_alternative_matched[i]], 3758 recog_operand_loc[i], 3759 (enum reg_class) goal_alternative[i], 3760 operand_mode[goal_alternative_matched[i]], 3761 operand_mode[i], 3762 0, 0, i, RELOAD_OTHER); 3763 operand_reloadnum[i] = output_reloadnum; 3764 if (GET_CODE (recog_operand[i]) == REG) 3765 last_output_reload_regno = REGNO (recog_operand[i]); 3766 } 3767 else if (insn_code_number >= 0) 3768 abort (); 3769 else 3770 { 3771 error_for_asm (insn, "inconsistent operand constraints in an `asm'"); 3772 /* Avoid further trouble with this insn. */ 3773 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 3774 n_reloads = 0; 3775 return 0; 3776 } 3777 } 3778 else if (goal_alternative_matched[i] < 0 3779 && goal_alternative_matches[i] < 0 3780 && optimize) 3781 { 3782 /* For each non-matching operand that's a MEM or a pseudo-register 3783 that didn't get a hard register, make an optional reload. 3784 This may get done even if the insn needs no reloads otherwise. */ 3785 3786 rtx operand = recog_operand[i]; 3787 3788 while (GET_CODE (operand) == SUBREG) 3789 operand = XEXP (operand, 0); 3790 if ((GET_CODE (operand) == MEM 3791 || (GET_CODE (operand) == REG 3792 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)) 3793 /* If this is only for an output, the optional reload would not 3794 actually cause us to use a register now, just note that 3795 something is stored here. */ 3796 && ((enum reg_class) goal_alternative[i] != NO_REGS 3797 || modified[i] == RELOAD_WRITE) 3798 && ! no_input_reloads 3799 /* An optional output reload might allow to delete INSN later. 3800 We mustn't make in-out reloads on insns that are not permitted 3801 output reloads. 3802 If this is an asm, we can't delete it; we must not even call 3803 push_reload for an optional output reload in this case, 3804 because we can't be sure that the constraint allows a register, 3805 and push_reload verifies the constraints for asms. */ 3806 && (modified[i] == RELOAD_READ 3807 || (! no_output_reloads && ! this_insn_is_asm))) 3808 operand_reloadnum[i] 3809 = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0, 3810 modified[i] != RELOAD_READ ? recog_operand[i] : 0, 3811 (modified[i] != RELOAD_WRITE 3812 ? recog_operand_loc[i] : 0), 3813 (modified[i] != RELOAD_READ 3814 ? recog_operand_loc[i] : 0), 3815 (enum reg_class) goal_alternative[i], 3816 (modified[i] == RELOAD_WRITE 3817 ? VOIDmode : operand_mode[i]), 3818 (modified[i] == RELOAD_READ 3819 ? VOIDmode : operand_mode[i]), 3820 (insn_code_number < 0 ? 0 3821 : insn_operand_strict_low[insn_code_number][i]), 3822 1, i, operand_type[i]); 3823 /* If a memory reference remains (either as a MEM or a pseudo that 3824 did not get a hard register), yet we can't make an optional 3825 reload, check if this is actually a pseudo register reference; 3826 we then need to emit a USE and/or a CLOBBER so that reload 3827 inheritance will do the right thing. */ 3828 else if (replace 3829 && (GET_CODE (operand) == MEM 3830 || (GET_CODE (operand) == REG 3831 && REGNO (operand) >= FIRST_PSEUDO_REGISTER 3832 && reg_renumber [REGNO (operand)] < 0))) 3833 { 3834 operand = *recog_operand_loc[i]; 3835 3836 while (GET_CODE (operand) == SUBREG) 3837 operand = XEXP (operand, 0); 3838 if (GET_CODE (operand) == REG) 3839 { 3840 if (modified[i] != RELOAD_WRITE) 3841 emit_insn_before (gen_rtx_USE (VOIDmode, operand), insn); 3842 if (modified[i] != RELOAD_READ) 3843 emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn); 3844 } 3845 } 3846 } 3847 else if (goal_alternative_matches[i] >= 0 3848 && goal_alternative_win[goal_alternative_matches[i]] 3849 && modified[i] == RELOAD_READ 3850 && modified[goal_alternative_matches[i]] == RELOAD_WRITE 3851 && ! no_input_reloads && ! no_output_reloads 3852 && optimize) 3853 { 3854 /* Similarly, make an optional reload for a pair of matching 3855 objects that are in MEM or a pseudo that didn't get a hard reg. */ 3856 3857 rtx operand = recog_operand[i]; 3858 3859 while (GET_CODE (operand) == SUBREG) 3860 operand = XEXP (operand, 0); 3861 if ((GET_CODE (operand) == MEM 3862 || (GET_CODE (operand) == REG 3863 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)) 3864 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]] 3865 != NO_REGS)) 3866 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]] 3867 = push_reload (recog_operand[goal_alternative_matches[i]], 3868 recog_operand[i], 3869 recog_operand_loc[goal_alternative_matches[i]], 3870 recog_operand_loc[i], 3871 (enum reg_class) goal_alternative[goal_alternative_matches[i]], 3872 operand_mode[goal_alternative_matches[i]], 3873 operand_mode[i], 3874 0, 1, goal_alternative_matches[i], RELOAD_OTHER); 3875 } 3876 3877 /* Perform whatever substitutions on the operands we are supposed 3878 to make due to commutativity or replacement of registers 3879 with equivalent constants or memory slots. */ 3880 3881 for (i = 0; i < noperands; i++) 3882 { 3883 /* We only do this on the last pass through reload, because it is 3884 possible for some data (like reg_equiv_address) to be changed during 3885 later passes. Moreover, we loose the opportunity to get a useful 3886 reload_{in,out}_reg when we do these replacements. */ 3887 3888 if (replace) 3889 { 3890 rtx substitution = substed_operand[i]; 3891 3892 *recog_operand_loc[i] = substitution; 3893 3894 /* If we're replacing an operand with a LABEL_REF, we need 3895 to make sure that there's a REG_LABEL note attached to 3896 this instruction. */ 3897 if (GET_CODE (insn) != JUMP_INSN 3898 && GET_CODE (substitution) == LABEL_REF 3899 && !find_reg_note (insn, REG_LABEL, XEXP (substitution, 0))) 3900 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL, 3901 XEXP (substitution, 0), 3902 REG_NOTES (insn)); 3903 } 3904 else 3905 retval |= (substed_operand[i] != *recog_operand_loc[i]); 3906 } 3907 3908 /* If this insn pattern contains any MATCH_DUP's, make sure that 3909 they will be substituted if the operands they match are substituted. 3910 Also do now any substitutions we already did on the operands. 3911 3912 Don't do this if we aren't making replacements because we might be 3913 propagating things allocated by frame pointer elimination into places 3914 it doesn't expect. */ 3915 3916 if (insn_code_number >= 0 && replace) 3917 for (i = insn_n_dups[insn_code_number] - 1; i >= 0; i--) 3918 { 3919 int opno = recog_dup_num[i]; 3920 *recog_dup_loc[i] = *recog_operand_loc[opno]; 3921 if (operand_reloadnum[opno] >= 0) 3922 push_replacement (recog_dup_loc[i], operand_reloadnum[opno], 3923 insn_operand_mode[insn_code_number][opno]); 3924 } 3925 3926#if 0 3927 /* This loses because reloading of prior insns can invalidate the equivalence 3928 (or at least find_equiv_reg isn't smart enough to find it any more), 3929 causing this insn to need more reload regs than it needed before. 3930 It may be too late to make the reload regs available. 3931 Now this optimization is done safely in choose_reload_regs. */ 3932 3933 /* For each reload of a reg into some other class of reg, 3934 search for an existing equivalent reg (same value now) in the right class. 3935 We can use it as long as we don't need to change its contents. */ 3936 for (i = 0; i < n_reloads; i++) 3937 if (reload_reg_rtx[i] == 0 3938 && reload_in[i] != 0 3939 && GET_CODE (reload_in[i]) == REG 3940 && reload_out[i] == 0) 3941 { 3942 reload_reg_rtx[i] 3943 = find_equiv_reg (reload_in[i], insn, reload_reg_class[i], -1, 3944 static_reload_reg_p, 0, reload_inmode[i]); 3945 /* Prevent generation of insn to load the value 3946 because the one we found already has the value. */ 3947 if (reload_reg_rtx[i]) 3948 reload_in[i] = reload_reg_rtx[i]; 3949 } 3950#endif 3951 3952 /* Perhaps an output reload can be combined with another 3953 to reduce needs by one. */ 3954 if (!goal_earlyclobber) 3955 combine_reloads (); 3956 3957 /* If we have a pair of reloads for parts of an address, they are reloading 3958 the same object, the operands themselves were not reloaded, and they 3959 are for two operands that are supposed to match, merge the reloads and 3960 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */ 3961 3962 for (i = 0; i < n_reloads; i++) 3963 { 3964 int k; 3965 3966 for (j = i + 1; j < n_reloads; j++) 3967 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS 3968 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS 3969 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS 3970 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS) 3971 && (reload_when_needed[j] == RELOAD_FOR_INPUT_ADDRESS 3972 || reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS 3973 || reload_when_needed[j] == RELOAD_FOR_INPADDR_ADDRESS 3974 || reload_when_needed[j] == RELOAD_FOR_OUTADDR_ADDRESS) 3975 && rtx_equal_p (reload_in[i], reload_in[j]) 3976 && (operand_reloadnum[reload_opnum[i]] < 0 3977 || reload_optional[operand_reloadnum[reload_opnum[i]]]) 3978 && (operand_reloadnum[reload_opnum[j]] < 0 3979 || reload_optional[operand_reloadnum[reload_opnum[j]]]) 3980 && (goal_alternative_matches[reload_opnum[i]] == reload_opnum[j] 3981 || (goal_alternative_matches[reload_opnum[j]] 3982 == reload_opnum[i]))) 3983 { 3984 for (k = 0; k < n_replacements; k++) 3985 if (replacements[k].what == j) 3986 replacements[k].what = i; 3987 3988 if (reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS 3989 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS) 3990 reload_when_needed[i] = RELOAD_FOR_OPADDR_ADDR; 3991 else 3992 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS; 3993 reload_in[j] = 0; 3994 } 3995 } 3996 3997 /* Scan all the reloads and update their type. 3998 If a reload is for the address of an operand and we didn't reload 3999 that operand, change the type. Similarly, change the operand number 4000 of a reload when two operands match. If a reload is optional, treat it 4001 as though the operand isn't reloaded. 4002 4003 ??? This latter case is somewhat odd because if we do the optional 4004 reload, it means the object is hanging around. Thus we need only 4005 do the address reload if the optional reload was NOT done. 4006 4007 Change secondary reloads to be the address type of their operand, not 4008 the normal type. 4009 4010 If an operand's reload is now RELOAD_OTHER, change any 4011 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to 4012 RELOAD_FOR_OTHER_ADDRESS. */ 4013 4014 for (i = 0; i < n_reloads; i++) 4015 { 4016 if (reload_secondary_p[i] 4017 && reload_when_needed[i] == operand_type[reload_opnum[i]]) 4018 reload_when_needed[i] = address_type[reload_opnum[i]]; 4019 4020 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS 4021 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS 4022 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS 4023 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS) 4024 && (operand_reloadnum[reload_opnum[i]] < 0 4025 || reload_optional[operand_reloadnum[reload_opnum[i]]])) 4026 { 4027 /* If we have a secondary reload to go along with this reload, 4028 change its type to RELOAD_FOR_OPADDR_ADDR. */ 4029 4030 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS 4031 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS) 4032 && reload_secondary_in_reload[i] != -1) 4033 { 4034 int secondary_in_reload = reload_secondary_in_reload[i]; 4035 4036 reload_when_needed[secondary_in_reload] 4037 = RELOAD_FOR_OPADDR_ADDR; 4038 4039 /* If there's a tertiary reload we have to change it also. */ 4040 if (secondary_in_reload > 0 4041 && reload_secondary_in_reload[secondary_in_reload] != -1) 4042 reload_when_needed[reload_secondary_in_reload[secondary_in_reload]] 4043 = RELOAD_FOR_OPADDR_ADDR; 4044 } 4045 4046 if ((reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS 4047 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS) 4048 && reload_secondary_out_reload[i] != -1) 4049 { 4050 int secondary_out_reload = reload_secondary_out_reload[i]; 4051 4052 reload_when_needed[secondary_out_reload] 4053 = RELOAD_FOR_OPADDR_ADDR; 4054 4055 /* If there's a tertiary reload we have to change it also. */ 4056 if (secondary_out_reload 4057 && reload_secondary_out_reload[secondary_out_reload] != -1) 4058 reload_when_needed[reload_secondary_out_reload[secondary_out_reload]] 4059 = RELOAD_FOR_OPADDR_ADDR; 4060 } 4061 4062 if (reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS 4063 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS) 4064 reload_when_needed[i] = RELOAD_FOR_OPADDR_ADDR; 4065 else 4066 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS; 4067 } 4068 4069 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS 4070 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS) 4071 && operand_reloadnum[reload_opnum[i]] >= 0 4072 && (reload_when_needed[operand_reloadnum[reload_opnum[i]]] 4073 == RELOAD_OTHER)) 4074 reload_when_needed[i] = RELOAD_FOR_OTHER_ADDRESS; 4075 4076 if (goal_alternative_matches[reload_opnum[i]] >= 0) 4077 reload_opnum[i] = goal_alternative_matches[reload_opnum[i]]; 4078 } 4079 4080 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads. 4081 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR 4082 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads. 4083 4084 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never 4085 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a 4086 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads. 4087 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload, 4088 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all 4089 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it. 4090 This is complicated by the fact that a single operand can have more 4091 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix 4092 choose_reload_regs without affecting code quality, and cases that 4093 actually fail are extremely rare, so it turns out to be better to fix 4094 the problem here by not generating cases that choose_reload_regs will 4095 fail for. */ 4096 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS / 4097 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for 4098 a single operand. 4099 We can reduce the register pressure by exploiting that a 4100 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads 4101 does not conflict with any of them, if it is only used for the first of 4102 the RELOAD_FOR_X_ADDRESS reloads. */ 4103 { 4104 int first_op_addr_num = -2; 4105 int first_inpaddr_num[MAX_RECOG_OPERANDS]; 4106 int first_outpaddr_num[MAX_RECOG_OPERANDS]; 4107 int need_change= 0; 4108 /* We use last_op_addr_reload and the contents of the above arrays 4109 first as flags - -2 means no instance encountered, -1 means exactly 4110 one instance encountered. 4111 If more than one instance has been encountered, we store the reload 4112 number of the first reload of the kind in question; reload numbers 4113 are known to be non-negative. */ 4114 for (i = 0; i < noperands; i++) 4115 first_inpaddr_num[i] = first_outpaddr_num[i] = -2; 4116 for (i = n_reloads - 1; i >= 0; i--) 4117 { 4118 switch (reload_when_needed[i]) 4119 { 4120 case RELOAD_FOR_OPERAND_ADDRESS: 4121 if (++first_op_addr_num >= 0) 4122 { 4123 first_op_addr_num = i; 4124 need_change = 1; 4125 } 4126 break; 4127 case RELOAD_FOR_INPUT_ADDRESS: 4128 if (++first_inpaddr_num[reload_opnum[i]] >= 0) 4129 { 4130 first_inpaddr_num[reload_opnum[i]] = i; 4131 need_change = 1; 4132 } 4133 break; 4134 case RELOAD_FOR_OUTPUT_ADDRESS: 4135 if (++first_outpaddr_num[reload_opnum[i]] >= 0) 4136 { 4137 first_outpaddr_num[reload_opnum[i]] = i; 4138 need_change = 1; 4139 } 4140 break; 4141 default: 4142 break; 4143 } 4144 } 4145 4146 if (need_change) 4147 { 4148 for (i = 0; i < n_reloads; i++) 4149 { 4150 int first_num, type; 4151 4152 switch (reload_when_needed[i]) 4153 { 4154 case RELOAD_FOR_OPADDR_ADDR: 4155 first_num = first_op_addr_num; 4156 type = RELOAD_FOR_OPERAND_ADDRESS; 4157 break; 4158 case RELOAD_FOR_INPADDR_ADDRESS: 4159 first_num = first_inpaddr_num[reload_opnum[i]]; 4160 type = RELOAD_FOR_INPUT_ADDRESS; 4161 break; 4162 case RELOAD_FOR_OUTADDR_ADDRESS: 4163 first_num = first_outpaddr_num[reload_opnum[i]]; 4164 type = RELOAD_FOR_OUTPUT_ADDRESS; 4165 break; 4166 default: 4167 continue; 4168 } 4169 if (first_num < 0) 4170 continue; 4171 else if (i > first_num) 4172 reload_when_needed[i] = type; 4173 else 4174 { 4175 /* Check if the only TYPE reload that uses reload I is 4176 reload FIRST_NUM. */ 4177 for (j = n_reloads - 1; j > first_num; j--) 4178 { 4179 if (reload_when_needed[j] == type 4180 && (reload_secondary_p[i] 4181 ? reload_secondary_in_reload[j] == i 4182 : reg_mentioned_p (reload_in[i], reload_in[j]))) 4183 { 4184 reload_when_needed[i] = type; 4185 break; 4186 } 4187 } 4188 } 4189 } 4190 } 4191 } 4192 4193 /* See if we have any reloads that are now allowed to be merged 4194 because we've changed when the reload is needed to 4195 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only 4196 check for the most common cases. */ 4197 4198 for (i = 0; i < n_reloads; i++) 4199 if (reload_in[i] != 0 && reload_out[i] == 0 4200 && (reload_when_needed[i] == RELOAD_FOR_OPERAND_ADDRESS 4201 || reload_when_needed[i] == RELOAD_FOR_OPADDR_ADDR 4202 || reload_when_needed[i] == RELOAD_FOR_OTHER_ADDRESS)) 4203 for (j = 0; j < n_reloads; j++) 4204 if (i != j && reload_in[j] != 0 && reload_out[j] == 0 4205 && reload_when_needed[j] == reload_when_needed[i] 4206 && MATCHES (reload_in[i], reload_in[j]) 4207 && reload_reg_class[i] == reload_reg_class[j] 4208 && !reload_nocombine[i] && !reload_nocombine[j] 4209 && reload_reg_rtx[i] == reload_reg_rtx[j]) 4210 { 4211 reload_opnum[i] = MIN (reload_opnum[i], reload_opnum[j]); 4212 transfer_replacements (i, j); 4213 reload_in[j] = 0; 4214 } 4215 4216 /* Set which reloads must use registers not used in any group. Start 4217 with those that conflict with a group and then include ones that 4218 conflict with ones that are already known to conflict with a group. */ 4219 4220 changed = 0; 4221 for (i = 0; i < n_reloads; i++) 4222 { 4223 enum machine_mode mode = reload_inmode[i]; 4224 enum reg_class class = reload_reg_class[i]; 4225 int size; 4226 4227 if (GET_MODE_SIZE (reload_outmode[i]) > GET_MODE_SIZE (mode)) 4228 mode = reload_outmode[i]; 4229 size = CLASS_MAX_NREGS (class, mode); 4230 4231 if (size == 1) 4232 for (j = 0; j < n_reloads; j++) 4233 if ((CLASS_MAX_NREGS (reload_reg_class[j], 4234 (GET_MODE_SIZE (reload_outmode[j]) 4235 > GET_MODE_SIZE (reload_inmode[j])) 4236 ? reload_outmode[j] : reload_inmode[j]) 4237 > 1) 4238 && !reload_optional[j] 4239 && (reload_in[j] != 0 || reload_out[j] != 0 4240 || reload_secondary_p[j]) 4241 && reloads_conflict (i, j) 4242 && reg_classes_intersect_p (class, reload_reg_class[j])) 4243 { 4244 reload_nongroup[i] = 1; 4245 changed = 1; 4246 break; 4247 } 4248 } 4249 4250 while (changed) 4251 { 4252 changed = 0; 4253 4254 for (i = 0; i < n_reloads; i++) 4255 { 4256 enum machine_mode mode = reload_inmode[i]; 4257 enum reg_class class = reload_reg_class[i]; 4258 int size; 4259 4260 if (GET_MODE_SIZE (reload_outmode[i]) > GET_MODE_SIZE (mode)) 4261 mode = reload_outmode[i]; 4262 size = CLASS_MAX_NREGS (class, mode); 4263 4264 if (! reload_nongroup[i] && size == 1) 4265 for (j = 0; j < n_reloads; j++) 4266 if (reload_nongroup[j] 4267 && reloads_conflict (i, j) 4268 && reg_classes_intersect_p (class, reload_reg_class[j])) 4269 { 4270 reload_nongroup[i] = 1; 4271 changed = 1; 4272 break; 4273 } 4274 } 4275 } 4276 4277#else /* no REGISTER_CONSTRAINTS */ 4278 int noperands; 4279 int insn_code_number; 4280 int goal_earlyclobber = 0; /* Always 0, to make combine_reloads happen. */ 4281 register int i; 4282 rtx body = PATTERN (insn); 4283 int retval = 0; 4284 4285 n_reloads = 0; 4286 n_replacements = 0; 4287 n_earlyclobbers = 0; 4288 replace_reloads = replace; 4289 this_insn = insn; 4290 4291 extract_insn (insn); 4292 4293 noperands = reload_n_operands = recog_n_operands; 4294 4295 /* Return if the insn needs no reload processing. */ 4296 if (noperands == 0) 4297 return; 4298 4299 for (i = 0; i < noperands; i++) 4300 { 4301 register RTX_CODE code = GET_CODE (recog_operand[i]); 4302 int is_set_dest = GET_CODE (body) == SET && (i == 0); 4303 4304 if (insn_code_number >= 0) 4305 if (insn_operand_address_p[insn_code_number][i]) 4306 find_reloads_address (VOIDmode, NULL_PTR, 4307 recog_operand[i], recog_operand_loc[i], 4308 i, RELOAD_FOR_INPUT, ind_levels, insn); 4309 4310 /* In these cases, we can't tell if the operand is an input 4311 or an output, so be conservative. In practice it won't be 4312 problem. */ 4313 4314 if (code == MEM) 4315 find_reloads_address (GET_MODE (recog_operand[i]), 4316 recog_operand_loc[i], 4317 XEXP (recog_operand[i], 0), 4318 &XEXP (recog_operand[i], 0), 4319 i, RELOAD_OTHER, ind_levels, insn); 4320 if (code == SUBREG) 4321 recog_operand[i] = *recog_operand_loc[i] 4322 = find_reloads_toplev (recog_operand[i], i, RELOAD_OTHER, 4323 ind_levels, is_set_dest); 4324 if (code == REG) 4325 { 4326 register int regno = REGNO (recog_operand[i]); 4327 if (reg_equiv_constant[regno] != 0 && !is_set_dest) 4328 recog_operand[i] = *recog_operand_loc[i] 4329 = reg_equiv_constant[regno]; 4330#if 0 /* This might screw code in reload1.c to delete prior output-reload 4331 that feeds this insn. */ 4332 if (reg_equiv_mem[regno] != 0) 4333 recog_operand[i] = *recog_operand_loc[i] 4334 = reg_equiv_mem[regno]; 4335#endif 4336 } 4337 } 4338 4339 /* Perhaps an output reload can be combined with another 4340 to reduce needs by one. */ 4341 if (!goal_earlyclobber) 4342 combine_reloads (); 4343#endif /* no REGISTER_CONSTRAINTS */ 4344 return retval; 4345} 4346 4347/* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT 4348 accepts a memory operand with constant address. */ 4349 4350static int 4351alternative_allows_memconst (constraint, altnum) 4352 const char *constraint; 4353 int altnum; 4354{ 4355 register int c; 4356 /* Skip alternatives before the one requested. */ 4357 while (altnum > 0) 4358 { 4359 while (*constraint++ != ','); 4360 altnum--; 4361 } 4362 /* Scan the requested alternative for 'm' or 'o'. 4363 If one of them is present, this alternative accepts memory constants. */ 4364 while ((c = *constraint++) && c != ',' && c != '#') 4365 if (c == 'm' || c == 'o') 4366 return 1; 4367 return 0; 4368} 4369 4370/* Scan X for memory references and scan the addresses for reloading. 4371 Also checks for references to "constant" regs that we want to eliminate 4372 and replaces them with the values they stand for. 4373 We may alter X destructively if it contains a reference to such. 4374 If X is just a constant reg, we return the equivalent value 4375 instead of X. 4376 4377 IND_LEVELS says how many levels of indirect addressing this machine 4378 supports. 4379 4380 OPNUM and TYPE identify the purpose of the reload. 4381 4382 IS_SET_DEST is true if X is the destination of a SET, which is not 4383 appropriate to be replaced by a constant. 4384 4385 INSN, if nonzero, is the insn in which we do the reload. It is used 4386 to determine if we may generate output reloads, and where to put USEs 4387 for pseudos that we have to replace with stack slots. */ 4388 4389static rtx 4390find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest, insn) 4391 rtx x; 4392 int opnum; 4393 enum reload_type type; 4394 int ind_levels; 4395 int is_set_dest; 4396 rtx insn; 4397{ 4398 register RTX_CODE code = GET_CODE (x); 4399 4400 register char *fmt = GET_RTX_FORMAT (code); 4401 register int i; 4402 int copied; 4403 4404 if (code == REG) 4405 { 4406 /* This code is duplicated for speed in find_reloads. */ 4407 register int regno = REGNO (x); 4408 if (reg_equiv_constant[regno] != 0 && !is_set_dest) 4409 x = reg_equiv_constant[regno]; 4410#if 0 4411/* This creates (subreg (mem...)) which would cause an unnecessary 4412 reload of the mem. */ 4413 else if (reg_equiv_mem[regno] != 0) 4414 x = reg_equiv_mem[regno]; 4415#endif 4416 else if (reg_equiv_memory_loc[regno] 4417 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)) 4418 { 4419 rtx mem = make_memloc (x, regno); 4420 if (reg_equiv_address[regno] 4421 || ! rtx_equal_p (mem, reg_equiv_mem[regno])) 4422 { 4423 /* If this is not a toplevel operand, find_reloads doesn't see 4424 this substitution. We have to emit a USE of the pseudo so 4425 that delete_output_reload can see it. */ 4426 if (replace_reloads && recog_operand[opnum] != x) 4427 emit_insn_before (gen_rtx_USE (VOIDmode, x), insn); 4428 x = mem; 4429 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0), 4430 opnum, type, ind_levels, insn); 4431 } 4432 } 4433 return x; 4434 } 4435 if (code == MEM) 4436 { 4437 rtx tem = x; 4438 find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0), 4439 opnum, type, ind_levels, insn); 4440 return tem; 4441 } 4442 4443 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG) 4444 { 4445 /* Check for SUBREG containing a REG that's equivalent to a constant. 4446 If the constant has a known value, truncate it right now. 4447 Similarly if we are extracting a single-word of a multi-word 4448 constant. If the constant is symbolic, allow it to be substituted 4449 normally. push_reload will strip the subreg later. If the 4450 constant is VOIDmode, abort because we will lose the mode of 4451 the register (this should never happen because one of the cases 4452 above should handle it). */ 4453 4454 register int regno = REGNO (SUBREG_REG (x)); 4455 rtx tem; 4456 4457 if (subreg_lowpart_p (x) 4458 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 4459 && reg_equiv_constant[regno] != 0 4460 && (tem = gen_lowpart_common (GET_MODE (x), 4461 reg_equiv_constant[regno])) != 0) 4462 return tem; 4463 4464 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD 4465 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 4466 && reg_equiv_constant[regno] != 0 4467 && (tem = operand_subword (reg_equiv_constant[regno], 4468 SUBREG_WORD (x), 0, 4469 GET_MODE (SUBREG_REG (x)))) != 0) 4470 { 4471 /* TEM is now a word sized constant for the bits from X that 4472 we wanted. However, TEM may be the wrong representation. 4473 4474 Use gen_lowpart_common to convert a CONST_INT into a 4475 CONST_DOUBLE and vice versa as needed according to by the mode 4476 of the SUBREG. */ 4477 tem = gen_lowpart_common (GET_MODE (x), tem); 4478 if (!tem) 4479 abort (); 4480 return tem; 4481 } 4482 4483 /* If the SUBREG is wider than a word, the above test will fail. 4484 For example, we might have a SImode SUBREG of a DImode SUBREG_REG 4485 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for 4486 a 32 bit target. We still can - and have to - handle this 4487 for non-paradoxical subregs of CONST_INTs. */ 4488 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 4489 && reg_equiv_constant[regno] != 0 4490 && GET_CODE (reg_equiv_constant[regno]) == CONST_INT 4491 && (GET_MODE_SIZE (GET_MODE (x)) 4492 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))) 4493 { 4494 int shift = SUBREG_WORD (x) * BITS_PER_WORD; 4495 if (WORDS_BIG_ENDIAN) 4496 shift = (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x))) 4497 - GET_MODE_BITSIZE (GET_MODE (x)) 4498 - shift); 4499 /* Here we use the knowledge that CONST_INTs have a 4500 HOST_WIDE_INT field. */ 4501 if (shift >= HOST_BITS_PER_WIDE_INT) 4502 shift = HOST_BITS_PER_WIDE_INT - 1; 4503 return GEN_INT (INTVAL (reg_equiv_constant[regno]) >> shift); 4504 } 4505 4506 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 4507 && reg_equiv_constant[regno] != 0 4508 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode) 4509 abort (); 4510 4511 /* If the subreg contains a reg that will be converted to a mem, 4512 convert the subreg to a narrower memref now. 4513 Otherwise, we would get (subreg (mem ...) ...), 4514 which would force reload of the mem. 4515 4516 We also need to do this if there is an equivalent MEM that is 4517 not offsettable. In that case, alter_subreg would produce an 4518 invalid address on big-endian machines. 4519 4520 For machines that extend byte loads, we must not reload using 4521 a wider mode if we have a paradoxical SUBREG. find_reloads will 4522 force a reload in that case. So we should not do anything here. */ 4523 4524 else if (regno >= FIRST_PSEUDO_REGISTER 4525#ifdef LOAD_EXTEND_OP 4526 && (GET_MODE_SIZE (GET_MODE (x)) 4527 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))) 4528#endif 4529 && (reg_equiv_address[regno] != 0 4530 || (reg_equiv_mem[regno] != 0 4531 && (! strict_memory_address_p (GET_MODE (x), 4532 XEXP (reg_equiv_mem[regno], 0)) 4533 || ! offsettable_memref_p (reg_equiv_mem[regno]) 4534 || num_not_at_initial_offset)))) 4535 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels, 4536 insn); 4537 } 4538 4539 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 4540 { 4541 if (fmt[i] == 'e') 4542 { 4543 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type, 4544 ind_levels, is_set_dest, insn); 4545 /* If we have replaced a reg with it's equivalent memory loc - 4546 that can still be handled here e.g. if it's in a paradoxical 4547 subreg - we must make the change in a copy, rather than using 4548 a destructive change. This way, find_reloads can still elect 4549 not to do the change. */ 4550 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied) 4551 { 4552 x = shallow_copy_rtx (x); 4553 copied = 1; 4554 } 4555 XEXP (x, i) = new_part; 4556 } 4557 } 4558 return x; 4559} 4560 4561/* Return a mem ref for the memory equivalent of reg REGNO. 4562 This mem ref is not shared with anything. */ 4563 4564static rtx 4565make_memloc (ad, regno) 4566 rtx ad; 4567 int regno; 4568{ 4569 /* We must rerun eliminate_regs, in case the elimination 4570 offsets have changed. */ 4571 rtx tem 4572 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0); 4573 4574 /* If TEM might contain a pseudo, we must copy it to avoid 4575 modifying it when we do the substitution for the reload. */ 4576 if (rtx_varies_p (tem)) 4577 tem = copy_rtx (tem); 4578 4579 tem = gen_rtx_MEM (GET_MODE (ad), tem); 4580 RTX_UNCHANGING_P (tem) = RTX_UNCHANGING_P (regno_reg_rtx[regno]); 4581 return tem; 4582} 4583 4584/* Record all reloads needed for handling memory address AD 4585 which appears in *LOC in a memory reference to mode MODE 4586 which itself is found in location *MEMREFLOC. 4587 Note that we take shortcuts assuming that no multi-reg machine mode 4588 occurs as part of an address. 4589 4590 OPNUM and TYPE specify the purpose of this reload. 4591 4592 IND_LEVELS says how many levels of indirect addressing this machine 4593 supports. 4594 4595 INSN, if nonzero, is the insn in which we do the reload. It is used 4596 to determine if we may generate output reloads, and where to put USEs 4597 for pseudos that we have to replace with stack slots. 4598 4599 Value is nonzero if this address is reloaded or replaced as a whole. 4600 This is interesting to the caller if the address is an autoincrement. 4601 4602 Note that there is no verification that the address will be valid after 4603 this routine does its work. Instead, we rely on the fact that the address 4604 was valid when reload started. So we need only undo things that reload 4605 could have broken. These are wrong register types, pseudos not allocated 4606 to a hard register, and frame pointer elimination. */ 4607 4608static int 4609find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels, insn) 4610 enum machine_mode mode; 4611 rtx *memrefloc; 4612 rtx ad; 4613 rtx *loc; 4614 int opnum; 4615 enum reload_type type; 4616 int ind_levels; 4617 rtx insn; 4618{ 4619 register int regno; 4620 int removed_and = 0; 4621 rtx tem; 4622 4623 /* If the address is a register, see if it is a legitimate address and 4624 reload if not. We first handle the cases where we need not reload 4625 or where we must reload in a non-standard way. */ 4626 4627 if (GET_CODE (ad) == REG) 4628 { 4629 regno = REGNO (ad); 4630 4631 if (reg_equiv_constant[regno] != 0 4632 && strict_memory_address_p (mode, reg_equiv_constant[regno])) 4633 { 4634 *loc = ad = reg_equiv_constant[regno]; 4635 return 0; 4636 } 4637 4638 tem = reg_equiv_memory_loc[regno]; 4639 if (tem != 0) 4640 { 4641 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset) 4642 { 4643 tem = make_memloc (ad, regno); 4644 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0))) 4645 { 4646 find_reloads_address (GET_MODE (tem), NULL_PTR, XEXP (tem, 0), 4647 &XEXP (tem, 0), opnum, ADDR_TYPE (type), 4648 ind_levels, insn); 4649 } 4650 /* We can avoid a reload if the register's equivalent memory 4651 expression is valid as an indirect memory address. 4652 But not all addresses are valid in a mem used as an indirect 4653 address: only reg or reg+constant. */ 4654 4655 if (ind_levels > 0 4656 && strict_memory_address_p (mode, tem) 4657 && (GET_CODE (XEXP (tem, 0)) == REG 4658 || (GET_CODE (XEXP (tem, 0)) == PLUS 4659 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG 4660 && CONSTANT_P (XEXP (XEXP (tem, 0), 1))))) 4661 { 4662 /* TEM is not the same as what we'll be replacing the 4663 pseudo with after reload, put a USE in front of INSN 4664 in the final reload pass. */ 4665 if (replace_reloads 4666 && num_not_at_initial_offset 4667 && ! rtx_equal_p (tem, reg_equiv_mem[regno])) 4668 { 4669 *loc = tem; 4670 emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn); 4671 /* This doesn't really count as replacing the address 4672 as a whole, since it is still a memory access. */ 4673 } 4674 return 0; 4675 } 4676 ad = tem; 4677 } 4678 } 4679 4680 /* The only remaining case where we can avoid a reload is if this is a 4681 hard register that is valid as a base register and which is not the 4682 subject of a CLOBBER in this insn. */ 4683 4684 else if (regno < FIRST_PSEUDO_REGISTER 4685 && REGNO_MODE_OK_FOR_BASE_P (regno, mode) 4686 && ! regno_clobbered_p (regno, this_insn, GET_MODE (ad), 0)) 4687 return 0; 4688 4689 /* If we do not have one of the cases above, we must do the reload. */ 4690 push_reload (ad, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS, 4691 GET_MODE (ad), VOIDmode, 0, 0, opnum, type); 4692 return 1; 4693 } 4694 4695 if (strict_memory_address_p (mode, ad)) 4696 { 4697 /* The address appears valid, so reloads are not needed. 4698 But the address may contain an eliminable register. 4699 This can happen because a machine with indirect addressing 4700 may consider a pseudo register by itself a valid address even when 4701 it has failed to get a hard reg. 4702 So do a tree-walk to find and eliminate all such regs. */ 4703 4704 /* But first quickly dispose of a common case. */ 4705 if (GET_CODE (ad) == PLUS 4706 && GET_CODE (XEXP (ad, 1)) == CONST_INT 4707 && GET_CODE (XEXP (ad, 0)) == REG 4708 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0) 4709 return 0; 4710 4711 subst_reg_equivs_changed = 0; 4712 *loc = subst_reg_equivs (ad, insn); 4713 4714 if (! subst_reg_equivs_changed) 4715 return 0; 4716 4717 /* Check result for validity after substitution. */ 4718 if (strict_memory_address_p (mode, ad)) 4719 return 0; 4720 } 4721 4722#ifdef LEGITIMIZE_RELOAD_ADDRESS 4723 do 4724 { 4725 if (memrefloc) 4726 { 4727 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type, 4728 ind_levels, win); 4729 } 4730 break; 4731 win: 4732 *memrefloc = copy_rtx (*memrefloc); 4733 XEXP (*memrefloc, 0) = ad; 4734 move_replacements (&ad, &XEXP (*memrefloc, 0)); 4735 return 1; 4736 } 4737 while (0); 4738#endif 4739 4740 /* The address is not valid. We have to figure out why. First see if 4741 we have an outer AND and remove it if so. Then analyze what's inside. */ 4742 4743 if (GET_CODE (ad) == AND) 4744 { 4745 removed_and = 1; 4746 loc = &XEXP (ad, 0); 4747 ad = *loc; 4748 } 4749 4750 /* One possibility for why the address is invalid is that it is itself 4751 a MEM. This can happen when the frame pointer is being eliminated, a 4752 pseudo is not allocated to a hard register, and the offset between the 4753 frame and stack pointers is not its initial value. In that case the 4754 pseudo will have been replaced by a MEM referring to the 4755 stack pointer. */ 4756 if (GET_CODE (ad) == MEM) 4757 { 4758 /* First ensure that the address in this MEM is valid. Then, unless 4759 indirect addresses are valid, reload the MEM into a register. */ 4760 tem = ad; 4761 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0), 4762 opnum, ADDR_TYPE (type), 4763 ind_levels == 0 ? 0 : ind_levels - 1, insn); 4764 4765 /* If tem was changed, then we must create a new memory reference to 4766 hold it and store it back into memrefloc. */ 4767 if (tem != ad && memrefloc) 4768 { 4769 *memrefloc = copy_rtx (*memrefloc); 4770 copy_replacements (tem, XEXP (*memrefloc, 0)); 4771 loc = &XEXP (*memrefloc, 0); 4772 if (removed_and) 4773 loc = &XEXP (*loc, 0); 4774 } 4775 4776 /* Check similar cases as for indirect addresses as above except 4777 that we can allow pseudos and a MEM since they should have been 4778 taken care of above. */ 4779 4780 if (ind_levels == 0 4781 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok) 4782 || GET_CODE (XEXP (tem, 0)) == MEM 4783 || ! (GET_CODE (XEXP (tem, 0)) == REG 4784 || (GET_CODE (XEXP (tem, 0)) == PLUS 4785 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG 4786 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT))) 4787 { 4788 /* Must use TEM here, not AD, since it is the one that will 4789 have any subexpressions reloaded, if needed. */ 4790 push_reload (tem, NULL_RTX, loc, NULL_PTR, 4791 BASE_REG_CLASS, GET_MODE (tem), 4792 VOIDmode, 0, 4793 0, opnum, type); 4794 return ! removed_and; 4795 } 4796 else 4797 return 0; 4798 } 4799 4800 /* If we have address of a stack slot but it's not valid because the 4801 displacement is too large, compute the sum in a register. 4802 Handle all base registers here, not just fp/ap/sp, because on some 4803 targets (namely SH) we can also get too large displacements from 4804 big-endian corrections. */ 4805 else if (GET_CODE (ad) == PLUS 4806 && GET_CODE (XEXP (ad, 0)) == REG 4807 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER 4808 && REG_MODE_OK_FOR_BASE_P (XEXP (ad, 0), mode) 4809 && GET_CODE (XEXP (ad, 1)) == CONST_INT) 4810 { 4811 /* Unshare the MEM rtx so we can safely alter it. */ 4812 if (memrefloc) 4813 { 4814 *memrefloc = copy_rtx (*memrefloc); 4815 loc = &XEXP (*memrefloc, 0); 4816 if (removed_and) 4817 loc = &XEXP (*loc, 0); 4818 } 4819 4820 if (double_reg_address_ok) 4821 { 4822 /* Unshare the sum as well. */ 4823 *loc = ad = copy_rtx (ad); 4824 4825 /* Reload the displacement into an index reg. 4826 We assume the frame pointer or arg pointer is a base reg. */ 4827 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1), 4828 INDEX_REG_CLASS, GET_MODE (ad), opnum, 4829 type, ind_levels); 4830 return 0; 4831 } 4832 else 4833 { 4834 /* If the sum of two regs is not necessarily valid, 4835 reload the sum into a base reg. 4836 That will at least work. */ 4837 find_reloads_address_part (ad, loc, BASE_REG_CLASS, 4838 Pmode, opnum, type, ind_levels); 4839 } 4840 return ! removed_and; 4841 } 4842 4843 /* If we have an indexed stack slot, there are three possible reasons why 4844 it might be invalid: The index might need to be reloaded, the address 4845 might have been made by frame pointer elimination and hence have a 4846 constant out of range, or both reasons might apply. 4847 4848 We can easily check for an index needing reload, but even if that is the 4849 case, we might also have an invalid constant. To avoid making the 4850 conservative assumption and requiring two reloads, we see if this address 4851 is valid when not interpreted strictly. If it is, the only problem is 4852 that the index needs a reload and find_reloads_address_1 will take care 4853 of it. 4854 4855 There is still a case when we might generate an extra reload, 4856 however. In certain cases eliminate_regs will return a MEM for a REG 4857 (see the code there for details). In those cases, memory_address_p 4858 applied to our address will return 0 so we will think that our offset 4859 must be too large. But it might indeed be valid and the only problem 4860 is that a MEM is present where a REG should be. This case should be 4861 very rare and there doesn't seem to be any way to avoid it. 4862 4863 If we decide to do something here, it must be that 4864 `double_reg_address_ok' is true and that this address rtl was made by 4865 eliminate_regs. We generate a reload of the fp/sp/ap + constant and 4866 rework the sum so that the reload register will be added to the index. 4867 This is safe because we know the address isn't shared. 4868 4869 We check for fp/ap/sp as both the first and second operand of the 4870 innermost PLUS. */ 4871 4872 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT 4873 && GET_CODE (XEXP (ad, 0)) == PLUS 4874 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx 4875#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM 4876 || XEXP (XEXP (ad, 0), 0) == hard_frame_pointer_rtx 4877#endif 4878#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM 4879 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx 4880#endif 4881 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx) 4882 && ! memory_address_p (mode, ad)) 4883 { 4884 *loc = ad = gen_rtx_PLUS (GET_MODE (ad), 4885 plus_constant (XEXP (XEXP (ad, 0), 0), 4886 INTVAL (XEXP (ad, 1))), 4887 XEXP (XEXP (ad, 0), 1)); 4888 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS, 4889 GET_MODE (ad), opnum, type, ind_levels); 4890 find_reloads_address_1 (mode, XEXP (ad, 1), 1, &XEXP (ad, 1), opnum, 4891 type, 0, insn); 4892 4893 return 0; 4894 } 4895 4896 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT 4897 && GET_CODE (XEXP (ad, 0)) == PLUS 4898 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx 4899#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM 4900 || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx 4901#endif 4902#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM 4903 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx 4904#endif 4905 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx) 4906 && ! memory_address_p (mode, ad)) 4907 { 4908 *loc = ad = gen_rtx_PLUS (GET_MODE (ad), 4909 XEXP (XEXP (ad, 0), 0), 4910 plus_constant (XEXP (XEXP (ad, 0), 1), 4911 INTVAL (XEXP (ad, 1)))); 4912 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1), BASE_REG_CLASS, 4913 GET_MODE (ad), opnum, type, ind_levels); 4914 find_reloads_address_1 (mode, XEXP (ad, 0), 1, &XEXP (ad, 0), opnum, 4915 type, 0, insn); 4916 4917 return 0; 4918 } 4919 4920 /* See if address becomes valid when an eliminable register 4921 in a sum is replaced. */ 4922 4923 tem = ad; 4924 if (GET_CODE (ad) == PLUS) 4925 tem = subst_indexed_address (ad); 4926 if (tem != ad && strict_memory_address_p (mode, tem)) 4927 { 4928 /* Ok, we win that way. Replace any additional eliminable 4929 registers. */ 4930 4931 subst_reg_equivs_changed = 0; 4932 tem = subst_reg_equivs (tem, insn); 4933 4934 /* Make sure that didn't make the address invalid again. */ 4935 4936 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem)) 4937 { 4938 *loc = tem; 4939 return 0; 4940 } 4941 } 4942 4943 /* If constants aren't valid addresses, reload the constant address 4944 into a register. */ 4945 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad)) 4946 { 4947 /* If AD is in address in the constant pool, the MEM rtx may be shared. 4948 Unshare it so we can safely alter it. */ 4949 if (memrefloc && GET_CODE (ad) == SYMBOL_REF 4950 && CONSTANT_POOL_ADDRESS_P (ad)) 4951 { 4952 *memrefloc = copy_rtx (*memrefloc); 4953 loc = &XEXP (*memrefloc, 0); 4954 if (removed_and) 4955 loc = &XEXP (*loc, 0); 4956 } 4957 4958 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode, opnum, type, 4959 ind_levels); 4960 return ! removed_and; 4961 } 4962 4963 return find_reloads_address_1 (mode, ad, 0, loc, opnum, type, ind_levels, 4964 insn); 4965} 4966 4967/* Find all pseudo regs appearing in AD 4968 that are eliminable in favor of equivalent values 4969 and do not have hard regs; replace them by their equivalents. 4970 INSN, if nonzero, is the insn in which we do the reload. We put USEs in 4971 front of it for pseudos that we have to replace with stack slots. */ 4972 4973static rtx 4974subst_reg_equivs (ad, insn) 4975 rtx ad; 4976 rtx insn; 4977{ 4978 register RTX_CODE code = GET_CODE (ad); 4979 register int i; 4980 register char *fmt; 4981 4982 switch (code) 4983 { 4984 case HIGH: 4985 case CONST_INT: 4986 case CONST: 4987 case CONST_DOUBLE: 4988 case SYMBOL_REF: 4989 case LABEL_REF: 4990 case PC: 4991 case CC0: 4992 return ad; 4993 4994 case REG: 4995 { 4996 register int regno = REGNO (ad); 4997 4998 if (reg_equiv_constant[regno] != 0) 4999 { 5000 subst_reg_equivs_changed = 1; 5001 return reg_equiv_constant[regno]; 5002 } 5003 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset) 5004 { 5005 rtx mem = make_memloc (ad, regno); 5006 if (! rtx_equal_p (mem, reg_equiv_mem[regno])) 5007 { 5008 subst_reg_equivs_changed = 1; 5009 emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn); 5010 return mem; 5011 } 5012 } 5013 } 5014 return ad; 5015 5016 case PLUS: 5017 /* Quickly dispose of a common case. */ 5018 if (XEXP (ad, 0) == frame_pointer_rtx 5019 && GET_CODE (XEXP (ad, 1)) == CONST_INT) 5020 return ad; 5021 break; 5022 5023 default: 5024 break; 5025 } 5026 5027 fmt = GET_RTX_FORMAT (code); 5028 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 5029 if (fmt[i] == 'e') 5030 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn); 5031 return ad; 5032} 5033 5034/* Compute the sum of X and Y, making canonicalizations assumed in an 5035 address, namely: sum constant integers, surround the sum of two 5036 constants with a CONST, put the constant as the second operand, and 5037 group the constant on the outermost sum. 5038 5039 This routine assumes both inputs are already in canonical form. */ 5040 5041rtx 5042form_sum (x, y) 5043 rtx x, y; 5044{ 5045 rtx tem; 5046 enum machine_mode mode = GET_MODE (x); 5047 5048 if (mode == VOIDmode) 5049 mode = GET_MODE (y); 5050 5051 if (mode == VOIDmode) 5052 mode = Pmode; 5053 5054 if (GET_CODE (x) == CONST_INT) 5055 return plus_constant (y, INTVAL (x)); 5056 else if (GET_CODE (y) == CONST_INT) 5057 return plus_constant (x, INTVAL (y)); 5058 else if (CONSTANT_P (x)) 5059 tem = x, x = y, y = tem; 5060 5061 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1))) 5062 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y)); 5063 5064 /* Note that if the operands of Y are specified in the opposite 5065 order in the recursive calls below, infinite recursion will occur. */ 5066 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1))) 5067 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1)); 5068 5069 /* If both constant, encapsulate sum. Otherwise, just form sum. A 5070 constant will have been placed second. */ 5071 if (CONSTANT_P (x) && CONSTANT_P (y)) 5072 { 5073 if (GET_CODE (x) == CONST) 5074 x = XEXP (x, 0); 5075 if (GET_CODE (y) == CONST) 5076 y = XEXP (y, 0); 5077 5078 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y)); 5079 } 5080 5081 return gen_rtx_PLUS (mode, x, y); 5082} 5083 5084/* If ADDR is a sum containing a pseudo register that should be 5085 replaced with a constant (from reg_equiv_constant), 5086 return the result of doing so, and also apply the associative 5087 law so that the result is more likely to be a valid address. 5088 (But it is not guaranteed to be one.) 5089 5090 Note that at most one register is replaced, even if more are 5091 replaceable. Also, we try to put the result into a canonical form 5092 so it is more likely to be a valid address. 5093 5094 In all other cases, return ADDR. */ 5095 5096static rtx 5097subst_indexed_address (addr) 5098 rtx addr; 5099{ 5100 rtx op0 = 0, op1 = 0, op2 = 0; 5101 rtx tem; 5102 int regno; 5103 5104 if (GET_CODE (addr) == PLUS) 5105 { 5106 /* Try to find a register to replace. */ 5107 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0; 5108 if (GET_CODE (op0) == REG 5109 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER 5110 && reg_renumber[regno] < 0 5111 && reg_equiv_constant[regno] != 0) 5112 op0 = reg_equiv_constant[regno]; 5113 else if (GET_CODE (op1) == REG 5114 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER 5115 && reg_renumber[regno] < 0 5116 && reg_equiv_constant[regno] != 0) 5117 op1 = reg_equiv_constant[regno]; 5118 else if (GET_CODE (op0) == PLUS 5119 && (tem = subst_indexed_address (op0)) != op0) 5120 op0 = tem; 5121 else if (GET_CODE (op1) == PLUS 5122 && (tem = subst_indexed_address (op1)) != op1) 5123 op1 = tem; 5124 else 5125 return addr; 5126 5127 /* Pick out up to three things to add. */ 5128 if (GET_CODE (op1) == PLUS) 5129 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0); 5130 else if (GET_CODE (op0) == PLUS) 5131 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0); 5132 5133 /* Compute the sum. */ 5134 if (op2 != 0) 5135 op1 = form_sum (op1, op2); 5136 if (op1 != 0) 5137 op0 = form_sum (op0, op1); 5138 5139 return op0; 5140 } 5141 return addr; 5142} 5143 5144/* Record the pseudo registers we must reload into hard registers in a 5145 subexpression of a would-be memory address, X referring to a value 5146 in mode MODE. (This function is not called if the address we find 5147 is strictly valid.) 5148 5149 CONTEXT = 1 means we are considering regs as index regs, 5150 = 0 means we are considering them as base regs. 5151 5152 OPNUM and TYPE specify the purpose of any reloads made. 5153 5154 IND_LEVELS says how many levels of indirect addressing are 5155 supported at this point in the address. 5156 5157 INSN, if nonzero, is the insn in which we do the reload. It is used 5158 to determine if we may generate output reloads. 5159 5160 We return nonzero if X, as a whole, is reloaded or replaced. */ 5161 5162/* Note that we take shortcuts assuming that no multi-reg machine mode 5163 occurs as part of an address. 5164 Also, this is not fully machine-customizable; it works for machines 5165 such as vaxes and 68000's and 32000's, but other possible machines 5166 could have addressing modes that this does not handle right. */ 5167 5168static int 5169find_reloads_address_1 (mode, x, context, loc, opnum, type, ind_levels, insn) 5170 enum machine_mode mode; 5171 rtx x; 5172 int context; 5173 rtx *loc; 5174 int opnum; 5175 enum reload_type type; 5176 int ind_levels; 5177 rtx insn; 5178{ 5179 register RTX_CODE code = GET_CODE (x); 5180 5181 switch (code) 5182 { 5183 case PLUS: 5184 { 5185 register rtx orig_op0 = XEXP (x, 0); 5186 register rtx orig_op1 = XEXP (x, 1); 5187 register RTX_CODE code0 = GET_CODE (orig_op0); 5188 register RTX_CODE code1 = GET_CODE (orig_op1); 5189 register rtx op0 = orig_op0; 5190 register rtx op1 = orig_op1; 5191 5192 if (GET_CODE (op0) == SUBREG) 5193 { 5194 op0 = SUBREG_REG (op0); 5195 code0 = GET_CODE (op0); 5196 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER) 5197 op0 = gen_rtx_REG (word_mode, 5198 REGNO (op0) + SUBREG_WORD (orig_op0)); 5199 } 5200 5201 if (GET_CODE (op1) == SUBREG) 5202 { 5203 op1 = SUBREG_REG (op1); 5204 code1 = GET_CODE (op1); 5205 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER) 5206 op1 = gen_rtx_REG (GET_MODE (op1), 5207 REGNO (op1) + SUBREG_WORD (orig_op1)); 5208 } 5209 5210 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE 5211 || code0 == ZERO_EXTEND || code1 == MEM) 5212 { 5213 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum, 5214 type, ind_levels, insn); 5215 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum, 5216 type, ind_levels, insn); 5217 } 5218 5219 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE 5220 || code1 == ZERO_EXTEND || code0 == MEM) 5221 { 5222 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum, 5223 type, ind_levels, insn); 5224 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum, 5225 type, ind_levels, insn); 5226 } 5227 5228 else if (code0 == CONST_INT || code0 == CONST 5229 || code0 == SYMBOL_REF || code0 == LABEL_REF) 5230 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum, 5231 type, ind_levels, insn); 5232 5233 else if (code1 == CONST_INT || code1 == CONST 5234 || code1 == SYMBOL_REF || code1 == LABEL_REF) 5235 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum, 5236 type, ind_levels, insn); 5237 5238 else if (code0 == REG && code1 == REG) 5239 { 5240 if (REG_OK_FOR_INDEX_P (op0) 5241 && REG_MODE_OK_FOR_BASE_P (op1, mode)) 5242 return 0; 5243 else if (REG_OK_FOR_INDEX_P (op1) 5244 && REG_MODE_OK_FOR_BASE_P (op0, mode)) 5245 return 0; 5246 else if (REG_MODE_OK_FOR_BASE_P (op1, mode)) 5247 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum, 5248 type, ind_levels, insn); 5249 else if (REG_MODE_OK_FOR_BASE_P (op0, mode)) 5250 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum, 5251 type, ind_levels, insn); 5252 else if (REG_OK_FOR_INDEX_P (op1)) 5253 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum, 5254 type, ind_levels, insn); 5255 else if (REG_OK_FOR_INDEX_P (op0)) 5256 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum, 5257 type, ind_levels, insn); 5258 else 5259 { 5260 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum, 5261 type, ind_levels, insn); 5262 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum, 5263 type, ind_levels, insn); 5264 } 5265 } 5266 5267 else if (code0 == REG) 5268 { 5269 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum, 5270 type, ind_levels, insn); 5271 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum, 5272 type, ind_levels, insn); 5273 } 5274 5275 else if (code1 == REG) 5276 { 5277 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum, 5278 type, ind_levels, insn); 5279 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum, 5280 type, ind_levels, insn); 5281 } 5282 } 5283 5284 return 0; 5285 5286 case POST_INC: 5287 case POST_DEC: 5288 case PRE_INC: 5289 case PRE_DEC: 5290 if (GET_CODE (XEXP (x, 0)) == REG) 5291 { 5292 register int regno = REGNO (XEXP (x, 0)); 5293 int value = 0; 5294 rtx x_orig = x; 5295 5296 /* A register that is incremented cannot be constant! */ 5297 if (regno >= FIRST_PSEUDO_REGISTER 5298 && reg_equiv_constant[regno] != 0) 5299 abort (); 5300 5301 /* Handle a register that is equivalent to a memory location 5302 which cannot be addressed directly. */ 5303 if (reg_equiv_memory_loc[regno] != 0 5304 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)) 5305 { 5306 rtx tem = make_memloc (XEXP (x, 0), regno); 5307 if (reg_equiv_address[regno] 5308 || ! rtx_equal_p (tem, reg_equiv_mem[regno])) 5309 { 5310 /* First reload the memory location's address. 5311 We can't use ADDR_TYPE (type) here, because we need to 5312 write back the value after reading it, hence we actually 5313 need two registers. */ 5314 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0), 5315 &XEXP (tem, 0), opnum, type, 5316 ind_levels, insn); 5317 /* Put this inside a new increment-expression. */ 5318 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem); 5319 /* Proceed to reload that, as if it contained a register. */ 5320 } 5321 } 5322 5323 /* If we have a hard register that is ok as an index, 5324 don't make a reload. If an autoincrement of a nice register 5325 isn't "valid", it must be that no autoincrement is "valid". 5326 If that is true and something made an autoincrement anyway, 5327 this must be a special context where one is allowed. 5328 (For example, a "push" instruction.) 5329 We can't improve this address, so leave it alone. */ 5330 5331 /* Otherwise, reload the autoincrement into a suitable hard reg 5332 and record how much to increment by. */ 5333 5334 if (reg_renumber[regno] >= 0) 5335 regno = reg_renumber[regno]; 5336 if ((regno >= FIRST_PSEUDO_REGISTER 5337 || !(context ? REGNO_OK_FOR_INDEX_P (regno) 5338 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))) 5339 { 5340#ifdef AUTO_INC_DEC 5341 register rtx link; 5342#endif 5343 int reloadnum; 5344 5345 /* If we can output the register afterwards, do so, this 5346 saves the extra update. 5347 We can do so if we have an INSN - i.e. no JUMP_INSN nor 5348 CALL_INSN - and it does not set CC0. 5349 But don't do this if we cannot directly address the 5350 memory location, since this will make it harder to 5351 reuse address reloads, and increases register pressure. 5352 Also don't do this if we can probably update x directly. */ 5353 rtx equiv = (GET_CODE (XEXP (x, 0)) == MEM 5354 ? XEXP (x, 0) 5355 : reg_equiv_mem[regno]); 5356 int icode = (int) add_optab->handlers[(int) Pmode].insn_code; 5357 if (insn && GET_CODE (insn) == INSN && equiv 5358 && memory_operand (equiv, GET_MODE (equiv)) 5359#ifdef HAVE_cc0 5360 && ! sets_cc0_p (PATTERN (insn)) 5361#endif 5362 && ! (icode != CODE_FOR_nothing 5363 && (*insn_operand_predicate[icode][0]) (equiv, Pmode) 5364 && (*insn_operand_predicate[icode][1]) (equiv, Pmode))) 5365 { 5366 /* We use the original pseudo for loc, so that 5367 emit_reload_insns() knows which pseudo this 5368 reload refers to and updates the pseudo rtx, not 5369 its equivalent memory location, as well as the 5370 corresponding entry in reg_last_reload_reg. */ 5371 loc = &XEXP (x_orig, 0); 5372 x = XEXP (x, 0); 5373 reloadnum 5374 = push_reload (x, x, loc, loc, 5375 (context ? INDEX_REG_CLASS : BASE_REG_CLASS), 5376 GET_MODE (x), GET_MODE (x), 0, 0, 5377 opnum, RELOAD_OTHER); 5378 5379 } 5380 else 5381 { 5382 reloadnum 5383 = push_reload (x, NULL_RTX, loc, NULL_PTR, 5384 (context ? INDEX_REG_CLASS : BASE_REG_CLASS), 5385 GET_MODE (x), GET_MODE (x), 0, 0, 5386 opnum, type); 5387 reload_inc[reloadnum] 5388 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0)); 5389 5390 value = 1; 5391 } 5392 5393#ifdef AUTO_INC_DEC 5394 /* Update the REG_INC notes. */ 5395 5396 for (link = REG_NOTES (this_insn); 5397 link; link = XEXP (link, 1)) 5398 if (REG_NOTE_KIND (link) == REG_INC 5399 && REGNO (XEXP (link, 0)) == REGNO (XEXP (x_orig, 0))) 5400 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode); 5401#endif 5402 } 5403 return value; 5404 } 5405 5406 else if (GET_CODE (XEXP (x, 0)) == MEM) 5407 { 5408 /* This is probably the result of a substitution, by eliminate_regs, 5409 of an equivalent address for a pseudo that was not allocated to a 5410 hard register. Verify that the specified address is valid and 5411 reload it into a register. */ 5412 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */ 5413 rtx tem ATTRIBUTE_UNUSED = XEXP (x, 0); 5414 register rtx link; 5415 int reloadnum; 5416 5417 /* Since we know we are going to reload this item, don't decrement 5418 for the indirection level. 5419 5420 Note that this is actually conservative: it would be slightly 5421 more efficient to use the value of SPILL_INDIRECT_LEVELS from 5422 reload1.c here. */ 5423 /* We can't use ADDR_TYPE (type) here, because we need to 5424 write back the value after reading it, hence we actually 5425 need two registers. */ 5426 find_reloads_address (GET_MODE (x), &XEXP (x, 0), 5427 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0), 5428 opnum, type, ind_levels, insn); 5429 5430 reloadnum = push_reload (x, NULL_RTX, loc, NULL_PTR, 5431 (context ? INDEX_REG_CLASS : BASE_REG_CLASS), 5432 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5433 reload_inc[reloadnum] 5434 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0)); 5435 5436 link = FIND_REG_INC_NOTE (this_insn, tem); 5437 if (link != 0) 5438 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode); 5439 5440 return 1; 5441 } 5442 return 0; 5443 5444 case MEM: 5445 /* This is probably the result of a substitution, by eliminate_regs, of 5446 an equivalent address for a pseudo that was not allocated to a hard 5447 register. Verify that the specified address is valid and reload it 5448 into a register. 5449 5450 Since we know we are going to reload this item, don't decrement for 5451 the indirection level. 5452 5453 Note that this is actually conservative: it would be slightly more 5454 efficient to use the value of SPILL_INDIRECT_LEVELS from 5455 reload1.c here. */ 5456 5457 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0), 5458 opnum, ADDR_TYPE (type), ind_levels, insn); 5459 push_reload (*loc, NULL_RTX, loc, NULL_PTR, 5460 (context ? INDEX_REG_CLASS : BASE_REG_CLASS), 5461 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5462 return 1; 5463 5464 case REG: 5465 { 5466 register int regno = REGNO (x); 5467 5468 if (reg_equiv_constant[regno] != 0) 5469 { 5470 find_reloads_address_part (reg_equiv_constant[regno], loc, 5471 (context ? INDEX_REG_CLASS : BASE_REG_CLASS), 5472 GET_MODE (x), opnum, type, ind_levels); 5473 return 1; 5474 } 5475 5476#if 0 /* This might screw code in reload1.c to delete prior output-reload 5477 that feeds this insn. */ 5478 if (reg_equiv_mem[regno] != 0) 5479 { 5480 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, NULL_PTR, 5481 (context ? INDEX_REG_CLASS : BASE_REG_CLASS), 5482 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5483 return 1; 5484 } 5485#endif 5486 5487 if (reg_equiv_memory_loc[regno] 5488 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)) 5489 { 5490 rtx tem = make_memloc (x, regno); 5491 if (reg_equiv_address[regno] != 0 5492 || ! rtx_equal_p (tem, reg_equiv_mem[regno])) 5493 { 5494 x = tem; 5495 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), 5496 &XEXP (x, 0), opnum, ADDR_TYPE (type), 5497 ind_levels, insn); 5498 } 5499 } 5500 5501 if (reg_renumber[regno] >= 0) 5502 regno = reg_renumber[regno]; 5503 5504 if ((regno >= FIRST_PSEUDO_REGISTER 5505 || !(context ? REGNO_OK_FOR_INDEX_P (regno) 5506 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))) 5507 { 5508 push_reload (x, NULL_RTX, loc, NULL_PTR, 5509 (context ? INDEX_REG_CLASS : BASE_REG_CLASS), 5510 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5511 return 1; 5512 } 5513 5514 /* If a register appearing in an address is the subject of a CLOBBER 5515 in this insn, reload it into some other register to be safe. 5516 The CLOBBER is supposed to make the register unavailable 5517 from before this insn to after it. */ 5518 if (regno_clobbered_p (regno, this_insn, GET_MODE (x), 0)) 5519 { 5520 push_reload (x, NULL_RTX, loc, NULL_PTR, 5521 (context ? INDEX_REG_CLASS : BASE_REG_CLASS), 5522 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5523 return 1; 5524 } 5525 } 5526 return 0; 5527 5528 case SUBREG: 5529 if (GET_CODE (SUBREG_REG (x)) == REG) 5530 { 5531 /* If this is a SUBREG of a hard register and the resulting register 5532 is of the wrong class, reload the whole SUBREG. This avoids 5533 needless copies if SUBREG_REG is multi-word. */ 5534 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER) 5535 { 5536 int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x); 5537 5538 if (! (context ? REGNO_OK_FOR_INDEX_P (regno) 5539 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))) 5540 { 5541 push_reload (x, NULL_RTX, loc, NULL_PTR, 5542 (context ? INDEX_REG_CLASS : BASE_REG_CLASS), 5543 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5544 return 1; 5545 } 5546 } 5547 /* If this is a SUBREG of a pseudo-register, and the pseudo-register 5548 is larger than the class size, then reload the whole SUBREG. */ 5549 else 5550 { 5551 enum reg_class class = (context ? INDEX_REG_CLASS 5552 : BASE_REG_CLASS); 5553 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x))) 5554 > reg_class_size[class]) 5555 { 5556 x = find_reloads_subreg_address (x, 0, opnum, type, 5557 ind_levels, insn); 5558 push_reload (x, NULL_RTX, loc, NULL_PTR, class, 5559 GET_MODE (x), VOIDmode, 0, 0, opnum, type); 5560 return 1; 5561 } 5562 } 5563 } 5564 break; 5565 5566 default: 5567 break; 5568 } 5569 5570 { 5571 register char *fmt = GET_RTX_FORMAT (code); 5572 register int i; 5573 5574 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 5575 { 5576 if (fmt[i] == 'e') 5577 find_reloads_address_1 (mode, XEXP (x, i), context, &XEXP (x, i), 5578 opnum, type, ind_levels, insn); 5579 } 5580 } 5581 5582 return 0; 5583} 5584 5585/* X, which is found at *LOC, is a part of an address that needs to be 5586 reloaded into a register of class CLASS. If X is a constant, or if 5587 X is a PLUS that contains a constant, check that the constant is a 5588 legitimate operand and that we are supposed to be able to load 5589 it into the register. 5590 5591 If not, force the constant into memory and reload the MEM instead. 5592 5593 MODE is the mode to use, in case X is an integer constant. 5594 5595 OPNUM and TYPE describe the purpose of any reloads made. 5596 5597 IND_LEVELS says how many levels of indirect addressing this machine 5598 supports. */ 5599 5600static void 5601find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels) 5602 rtx x; 5603 rtx *loc; 5604 enum reg_class class; 5605 enum machine_mode mode; 5606 int opnum; 5607 enum reload_type type; 5608 int ind_levels; 5609{ 5610 if (CONSTANT_P (x) 5611 && (! LEGITIMATE_CONSTANT_P (x) 5612 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS)) 5613 { 5614 rtx tem; 5615 5616 /* If this is a CONST_INT, it could have been created by a 5617 plus_constant call in eliminate_regs, which means it may be 5618 on the reload_obstack. reload_obstack will be freed later, so 5619 we can't allow such RTL to be put in the constant pool. There 5620 is code in force_const_mem to check for this case, but it doesn't 5621 work because we have already popped off the reload_obstack, so 5622 rtl_obstack == saveable_obstack is true at this point. */ 5623 if (GET_CODE (x) == CONST_INT) 5624 tem = x = force_const_mem (mode, GEN_INT (INTVAL (x))); 5625 else 5626 tem = x = force_const_mem (mode, x); 5627 5628 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0), 5629 opnum, type, ind_levels, 0); 5630 } 5631 5632 else if (GET_CODE (x) == PLUS 5633 && CONSTANT_P (XEXP (x, 1)) 5634 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1)) 5635 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS)) 5636 { 5637 rtx tem; 5638 5639 /* See comment above. */ 5640 if (GET_CODE (XEXP (x, 1)) == CONST_INT) 5641 tem = force_const_mem (GET_MODE (x), GEN_INT (INTVAL (XEXP (x, 1)))); 5642 else 5643 tem = force_const_mem (GET_MODE (x), XEXP (x, 1)); 5644 5645 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem); 5646 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0), 5647 opnum, type, ind_levels, 0); 5648 } 5649 5650 push_reload (x, NULL_RTX, loc, NULL_PTR, class, 5651 mode, VOIDmode, 0, 0, opnum, type); 5652} 5653 5654/* X, a subreg of a pseudo, is a part of an address that needs to be 5655 reloaded. 5656 5657 If the pseudo is equivalent to a memory location that cannot be directly 5658 addressed, make the necessary address reloads. 5659 5660 If address reloads have been necessary, or if the address is changed 5661 by register elimination, return the rtx of the memory location; 5662 otherwise, return X. 5663 5664 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the 5665 memory location. 5666 5667 OPNUM and TYPE identify the purpose of the reload. 5668 5669 IND_LEVELS says how many levels of indirect addressing are 5670 supported at this point in the address. 5671 5672 INSN, if nonzero, is the insn in which we do the reload. It is used 5673 to determine where to put USEs for pseudos that we have to replace with 5674 stack slots. */ 5675 5676static rtx 5677find_reloads_subreg_address (x, force_replace, opnum, type, 5678 ind_levels, insn) 5679 rtx x; 5680 int force_replace; 5681 int opnum; 5682 enum reload_type type; 5683 int ind_levels; 5684 rtx insn; 5685{ 5686 int regno = REGNO (SUBREG_REG (x)); 5687 5688 if (reg_equiv_memory_loc[regno]) 5689 { 5690 /* If the address is not directly addressable, or if the address is not 5691 offsettable, then it must be replaced. */ 5692 if (! force_replace 5693 && (reg_equiv_address[regno] 5694 || ! offsettable_memref_p (reg_equiv_mem[regno]))) 5695 force_replace = 1; 5696 5697 if (force_replace || num_not_at_initial_offset) 5698 { 5699 rtx tem = make_memloc (SUBREG_REG (x), regno); 5700 5701 /* If the address changes because of register elimination, then 5702 it must be replaced. */ 5703 if (force_replace 5704 || ! rtx_equal_p (tem, reg_equiv_mem[regno])) 5705 { 5706 int offset = SUBREG_WORD (x) * UNITS_PER_WORD; 5707 5708 if (BYTES_BIG_ENDIAN) 5709 { 5710 int size; 5711 5712 size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))); 5713 offset += MIN (size, UNITS_PER_WORD); 5714 size = GET_MODE_SIZE (GET_MODE (x)); 5715 offset -= MIN (size, UNITS_PER_WORD); 5716 } 5717 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset); 5718 PUT_MODE (tem, GET_MODE (x)); 5719 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0), 5720 &XEXP (tem, 0), opnum, ADDR_TYPE (type), 5721 ind_levels, insn); 5722 /* If this is not a toplevel operand, find_reloads doesn't see 5723 this substitution. We have to emit a USE of the pseudo so 5724 that delete_output_reload can see it. */ 5725 if (replace_reloads && recog_operand[opnum] != x) 5726 emit_insn_before (gen_rtx_USE (VOIDmode, SUBREG_REG (x)), insn); 5727 x = tem; 5728 } 5729 } 5730 } 5731 return x; 5732} 5733 5734/* Substitute into the current INSN the registers into which we have reloaded 5735 the things that need reloading. The array `replacements' 5736 says contains the locations of all pointers that must be changed 5737 and says what to replace them with. 5738 5739 Return the rtx that X translates into; usually X, but modified. */ 5740 5741void 5742subst_reloads () 5743{ 5744 register int i; 5745 5746 for (i = 0; i < n_replacements; i++) 5747 { 5748 register struct replacement *r = &replacements[i]; 5749 register rtx reloadreg = reload_reg_rtx[r->what]; 5750 if (reloadreg) 5751 { 5752 /* Encapsulate RELOADREG so its machine mode matches what 5753 used to be there. Note that gen_lowpart_common will 5754 do the wrong thing if RELOADREG is multi-word. RELOADREG 5755 will always be a REG here. */ 5756 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode) 5757 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg)); 5758 5759 /* If we are putting this into a SUBREG and RELOADREG is a 5760 SUBREG, we would be making nested SUBREGs, so we have to fix 5761 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */ 5762 5763 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG) 5764 { 5765 if (GET_MODE (*r->subreg_loc) 5766 == GET_MODE (SUBREG_REG (reloadreg))) 5767 *r->subreg_loc = SUBREG_REG (reloadreg); 5768 else 5769 { 5770 *r->where = SUBREG_REG (reloadreg); 5771 SUBREG_WORD (*r->subreg_loc) += SUBREG_WORD (reloadreg); 5772 } 5773 } 5774 else 5775 *r->where = reloadreg; 5776 } 5777 /* If reload got no reg and isn't optional, something's wrong. */ 5778 else if (! reload_optional[r->what]) 5779 abort (); 5780 } 5781} 5782 5783/* Make a copy of any replacements being done into X and move those copies 5784 to locations in Y, a copy of X. We only look at the highest level of 5785 the RTL. */ 5786 5787void 5788copy_replacements (x, y) 5789 rtx x; 5790 rtx y; 5791{ 5792 int i, j; 5793 enum rtx_code code = GET_CODE (x); 5794 char *fmt = GET_RTX_FORMAT (code); 5795 struct replacement *r; 5796 5797 /* We can't support X being a SUBREG because we might then need to know its 5798 location if something inside it was replaced. */ 5799 if (code == SUBREG) 5800 abort (); 5801 5802 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 5803 if (fmt[i] == 'e') 5804 for (j = 0; j < n_replacements; j++) 5805 { 5806 if (replacements[j].subreg_loc == &XEXP (x, i)) 5807 { 5808 r = &replacements[n_replacements++]; 5809 r->where = replacements[j].where; 5810 r->subreg_loc = &XEXP (y, i); 5811 r->what = replacements[j].what; 5812 r->mode = replacements[j].mode; 5813 } 5814 else if (replacements[j].where == &XEXP (x, i)) 5815 { 5816 r = &replacements[n_replacements++]; 5817 r->where = &XEXP (y, i); 5818 r->subreg_loc = 0; 5819 r->what = replacements[j].what; 5820 r->mode = replacements[j].mode; 5821 } 5822 } 5823} 5824 5825/* Change any replacements being done to *X to be done to *Y */ 5826 5827void 5828move_replacements (x, y) 5829 rtx *x; 5830 rtx *y; 5831{ 5832 int i; 5833 5834 for (i = 0; i < n_replacements; i++) 5835 if (replacements[i].subreg_loc == x) 5836 replacements[i].subreg_loc = y; 5837 else if (replacements[i].where == x) 5838 { 5839 replacements[i].where = y; 5840 replacements[i].subreg_loc = 0; 5841 } 5842} 5843 5844/* If LOC was scheduled to be replaced by something, return the replacement. 5845 Otherwise, return *LOC. */ 5846 5847rtx 5848find_replacement (loc) 5849 rtx *loc; 5850{ 5851 struct replacement *r; 5852 5853 for (r = &replacements[0]; r < &replacements[n_replacements]; r++) 5854 { 5855 rtx reloadreg = reload_reg_rtx[r->what]; 5856 5857 if (reloadreg && r->where == loc) 5858 { 5859 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode) 5860 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg)); 5861 5862 return reloadreg; 5863 } 5864 else if (reloadreg && r->subreg_loc == loc) 5865 { 5866 /* RELOADREG must be either a REG or a SUBREG. 5867 5868 ??? Is it actually still ever a SUBREG? If so, why? */ 5869 5870 if (GET_CODE (reloadreg) == REG) 5871 return gen_rtx_REG (GET_MODE (*loc), 5872 REGNO (reloadreg) + SUBREG_WORD (*loc)); 5873 else if (GET_MODE (reloadreg) == GET_MODE (*loc)) 5874 return reloadreg; 5875 else 5876 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg), 5877 SUBREG_WORD (reloadreg) + SUBREG_WORD (*loc)); 5878 } 5879 } 5880 5881 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for 5882 what's inside and make a new rtl if so. */ 5883 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS 5884 || GET_CODE (*loc) == MULT) 5885 { 5886 rtx x = find_replacement (&XEXP (*loc, 0)); 5887 rtx y = find_replacement (&XEXP (*loc, 1)); 5888 5889 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1)) 5890 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y); 5891 } 5892 5893 return *loc; 5894} 5895 5896/* Return nonzero if register in range [REGNO, ENDREGNO) 5897 appears either explicitly or implicitly in X 5898 other than being stored into (except for earlyclobber operands). 5899 5900 References contained within the substructure at LOC do not count. 5901 LOC may be zero, meaning don't ignore anything. 5902 5903 This is similar to refers_to_regno_p in rtlanal.c except that we 5904 look at equivalences for pseudos that didn't get hard registers. */ 5905 5906int 5907refers_to_regno_for_reload_p (regno, endregno, x, loc) 5908 int regno, endregno; 5909 rtx x; 5910 rtx *loc; 5911{ 5912 register int i; 5913 register RTX_CODE code; 5914 register char *fmt; 5915 5916 if (x == 0) 5917 return 0; 5918 5919 repeat: 5920 code = GET_CODE (x); 5921 5922 switch (code) 5923 { 5924 case REG: 5925 i = REGNO (x); 5926 5927 /* If this is a pseudo, a hard register must not have been allocated. 5928 X must therefore either be a constant or be in memory. */ 5929 if (i >= FIRST_PSEUDO_REGISTER) 5930 { 5931 if (reg_equiv_memory_loc[i]) 5932 return refers_to_regno_for_reload_p (regno, endregno, 5933 reg_equiv_memory_loc[i], 5934 NULL_PTR); 5935 5936 if (reg_equiv_constant[i]) 5937 return 0; 5938 5939 abort (); 5940 } 5941 5942 return (endregno > i 5943 && regno < i + (i < FIRST_PSEUDO_REGISTER 5944 ? HARD_REGNO_NREGS (i, GET_MODE (x)) 5945 : 1)); 5946 5947 case SUBREG: 5948 /* If this is a SUBREG of a hard reg, we can see exactly which 5949 registers are being modified. Otherwise, handle normally. */ 5950 if (GET_CODE (SUBREG_REG (x)) == REG 5951 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER) 5952 { 5953 int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x); 5954 int inner_endregno 5955 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER 5956 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1); 5957 5958 return endregno > inner_regno && regno < inner_endregno; 5959 } 5960 break; 5961 5962 case CLOBBER: 5963 case SET: 5964 if (&SET_DEST (x) != loc 5965 /* Note setting a SUBREG counts as referring to the REG it is in for 5966 a pseudo but not for hard registers since we can 5967 treat each word individually. */ 5968 && ((GET_CODE (SET_DEST (x)) == SUBREG 5969 && loc != &SUBREG_REG (SET_DEST (x)) 5970 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG 5971 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER 5972 && refers_to_regno_for_reload_p (regno, endregno, 5973 SUBREG_REG (SET_DEST (x)), 5974 loc)) 5975 /* If the output is an earlyclobber operand, this is 5976 a conflict. */ 5977 || ((GET_CODE (SET_DEST (x)) != REG 5978 || earlyclobber_operand_p (SET_DEST (x))) 5979 && refers_to_regno_for_reload_p (regno, endregno, 5980 SET_DEST (x), loc)))) 5981 return 1; 5982 5983 if (code == CLOBBER || loc == &SET_SRC (x)) 5984 return 0; 5985 x = SET_SRC (x); 5986 goto repeat; 5987 5988 default: 5989 break; 5990 } 5991 5992 /* X does not match, so try its subexpressions. */ 5993 5994 fmt = GET_RTX_FORMAT (code); 5995 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 5996 { 5997 if (fmt[i] == 'e' && loc != &XEXP (x, i)) 5998 { 5999 if (i == 0) 6000 { 6001 x = XEXP (x, 0); 6002 goto repeat; 6003 } 6004 else 6005 if (refers_to_regno_for_reload_p (regno, endregno, 6006 XEXP (x, i), loc)) 6007 return 1; 6008 } 6009 else if (fmt[i] == 'E') 6010 { 6011 register int j; 6012 for (j = XVECLEN (x, i) - 1; j >=0; j--) 6013 if (loc != &XVECEXP (x, i, j) 6014 && refers_to_regno_for_reload_p (regno, endregno, 6015 XVECEXP (x, i, j), loc)) 6016 return 1; 6017 } 6018 } 6019 return 0; 6020} 6021 6022/* Nonzero if modifying X will affect IN. If X is a register or a SUBREG, 6023 we check if any register number in X conflicts with the relevant register 6024 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN 6025 contains a MEM (we don't bother checking for memory addresses that can't 6026 conflict because we expect this to be a rare case. 6027 6028 This function is similar to reg_overlap_mention_p in rtlanal.c except 6029 that we look at equivalences for pseudos that didn't get hard registers. */ 6030 6031int 6032reg_overlap_mentioned_for_reload_p (x, in) 6033 rtx x, in; 6034{ 6035 int regno, endregno; 6036 6037 /* Overly conservative. */ 6038 if (GET_CODE (x) == STRICT_LOW_PART) 6039 x = XEXP (x, 0); 6040 6041 /* If either argument is a constant, then modifying X can not affect IN. */ 6042 if (CONSTANT_P (x) || CONSTANT_P (in)) 6043 return 0; 6044 else if (GET_CODE (x) == SUBREG) 6045 { 6046 regno = REGNO (SUBREG_REG (x)); 6047 if (regno < FIRST_PSEUDO_REGISTER) 6048 regno += SUBREG_WORD (x); 6049 } 6050 else if (GET_CODE (x) == REG) 6051 { 6052 regno = REGNO (x); 6053 6054 /* If this is a pseudo, it must not have been assigned a hard register. 6055 Therefore, it must either be in memory or be a constant. */ 6056 6057 if (regno >= FIRST_PSEUDO_REGISTER) 6058 { 6059 if (reg_equiv_memory_loc[regno]) 6060 return refers_to_mem_for_reload_p (in); 6061 else if (reg_equiv_constant[regno]) 6062 return 0; 6063 abort (); 6064 } 6065 } 6066 else if (GET_CODE (x) == MEM) 6067 return refers_to_mem_for_reload_p (in); 6068 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC 6069 || GET_CODE (x) == CC0) 6070 return reg_mentioned_p (x, in); 6071 else 6072 abort (); 6073 6074 endregno = regno + (regno < FIRST_PSEUDO_REGISTER 6075 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1); 6076 6077 return refers_to_regno_for_reload_p (regno, endregno, in, NULL_PTR); 6078} 6079 6080/* Return nonzero if anything in X contains a MEM. Look also for pseudo 6081 registers. */ 6082 6083int 6084refers_to_mem_for_reload_p (x) 6085 rtx x; 6086{ 6087 char *fmt; 6088 int i; 6089 6090 if (GET_CODE (x) == MEM) 6091 return 1; 6092 6093 if (GET_CODE (x) == REG) 6094 return (REGNO (x) >= FIRST_PSEUDO_REGISTER 6095 && reg_equiv_memory_loc[REGNO (x)]); 6096 6097 fmt = GET_RTX_FORMAT (GET_CODE (x)); 6098 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--) 6099 if (fmt[i] == 'e' 6100 && (GET_CODE (XEXP (x, i)) == MEM 6101 || refers_to_mem_for_reload_p (XEXP (x, i)))) 6102 return 1; 6103 6104 return 0; 6105} 6106 6107/* Check the insns before INSN to see if there is a suitable register 6108 containing the same value as GOAL. 6109 If OTHER is -1, look for a register in class CLASS. 6110 Otherwise, just see if register number OTHER shares GOAL's value. 6111 6112 Return an rtx for the register found, or zero if none is found. 6113 6114 If RELOAD_REG_P is (short *)1, 6115 we reject any hard reg that appears in reload_reg_rtx 6116 because such a hard reg is also needed coming into this insn. 6117 6118 If RELOAD_REG_P is any other nonzero value, 6119 it is a vector indexed by hard reg number 6120 and we reject any hard reg whose element in the vector is nonnegative 6121 as well as any that appears in reload_reg_rtx. 6122 6123 If GOAL is zero, then GOALREG is a register number; we look 6124 for an equivalent for that register. 6125 6126 MODE is the machine mode of the value we want an equivalence for. 6127 If GOAL is nonzero and not VOIDmode, then it must have mode MODE. 6128 6129 This function is used by jump.c as well as in the reload pass. 6130 6131 If GOAL is the sum of the stack pointer and a constant, we treat it 6132 as if it were a constant except that sp is required to be unchanging. */ 6133 6134rtx 6135find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode) 6136 register rtx goal; 6137 rtx insn; 6138 enum reg_class class; 6139 register int other; 6140 short *reload_reg_p; 6141 int goalreg; 6142 enum machine_mode mode; 6143{ 6144 register rtx p = insn; 6145 rtx goaltry, valtry, value, where; 6146 register rtx pat; 6147 register int regno = -1; 6148 int valueno; 6149 int goal_mem = 0; 6150 int goal_const = 0; 6151 int goal_mem_addr_varies = 0; 6152 int need_stable_sp = 0; 6153 int nregs; 6154 int valuenregs; 6155 6156 if (goal == 0) 6157 regno = goalreg; 6158 else if (GET_CODE (goal) == REG) 6159 regno = REGNO (goal); 6160 else if (GET_CODE (goal) == MEM) 6161 { 6162 enum rtx_code code = GET_CODE (XEXP (goal, 0)); 6163 if (MEM_VOLATILE_P (goal)) 6164 return 0; 6165 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT) 6166 return 0; 6167 /* An address with side effects must be reexecuted. */ 6168 switch (code) 6169 { 6170 case POST_INC: 6171 case PRE_INC: 6172 case POST_DEC: 6173 case PRE_DEC: 6174 return 0; 6175 default: 6176 break; 6177 } 6178 goal_mem = 1; 6179 } 6180 else if (CONSTANT_P (goal)) 6181 goal_const = 1; 6182 else if (GET_CODE (goal) == PLUS 6183 && XEXP (goal, 0) == stack_pointer_rtx 6184 && CONSTANT_P (XEXP (goal, 1))) 6185 goal_const = need_stable_sp = 1; 6186 else if (GET_CODE (goal) == PLUS 6187 && XEXP (goal, 0) == frame_pointer_rtx 6188 && CONSTANT_P (XEXP (goal, 1))) 6189 goal_const = 1; 6190 else 6191 return 0; 6192 6193 /* On some machines, certain regs must always be rejected 6194 because they don't behave the way ordinary registers do. */ 6195 6196#ifdef OVERLAPPING_REGNO_P 6197 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER 6198 && OVERLAPPING_REGNO_P (regno)) 6199 return 0; 6200#endif 6201 6202 /* Scan insns back from INSN, looking for one that copies 6203 a value into or out of GOAL. 6204 Stop and give up if we reach a label. */ 6205 6206 while (1) 6207 { 6208 p = PREV_INSN (p); 6209 if (p == 0 || GET_CODE (p) == CODE_LABEL) 6210 return 0; 6211 if (GET_CODE (p) == INSN 6212 /* If we don't want spill regs ... */ 6213 && (! (reload_reg_p != 0 6214 && reload_reg_p != (short *) (HOST_WIDE_INT) 1) 6215 /* ... then ignore insns introduced by reload; they aren't useful 6216 and can cause results in reload_as_needed to be different 6217 from what they were when calculating the need for spills. 6218 If we notice an input-reload insn here, we will reject it below, 6219 but it might hide a usable equivalent. That makes bad code. 6220 It may even abort: perhaps no reg was spilled for this insn 6221 because it was assumed we would find that equivalent. */ 6222 || INSN_UID (p) < reload_first_uid)) 6223 { 6224 rtx tem; 6225 pat = single_set (p); 6226 /* First check for something that sets some reg equal to GOAL. */ 6227 if (pat != 0 6228 && ((regno >= 0 6229 && true_regnum (SET_SRC (pat)) == regno 6230 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0) 6231 || 6232 (regno >= 0 6233 && true_regnum (SET_DEST (pat)) == regno 6234 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0) 6235 || 6236 (goal_const && rtx_equal_p (SET_SRC (pat), goal) 6237 /* When looking for stack pointer + const, 6238 make sure we don't use a stack adjust. */ 6239 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal) 6240 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0) 6241 || (goal_mem 6242 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0 6243 && rtx_renumbered_equal_p (goal, SET_SRC (pat))) 6244 || (goal_mem 6245 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0 6246 && rtx_renumbered_equal_p (goal, SET_DEST (pat))) 6247 /* If we are looking for a constant, 6248 and something equivalent to that constant was copied 6249 into a reg, we can use that reg. */ 6250 || (goal_const && (tem = find_reg_note (p, REG_EQUIV, 6251 NULL_RTX)) 6252 && rtx_equal_p (XEXP (tem, 0), goal) 6253 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0) 6254 || (goal_const && (tem = find_reg_note (p, REG_EQUIV, 6255 NULL_RTX)) 6256 && GET_CODE (SET_DEST (pat)) == REG 6257 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE 6258 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT 6259 && GET_CODE (goal) == CONST_INT 6260 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 0, 0, 6261 VOIDmode)) 6262 && rtx_equal_p (goal, goaltry) 6263 && (valtry = operand_subword (SET_DEST (pat), 0, 0, 6264 VOIDmode)) 6265 && (valueno = true_regnum (valtry)) >= 0) 6266 || (goal_const && (tem = find_reg_note (p, REG_EQUIV, 6267 NULL_RTX)) 6268 && GET_CODE (SET_DEST (pat)) == REG 6269 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE 6270 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT 6271 && GET_CODE (goal) == CONST_INT 6272 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0, 6273 VOIDmode)) 6274 && rtx_equal_p (goal, goaltry) 6275 && (valtry 6276 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode)) 6277 && (valueno = true_regnum (valtry)) >= 0))) 6278 { 6279 if (other >= 0) 6280 { 6281 if (valueno != other) 6282 continue; 6283 } 6284 else if ((unsigned) valueno >= FIRST_PSEUDO_REGISTER) 6285 continue; 6286 else 6287 { 6288 int i; 6289 6290 for (i = HARD_REGNO_NREGS (valueno, mode) - 1; i >= 0; i--) 6291 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], 6292 valueno + i)) 6293 break; 6294 if (i >= 0) 6295 continue; 6296 } 6297 value = valtry; 6298 where = p; 6299 break; 6300 } 6301 } 6302 } 6303 6304 /* We found a previous insn copying GOAL into a suitable other reg VALUE 6305 (or copying VALUE into GOAL, if GOAL is also a register). 6306 Now verify that VALUE is really valid. */ 6307 6308 /* VALUENO is the register number of VALUE; a hard register. */ 6309 6310 /* Don't try to re-use something that is killed in this insn. We want 6311 to be able to trust REG_UNUSED notes. */ 6312 if (find_reg_note (where, REG_UNUSED, value)) 6313 return 0; 6314 6315 /* If we propose to get the value from the stack pointer or if GOAL is 6316 a MEM based on the stack pointer, we need a stable SP. */ 6317 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM 6318 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx, 6319 goal))) 6320 need_stable_sp = 1; 6321 6322 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */ 6323 if (GET_MODE (value) != mode) 6324 return 0; 6325 6326 /* Reject VALUE if it was loaded from GOAL 6327 and is also a register that appears in the address of GOAL. */ 6328 6329 if (goal_mem && value == SET_DEST (single_set (where)) 6330 && refers_to_regno_for_reload_p (valueno, 6331 (valueno 6332 + HARD_REGNO_NREGS (valueno, mode)), 6333 goal, NULL_PTR)) 6334 return 0; 6335 6336 /* Reject registers that overlap GOAL. */ 6337 6338 if (!goal_mem && !goal_const 6339 && regno + HARD_REGNO_NREGS (regno, mode) > valueno 6340 && regno < valueno + HARD_REGNO_NREGS (valueno, mode)) 6341 return 0; 6342 6343 nregs = HARD_REGNO_NREGS (regno, mode); 6344 valuenregs = HARD_REGNO_NREGS (valueno, mode); 6345 6346 /* Reject VALUE if it is one of the regs reserved for reloads. 6347 Reload1 knows how to reuse them anyway, and it would get 6348 confused if we allocated one without its knowledge. 6349 (Now that insns introduced by reload are ignored above, 6350 this case shouldn't happen, but I'm not positive.) */ 6351 6352 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1) 6353 { 6354 int i; 6355 for (i = 0; i < valuenregs; ++i) 6356 if (reload_reg_p[valueno + i] >= 0) 6357 return 0; 6358 } 6359 6360 /* On some machines, certain regs must always be rejected 6361 because they don't behave the way ordinary registers do. */ 6362 6363#ifdef OVERLAPPING_REGNO_P 6364 if (OVERLAPPING_REGNO_P (valueno)) 6365 return 0; 6366#endif 6367 6368 /* Reject VALUE if it is a register being used for an input reload 6369 even if it is not one of those reserved. */ 6370 6371 if (reload_reg_p != 0) 6372 { 6373 int i; 6374 for (i = 0; i < n_reloads; i++) 6375 if (reload_reg_rtx[i] != 0 && reload_in[i]) 6376 { 6377 int regno1 = REGNO (reload_reg_rtx[i]); 6378 int nregs1 = HARD_REGNO_NREGS (regno1, 6379 GET_MODE (reload_reg_rtx[i])); 6380 if (regno1 < valueno + valuenregs 6381 && regno1 + nregs1 > valueno) 6382 return 0; 6383 } 6384 } 6385 6386 if (goal_mem) 6387 /* We must treat frame pointer as varying here, 6388 since it can vary--in a nonlocal goto as generated by expand_goto. */ 6389 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0)); 6390 6391 /* Now verify that the values of GOAL and VALUE remain unaltered 6392 until INSN is reached. */ 6393 6394 p = insn; 6395 while (1) 6396 { 6397 p = PREV_INSN (p); 6398 if (p == where) 6399 return value; 6400 6401 /* Don't trust the conversion past a function call 6402 if either of the two is in a call-clobbered register, or memory. */ 6403 if (GET_CODE (p) == CALL_INSN) 6404 { 6405 int i; 6406 6407 if (goal_mem || need_stable_sp) 6408 return 0; 6409 6410 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER) 6411 for (i = 0; i < nregs; ++i) 6412 if (call_used_regs[regno + i]) 6413 return 0; 6414 6415 if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER) 6416 for (i = 0; i < valuenregs; ++i) 6417 if (call_used_regs[valueno + i]) 6418 return 0; 6419 } 6420 6421#ifdef NON_SAVING_SETJMP 6422 if (NON_SAVING_SETJMP && GET_CODE (p) == NOTE 6423 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP) 6424 return 0; 6425#endif 6426 6427#ifdef INSN_CLOBBERS_REGNO_P 6428 if ((valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER 6429 && INSN_CLOBBERS_REGNO_P (p, valueno)) 6430 || (regno >= 0 && regno < FIRST_PSEUDO_REGISTER 6431 && INSN_CLOBBERS_REGNO_P (p, regno))) 6432 return 0; 6433#endif 6434 6435 if (GET_RTX_CLASS (GET_CODE (p)) == 'i') 6436 { 6437 pat = PATTERN (p); 6438 6439 /* Watch out for unspec_volatile, and volatile asms. */ 6440 if (volatile_insn_p (pat)) 6441 return 0; 6442 6443 /* If this insn P stores in either GOAL or VALUE, return 0. 6444 If GOAL is a memory ref and this insn writes memory, return 0. 6445 If GOAL is a memory ref and its address is not constant, 6446 and this insn P changes a register used in GOAL, return 0. */ 6447 6448 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER) 6449 { 6450 register rtx dest = SET_DEST (pat); 6451 while (GET_CODE (dest) == SUBREG 6452 || GET_CODE (dest) == ZERO_EXTRACT 6453 || GET_CODE (dest) == SIGN_EXTRACT 6454 || GET_CODE (dest) == STRICT_LOW_PART) 6455 dest = XEXP (dest, 0); 6456 if (GET_CODE (dest) == REG) 6457 { 6458 register int xregno = REGNO (dest); 6459 int xnregs; 6460 if (REGNO (dest) < FIRST_PSEUDO_REGISTER) 6461 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest)); 6462 else 6463 xnregs = 1; 6464 if (xregno < regno + nregs && xregno + xnregs > regno) 6465 return 0; 6466 if (xregno < valueno + valuenregs 6467 && xregno + xnregs > valueno) 6468 return 0; 6469 if (goal_mem_addr_varies 6470 && reg_overlap_mentioned_for_reload_p (dest, goal)) 6471 return 0; 6472 if (xregno == STACK_POINTER_REGNUM && need_stable_sp) 6473 return 0; 6474 } 6475 else if (goal_mem && GET_CODE (dest) == MEM 6476 && ! push_operand (dest, GET_MODE (dest))) 6477 return 0; 6478 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER 6479 && reg_equiv_memory_loc[regno] != 0) 6480 return 0; 6481 else if (need_stable_sp && push_operand (dest, GET_MODE (dest))) 6482 return 0; 6483 } 6484 else if (GET_CODE (pat) == PARALLEL) 6485 { 6486 register int i; 6487 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--) 6488 { 6489 register rtx v1 = XVECEXP (pat, 0, i); 6490 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER) 6491 { 6492 register rtx dest = SET_DEST (v1); 6493 while (GET_CODE (dest) == SUBREG 6494 || GET_CODE (dest) == ZERO_EXTRACT 6495 || GET_CODE (dest) == SIGN_EXTRACT 6496 || GET_CODE (dest) == STRICT_LOW_PART) 6497 dest = XEXP (dest, 0); 6498 if (GET_CODE (dest) == REG) 6499 { 6500 register int xregno = REGNO (dest); 6501 int xnregs; 6502 if (REGNO (dest) < FIRST_PSEUDO_REGISTER) 6503 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest)); 6504 else 6505 xnregs = 1; 6506 if (xregno < regno + nregs 6507 && xregno + xnregs > regno) 6508 return 0; 6509 if (xregno < valueno + valuenregs 6510 && xregno + xnregs > valueno) 6511 return 0; 6512 if (goal_mem_addr_varies 6513 && reg_overlap_mentioned_for_reload_p (dest, 6514 goal)) 6515 return 0; 6516 if (xregno == STACK_POINTER_REGNUM && need_stable_sp) 6517 return 0; 6518 } 6519 else if (goal_mem && GET_CODE (dest) == MEM 6520 && ! push_operand (dest, GET_MODE (dest))) 6521 return 0; 6522 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER 6523 && reg_equiv_memory_loc[regno] != 0) 6524 return 0; 6525 else if (need_stable_sp 6526 && push_operand (dest, GET_MODE (dest))) 6527 return 0; 6528 } 6529 } 6530 } 6531 6532 if (GET_CODE (p) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (p)) 6533 { 6534 rtx link; 6535 6536 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0; 6537 link = XEXP (link, 1)) 6538 { 6539 pat = XEXP (link, 0); 6540 if (GET_CODE (pat) == CLOBBER) 6541 { 6542 register rtx dest = SET_DEST (pat); 6543 while (GET_CODE (dest) == SUBREG 6544 || GET_CODE (dest) == ZERO_EXTRACT 6545 || GET_CODE (dest) == SIGN_EXTRACT 6546 || GET_CODE (dest) == STRICT_LOW_PART) 6547 dest = XEXP (dest, 0); 6548 if (GET_CODE (dest) == REG) 6549 { 6550 register int xregno = REGNO (dest); 6551 int xnregs; 6552 if (REGNO (dest) < FIRST_PSEUDO_REGISTER) 6553 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest)); 6554 else 6555 xnregs = 1; 6556 if (xregno < regno + nregs 6557 && xregno + xnregs > regno) 6558 return 0; 6559 if (xregno < valueno + valuenregs 6560 && xregno + xnregs > valueno) 6561 return 0; 6562 if (goal_mem_addr_varies 6563 && reg_overlap_mentioned_for_reload_p (dest, 6564 goal)) 6565 return 0; 6566 } 6567 else if (goal_mem && GET_CODE (dest) == MEM 6568 && ! push_operand (dest, GET_MODE (dest))) 6569 return 0; 6570 else if (need_stable_sp 6571 && push_operand (dest, GET_MODE (dest))) 6572 return 0; 6573 } 6574 } 6575 } 6576 6577#ifdef AUTO_INC_DEC 6578 /* If this insn auto-increments or auto-decrements 6579 either regno or valueno, return 0 now. 6580 If GOAL is a memory ref and its address is not constant, 6581 and this insn P increments a register used in GOAL, return 0. */ 6582 { 6583 register rtx link; 6584 6585 for (link = REG_NOTES (p); link; link = XEXP (link, 1)) 6586 if (REG_NOTE_KIND (link) == REG_INC 6587 && GET_CODE (XEXP (link, 0)) == REG) 6588 { 6589 register int incno = REGNO (XEXP (link, 0)); 6590 if (incno < regno + nregs && incno >= regno) 6591 return 0; 6592 if (incno < valueno + valuenregs && incno >= valueno) 6593 return 0; 6594 if (goal_mem_addr_varies 6595 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0), 6596 goal)) 6597 return 0; 6598 } 6599 } 6600#endif 6601 } 6602 } 6603} 6604 6605/* Find a place where INCED appears in an increment or decrement operator 6606 within X, and return the amount INCED is incremented or decremented by. 6607 The value is always positive. */ 6608 6609static int 6610find_inc_amount (x, inced) 6611 rtx x, inced; 6612{ 6613 register enum rtx_code code = GET_CODE (x); 6614 register char *fmt; 6615 register int i; 6616 6617 if (code == MEM) 6618 { 6619 register rtx addr = XEXP (x, 0); 6620 if ((GET_CODE (addr) == PRE_DEC 6621 || GET_CODE (addr) == POST_DEC 6622 || GET_CODE (addr) == PRE_INC 6623 || GET_CODE (addr) == POST_INC) 6624 && XEXP (addr, 0) == inced) 6625 return GET_MODE_SIZE (GET_MODE (x)); 6626 } 6627 6628 fmt = GET_RTX_FORMAT (code); 6629 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 6630 { 6631 if (fmt[i] == 'e') 6632 { 6633 register int tem = find_inc_amount (XEXP (x, i), inced); 6634 if (tem != 0) 6635 return tem; 6636 } 6637 if (fmt[i] == 'E') 6638 { 6639 register int j; 6640 for (j = XVECLEN (x, i) - 1; j >= 0; j--) 6641 { 6642 register int tem = find_inc_amount (XVECEXP (x, i, j), inced); 6643 if (tem != 0) 6644 return tem; 6645 } 6646 } 6647 } 6648 6649 return 0; 6650} 6651 6652/* Return 1 if register REGNO is the subject of a clobber in insn INSN. */ 6653 6654int 6655regno_clobbered_p (regno, insn, mode, sets) 6656 int regno; 6657 rtx insn; 6658 enum machine_mode mode; 6659 int sets; 6660{ 6661 int nregs = HARD_REGNO_NREGS (regno, mode); 6662 int endregno = regno + nregs; 6663 6664 if ((GET_CODE (PATTERN (insn)) == CLOBBER 6665 || (sets && GET_CODE (PATTERN (insn)) == SET)) 6666 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG) 6667 { 6668 int test = REGNO (XEXP (PATTERN (insn), 0)); 6669 6670 return test >= regno && test < endregno; 6671 } 6672 6673 if (GET_CODE (PATTERN (insn)) == PARALLEL) 6674 { 6675 int i = XVECLEN (PATTERN (insn), 0) - 1; 6676 6677 for (; i >= 0; i--) 6678 { 6679 rtx elt = XVECEXP (PATTERN (insn), 0, i); 6680 if ((GET_CODE (elt) == CLOBBER 6681 || (sets && GET_CODE (PATTERN (insn)) == SET)) 6682 && GET_CODE (XEXP (elt, 0)) == REG) 6683 { 6684 int test = REGNO (XEXP (elt, 0)); 6685 6686 if (test >= regno && test < endregno) 6687 return 1; 6688 } 6689 } 6690 } 6691 6692 return 0; 6693} 6694 6695static char *reload_when_needed_name[] = 6696{ 6697 "RELOAD_FOR_INPUT", 6698 "RELOAD_FOR_OUTPUT", 6699 "RELOAD_FOR_INSN", 6700 "RELOAD_FOR_INPUT_ADDRESS", 6701 "RELOAD_FOR_INPADDR_ADDRESS", 6702 "RELOAD_FOR_OUTPUT_ADDRESS", 6703 "RELOAD_FOR_OUTADDR_ADDRESS", 6704 "RELOAD_FOR_OPERAND_ADDRESS", 6705 "RELOAD_FOR_OPADDR_ADDR", 6706 "RELOAD_OTHER", 6707 "RELOAD_FOR_OTHER_ADDRESS" 6708}; 6709 6710static char *reg_class_names[] = REG_CLASS_NAMES; 6711 6712/* These functions are used to print the variables set by 'find_reloads' */ 6713 6714void 6715debug_reload_to_stream (f) 6716 FILE *f; 6717{ 6718 int r; 6719 char *prefix; 6720 6721 if (! f) 6722 f = stderr; 6723 for (r = 0; r < n_reloads; r++) 6724 { 6725 fprintf (f, "Reload %d: ", r); 6726 6727 if (reload_in[r] != 0) 6728 { 6729 fprintf (f, "reload_in (%s) = ", 6730 GET_MODE_NAME (reload_inmode[r])); 6731 print_inline_rtx (f, reload_in[r], 24); 6732 fprintf (f, "\n\t"); 6733 } 6734 6735 if (reload_out[r] != 0) 6736 { 6737 fprintf (f, "reload_out (%s) = ", 6738 GET_MODE_NAME (reload_outmode[r])); 6739 print_inline_rtx (f, reload_out[r], 24); 6740 fprintf (f, "\n\t"); 6741 } 6742 6743 fprintf (f, "%s, ", reg_class_names[(int) reload_reg_class[r]]); 6744 6745 fprintf (f, "%s (opnum = %d)", 6746 reload_when_needed_name[(int) reload_when_needed[r]], 6747 reload_opnum[r]); 6748 6749 if (reload_optional[r]) 6750 fprintf (f, ", optional"); 6751 6752 if (reload_nongroup[r]) 6753 fprintf (stderr, ", nongroup"); 6754 6755 if (reload_inc[r] != 0) 6756 fprintf (f, ", inc by %d", reload_inc[r]); 6757 6758 if (reload_nocombine[r]) 6759 fprintf (f, ", can't combine"); 6760 6761 if (reload_secondary_p[r]) 6762 fprintf (f, ", secondary_reload_p"); 6763 6764 if (reload_in_reg[r] != 0) 6765 { 6766 fprintf (f, "\n\treload_in_reg: "); 6767 print_inline_rtx (f, reload_in_reg[r], 24); 6768 } 6769 6770 if (reload_out_reg[r] != 0) 6771 { 6772 fprintf (f, "\n\treload_out_reg: "); 6773 print_inline_rtx (f, reload_out_reg[r], 24); 6774 } 6775 6776 if (reload_reg_rtx[r] != 0) 6777 { 6778 fprintf (f, "\n\treload_reg_rtx: "); 6779 print_inline_rtx (f, reload_reg_rtx[r], 24); 6780 } 6781 6782 prefix = "\n\t"; 6783 if (reload_secondary_in_reload[r] != -1) 6784 { 6785 fprintf (f, "%ssecondary_in_reload = %d", 6786 prefix, reload_secondary_in_reload[r]); 6787 prefix = ", "; 6788 } 6789 6790 if (reload_secondary_out_reload[r] != -1) 6791 fprintf (f, "%ssecondary_out_reload = %d\n", 6792 prefix, reload_secondary_out_reload[r]); 6793 6794 prefix = "\n\t"; 6795 if (reload_secondary_in_icode[r] != CODE_FOR_nothing) 6796 { 6797 fprintf (stderr, "%ssecondary_in_icode = %s", prefix, 6798 insn_name[reload_secondary_in_icode[r]]); 6799 prefix = ", "; 6800 } 6801 6802 if (reload_secondary_out_icode[r] != CODE_FOR_nothing) 6803 fprintf (stderr, "%ssecondary_out_icode = %s", prefix, 6804 insn_name[reload_secondary_out_icode[r]]); 6805 6806 fprintf (f, "\n"); 6807 } 6808} 6809 6810void 6811debug_reload () 6812{ 6813 debug_reload_to_stream (stderr); 6814} 6815