1/* Definitions of target machine for GNU compiler for 2 Motorola m88100 in an 88open OCS/BCS environment. 3 Copyright (C) 1988, 92-97, 1998 Free Software Foundation, Inc. 4 Contributed by Michael Tiemann (tiemann@cygnus.com). 5 Currently maintained by (gcc@dg-rtp.dg.com) 6 7This file is part of GNU CC. 8 9GNU CC is free software; you can redistribute it and/or modify 10it under the terms of the GNU General Public License as published by 11the Free Software Foundation; either version 2, or (at your option) 12any later version. 13 14GNU CC is distributed in the hope that it will be useful, 15but WITHOUT ANY WARRANTY; without even the implied warranty of 16MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17GNU General Public License for more details. 18 19You should have received a copy of the GNU General Public License 20along with GNU CC; see the file COPYING. If not, write to 21the Free Software Foundation, 59 Temple Place - Suite 330, 22Boston, MA 02111-1307, USA. */ 23 24/* The m88100 port of GNU CC adheres to the various standards from 88open. 25 These documents are available by writing: 26 27 88open Consortium Ltd. 28 100 Homeland Court, Suite 800 29 San Jose, CA 95112 30 (408) 436-6600 31 32 In brief, the current standards are: 33 34 Binary Compatibility Standard, Release 1.1A, May 1991 35 This provides for portability of application-level software at the 36 executable level for AT&T System V Release 3.2. 37 38 Object Compatibility Standard, Release 1.1A, May 1991 39 This provides for portability of application-level software at the 40 object file and library level for C, Fortran, and Cobol, and again, 41 largely for SVR3. 42 43 Under development are standards for AT&T System V Release 4, based on the 44 [generic] System V Application Binary Interface from AT&T. These include: 45 46 System V Application Binary Interface, Motorola 88000 Processor Supplement 47 Another document from AT&T for SVR4 specific to the m88100. 48 Available from Prentice Hall. 49 50 System V Application Binary Interface, Motorola 88000 Processor Supplement, 51 Release 1.1, Draft H, May 6, 1991 52 A proposed update to the AT&T document from 88open. 53 54 System V ABI Implementation Guide for the M88000 Processor, 55 Release 1.0, January 1991 56 A companion ABI document from 88open. */ 57 58/* Other *.h files in config/m88k include this one and override certain items. 59 Currently these are sysv3.h, sysv4.h, dgux.h, dolph.h, tekXD88.h, and luna.h. 60 Additionally, sysv4.h and dgux.h include svr4.h first. All other 61 m88k targets except luna.h are based on svr3.h. */ 62 63/* Choose SVR3 as the default. */ 64#if !defined(DBX_DEBUGGING_INFO) && !defined(DWARF_DEBUGGING_INFO) 65#include "svr3.h" 66#endif 67 68/* External types used. */ 69 70/* What instructions are needed to manufacture an integer constant. */ 71enum m88k_instruction { 72 m88k_zero, 73 m88k_or, 74 m88k_subu, 75 m88k_or_lo16, 76 m88k_or_lo8, 77 m88k_set, 78 m88k_oru_hi16, 79 m88k_oru_or 80}; 81 82/* Which processor to schedule for. The elements of the enumeration 83 must match exactly the cpu attribute in the m88k.md machine description. */ 84 85enum processor_type { 86 PROCESSOR_M88100, 87 PROCESSOR_M88110, 88 PROCESSOR_M88000, 89}; 90 91/* Recast the cpu class to be the cpu attribute. */ 92#define m88k_cpu_attr ((enum attr_cpu)m88k_cpu) 93 94/* External variables/functions defined in m88k.c. */ 95 96extern char *m88k_pound_sign; 97extern char *m88k_short_data; 98extern char *m88k_version; 99extern char m88k_volatile_code; 100 101extern unsigned m88k_gp_threshold; 102extern int m88k_prologue_done; 103extern int m88k_function_number; 104extern int m88k_fp_offset; 105extern int m88k_stack_size; 106extern int m88k_case_index; 107 108extern struct rtx_def *m88k_compare_reg; 109extern struct rtx_def *m88k_compare_op0; 110extern struct rtx_def *m88k_compare_op1; 111 112extern enum processor_type m88k_cpu; 113 114extern int null_prologue (); 115extern int integer_ok_for_set (); 116extern int m88k_debugger_offset (); 117 118 119extern void emit_bcnd (); 120extern void expand_block_move (); 121extern void m88k_layout_frame (); 122extern void m88k_expand_prologue (); 123extern void m88k_begin_prologue (); 124extern void m88k_end_prologue (); 125extern void m88k_expand_epilogue (); 126extern void m88k_begin_epilogue (); 127extern void m88k_end_epilogue (); 128extern void output_function_profiler (); 129extern void output_function_block_profiler (); 130extern void output_block_profiler (); 131extern void output_file_start (); 132extern void output_ascii (); 133extern void output_label (); 134extern void print_operand (); 135extern void print_operand_address (); 136 137extern char *output_load_const_int (); 138extern char *output_load_const_float (); 139extern char *output_load_const_double (); 140extern char *output_load_const_dimode (); 141extern char *output_and (); 142extern char *output_ior (); 143extern char *output_xor (); 144extern char *output_call (); 145 146extern struct rtx_def *emit_test (); 147extern struct rtx_def *legitimize_address (); 148extern struct rtx_def *legitimize_operand (); 149extern struct rtx_def *m88k_function_arg (); 150extern struct rtx_def *m88k_builtin_saveregs (); 151 152extern enum m88k_instruction classify_integer (); 153 154/* external variables defined elsewhere in the compiler */ 155 156extern int target_flags; /* -m compiler switches */ 157extern int frame_pointer_needed; /* current function has a FP */ 158extern int current_function_pretend_args_size; /* args size without ... */ 159extern int flag_delayed_branch; /* -fdelayed-branch */ 160extern int flag_pic; /* -fpic */ 161extern char * reg_names[]; 162 163/* Specify the default monitors. The meaning of these values can 164 be obtained by doing "grep MONITOR_GCC *m88k*". Generally, the 165 values downward from 0x8000 are tests that will soon go away. 166 values upward from 0x1 are generally useful tests that will remain. */ 167 168#ifndef MONITOR_GCC 169#define MONITOR_GCC 0 170#endif 171 172/*** Controlling the Compilation Driver, `gcc' ***/ 173/* Show we can debug even without a frame pointer. */ 174#define CAN_DEBUG_WITHOUT_FP 175 176/* If -m88100 is in effect, add -D__m88100__; similarly for -m88110. 177 Here, the CPU_DEFAULT is assumed to be -m88100. */ 178#undef CPP_SPEC 179#define CPP_SPEC "%{!m88000:%{!m88100:%{m88110:-D__m88110__}}} \ 180 %{!m88000:%{!m88110:-D__m88100__}}" 181 182/* LIB_SPEC, LINK_SPEC, and STARTFILE_SPEC defined in svr3.h. 183 ASM_SPEC, ASM_FINAL_SPEC, LIB_SPEC, LINK_SPEC, and STARTFILE_SPEC redefined 184 in svr4.h. 185 CPP_SPEC, ASM_SPEC, ASM_FINAL_SPEC, LIB_SPEC, LINK_SPEC, and 186 STARTFILE_SPEC redefined in dgux.h. */ 187 188/*** Run-time Target Specification ***/ 189 190/* Names to predefine in the preprocessor for this target machine. 191 Redefined in sysv3.h, sysv4.h, dgux.h, and luna.h. */ 192#define CPP_PREDEFINES "-Dm88000 -Dm88k -Dunix -D__CLASSIFY_TYPE__=2" 193 194#define TARGET_VERSION fprintf (stderr, " (%s%s)", \ 195 VERSION_INFO1, VERSION_INFO2) 196 197/* Print subsidiary information on the compiler version in use. 198 Redefined in sysv4.h, and luna.h. */ 199#define VERSION_INFO1 "m88k, " 200#ifndef VERSION_INFO2 201#define VERSION_INFO2 "$Revision: 1.1 $" 202#endif 203 204#ifndef VERSION_STRING 205#define VERSION_STRING version_string 206#ifdef __STDC__ 207#define TM_RCS_ID "@(#)" __FILE__ " $Revision: 1.1 $ " __DATE__ 208#else 209#define TM_RCS_ID "$What: <@(#) m88k.h,v 1.1.1.2.2.2> $" 210#endif /* __STDC__ */ 211#else 212#define TM_RCS_ID "@(#)" __FILE__ " " VERSION_INFO2 " " __DATE__ 213#endif /* VERSION_STRING */ 214 215/* Run-time compilation parameters selecting different hardware subsets. */ 216 217/* Macro to define tables used to set the flags. 218 This is a list in braces of pairs in braces, 219 each pair being { "NAME", VALUE } 220 where VALUE is the bits to set or minus the bits to clear. 221 An empty string NAME is used to identify the default VALUE. */ 222 223#define MASK_88100 0x00000001 /* Target m88100 */ 224#define MASK_88110 0x00000002 /* Target m88110 */ 225#define MASK_88000 (MASK_88100 | MASK_88110) 226 227#define MASK_OCS_DEBUG_INFO 0x00000004 /* Emit .tdesc info */ 228#define MASK_OCS_FRAME_POSITION 0x00000008 /* Debug frame = CFA, not r30 */ 229#define MASK_SVR4 0x00000010 /* Target is AT&T System V.4 */ 230#define MASK_SVR3 0x00000020 /* Target is AT&T System V.3 */ 231#define MASK_NO_UNDERSCORES 0x00000040 /* Don't emit a leading `_' */ 232#define MASK_BIG_PIC 0x00000080 /* PIC with large got-rel's -fPIC */ 233#define MASK_TRAP_LARGE_SHIFT 0x00000100 /* Trap if shift not <= 31 */ 234#define MASK_HANDLE_LARGE_SHIFT 0x00000200 /* Handle shift count >= 32 */ 235#define MASK_CHECK_ZERO_DIV 0x00000400 /* Check for int div. by 0 */ 236#define MASK_USE_DIV 0x00000800 /* No signed div. checks */ 237#define MASK_IDENTIFY_REVISION 0x00001000 /* Emit ident, with GCC rev */ 238#define MASK_WARN_PASS_STRUCT 0x00002000 /* Warn about passed structs */ 239#define MASK_OPTIMIZE_ARG_AREA 0x00004000 /* Save stack space */ 240#define MASK_NO_SERIALIZE_VOLATILE 0x00008000 /* Serialize volatile refs */ 241#define MASK_EITHER_LARGE_SHIFT (MASK_TRAP_LARGE_SHIFT | \ 242 MASK_HANDLE_LARGE_SHIFT) 243#define MASK_OMIT_LEAF_FRAME_POINTER 0x00020000 /* omit leaf frame pointers */ 244 245 246#define TARGET_88100 ((target_flags & MASK_88000) == MASK_88100) 247#define TARGET_88110 ((target_flags & MASK_88000) == MASK_88110) 248#define TARGET_88000 ((target_flags & MASK_88000) == MASK_88000) 249 250#define TARGET_OCS_DEBUG_INFO (target_flags & MASK_OCS_DEBUG_INFO) 251#define TARGET_OCS_FRAME_POSITION (target_flags & MASK_OCS_FRAME_POSITION) 252#define TARGET_SVR4 (target_flags & MASK_SVR4) 253#define TARGET_SVR3 (target_flags & MASK_SVR3) 254#define TARGET_NO_UNDERSCORES (target_flags & MASK_NO_UNDERSCORES) 255#define TARGET_BIG_PIC (target_flags & MASK_BIG_PIC) 256#define TARGET_TRAP_LARGE_SHIFT (target_flags & MASK_TRAP_LARGE_SHIFT) 257#define TARGET_HANDLE_LARGE_SHIFT (target_flags & MASK_HANDLE_LARGE_SHIFT) 258#define TARGET_CHECK_ZERO_DIV (target_flags & MASK_CHECK_ZERO_DIV) 259#define TARGET_USE_DIV (target_flags & MASK_USE_DIV) 260#define TARGET_IDENTIFY_REVISION (target_flags & MASK_IDENTIFY_REVISION) 261#define TARGET_WARN_PASS_STRUCT (target_flags & MASK_WARN_PASS_STRUCT) 262#define TARGET_OPTIMIZE_ARG_AREA (target_flags & MASK_OPTIMIZE_ARG_AREA) 263#define TARGET_SERIALIZE_VOLATILE (!(target_flags & MASK_NO_SERIALIZE_VOLATILE)) 264 265#define TARGET_EITHER_LARGE_SHIFT (target_flags & MASK_EITHER_LARGE_SHIFT) 266#define TARGET_OMIT_LEAF_FRAME_POINTER (target_flags & MASK_OMIT_LEAF_FRAME_POINTER) 267 268/* Redefined in sysv3.h, sysv4.h, and dgux.h. */ 269#define TARGET_DEFAULT (MASK_CHECK_ZERO_DIV) 270#define CPU_DEFAULT MASK_88100 271 272#define TARGET_SWITCHES \ 273 { \ 274 { "88110", MASK_88110 }, \ 275 { "88100", MASK_88100 }, \ 276 { "88000", MASK_88000 }, \ 277 { "ocs-debug-info", MASK_OCS_DEBUG_INFO }, \ 278 { "no-ocs-debug-info", -MASK_OCS_DEBUG_INFO }, \ 279 { "ocs-frame-position", MASK_OCS_FRAME_POSITION }, \ 280 { "no-ocs-frame-position", -MASK_OCS_FRAME_POSITION }, \ 281 { "svr4", MASK_SVR4 }, \ 282 { "svr3", -MASK_SVR4 }, \ 283 { "no-underscores", MASK_NO_UNDERSCORES }, \ 284 { "big-pic", MASK_BIG_PIC }, \ 285 { "trap-large-shift", MASK_TRAP_LARGE_SHIFT }, \ 286 { "handle-large-shift", MASK_HANDLE_LARGE_SHIFT }, \ 287 { "check-zero-division", MASK_CHECK_ZERO_DIV }, \ 288 { "no-check-zero-division", -MASK_CHECK_ZERO_DIV }, \ 289 { "use-div-instruction", MASK_USE_DIV }, \ 290 { "identify-revision", MASK_IDENTIFY_REVISION }, \ 291 { "warn-passed-structs", MASK_WARN_PASS_STRUCT }, \ 292 { "optimize-arg-area", MASK_OPTIMIZE_ARG_AREA }, \ 293 { "no-optimize-arg-area", -MASK_OPTIMIZE_ARG_AREA }, \ 294 { "no-serialize-volatile", MASK_NO_SERIALIZE_VOLATILE }, \ 295 { "serialize-volatile", -MASK_NO_SERIALIZE_VOLATILE }, \ 296 { "omit-leaf-frame-pointer", MASK_OMIT_LEAF_FRAME_POINTER }, \ 297 { "no-omit-leaf-frame-pointer", -MASK_OMIT_LEAF_FRAME_POINTER }, \ 298 SUBTARGET_SWITCHES \ 299 /* Default switches */ \ 300 { "", TARGET_DEFAULT }, \ 301 } 302 303/* Redefined in dgux.h. */ 304#define SUBTARGET_SWITCHES 305 306/* Macro to define table for command options with values. */ 307 308#define TARGET_OPTIONS { { "short-data-", &m88k_short_data }, \ 309 { "version-", &m88k_version } } 310 311/* Do any checking or such that is needed after processing the -m switches. */ 312 313#define OVERRIDE_OPTIONS \ 314 do { \ 315 register int i; \ 316 \ 317 if ((target_flags & MASK_88000) == 0) \ 318 target_flags |= CPU_DEFAULT; \ 319 \ 320 if (TARGET_88110) \ 321 { \ 322 target_flags |= MASK_USE_DIV; \ 323 target_flags &= ~MASK_CHECK_ZERO_DIV; \ 324 } \ 325 \ 326 m88k_cpu = (TARGET_88000 ? PROCESSOR_M88000 \ 327 : (TARGET_88100 ? PROCESSOR_M88100 : PROCESSOR_M88110)); \ 328 \ 329 if (TARGET_BIG_PIC) \ 330 flag_pic = 2; \ 331 \ 332 if ((target_flags & MASK_EITHER_LARGE_SHIFT) == MASK_EITHER_LARGE_SHIFT) \ 333 error ("-mtrap-large-shift and -mhandle-large-shift are incompatible");\ 334 \ 335 if (TARGET_SVR4) \ 336 { \ 337 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) \ 338 reg_names[i]--; \ 339 m88k_pound_sign = "#"; \ 340 } \ 341 else \ 342 { \ 343 target_flags |= MASK_SVR3; \ 344 target_flags &= ~MASK_SVR4; \ 345 } \ 346 \ 347 if (m88k_short_data) \ 348 { \ 349 char *p = m88k_short_data; \ 350 while (*p) \ 351 if (*p >= '0' && *p <= '9') \ 352 p++; \ 353 else \ 354 { \ 355 error ("Invalid option `-mshort-data-%s'", m88k_short_data); \ 356 break; \ 357 } \ 358 m88k_gp_threshold = atoi (m88k_short_data); \ 359 if (m88k_gp_threshold > 0x7fffffff) \ 360 error ("-mshort-data-%s is too large ", m88k_short_data); \ 361 if (flag_pic) \ 362 error ("-mshort-data-%s and PIC are incompatible", m88k_short_data); \ 363 } \ 364 if (TARGET_OMIT_LEAF_FRAME_POINTER) /* keep nonleaf frame pointers */ \ 365 flag_omit_frame_pointer = 1; \ 366 } while (0) 367 368/*** Storage Layout ***/ 369 370/* Sizes in bits of the various types. */ 371#define CHAR_TYPE_SIZE 8 372#define SHORT_TYPE_SIZE 16 373#define INT_TYPE_SIZE 32 374#define LONG_TYPE_SIZE 32 375#define LONG_LONG_TYPE_SIZE 64 376#define FLOAT_TYPE_SIZE 32 377#define DOUBLE_TYPE_SIZE 64 378#define LONG_DOUBLE_TYPE_SIZE 64 379 380/* Define this if most significant bit is lowest numbered 381 in instructions that operate on numbered bit-fields. 382 Somewhat arbitrary. It matches the bit field patterns. */ 383#define BITS_BIG_ENDIAN 1 384 385/* Define this if most significant byte of a word is the lowest numbered. 386 That is true on the m88000. */ 387#define BYTES_BIG_ENDIAN 1 388 389/* Define this if most significant word of a multiword number is the lowest 390 numbered. 391 For the m88000 we can decide arbitrarily since there are no machine 392 instructions for them. */ 393#define WORDS_BIG_ENDIAN 1 394 395/* Number of bits in an addressable storage unit */ 396#define BITS_PER_UNIT 8 397 398/* Width in bits of a "word", which is the contents of a machine register. 399 Note that this is not necessarily the width of data type `int'; 400 if using 16-bit ints on a 68000, this would still be 32. 401 But on a machine with 16-bit registers, this would be 16. */ 402#define BITS_PER_WORD 32 403 404/* Width of a word, in units (bytes). */ 405#define UNITS_PER_WORD 4 406 407/* Width in bits of a pointer. 408 See also the macro `Pmode' defined below. */ 409#define POINTER_SIZE 32 410 411/* Allocation boundary (in *bits*) for storing arguments in argument list. */ 412#define PARM_BOUNDARY 32 413 414/* Largest alignment for stack parameters (if greater than PARM_BOUNDARY). */ 415#define MAX_PARM_BOUNDARY 64 416 417/* Boundary (in *bits*) on which stack pointer should be aligned. */ 418#define STACK_BOUNDARY 128 419 420/* Allocation boundary (in *bits*) for the code of a function. On the 421 m88100, it is desirable to align to a cache line. However, SVR3 targets 422 only provided 8 byte alignment. The m88110 cache is small, so align 423 to an 8 byte boundary. Pack code tightly when compiling crtstuff.c. */ 424#define FUNCTION_BOUNDARY (flag_inhibit_size_directive ? 32 : \ 425 (TARGET_88100 && TARGET_SVR4 ? 128 : 64)) 426 427/* No data type wants to be aligned rounder than this. */ 428#define BIGGEST_ALIGNMENT 64 429 430/* The best alignment to use in cases where we have a choice. */ 431#define FASTEST_ALIGNMENT (TARGET_88100 ? 32 : 64) 432 433/* Make strings 4/8 byte aligned so strcpy from constants will be faster. */ 434#define CONSTANT_ALIGNMENT(EXP, ALIGN) \ 435 ((TREE_CODE (EXP) == STRING_CST \ 436 && (ALIGN) < FASTEST_ALIGNMENT) \ 437 ? FASTEST_ALIGNMENT : (ALIGN)) 438 439/* Make arrays of chars 4/8 byte aligned for the same reasons. */ 440#define DATA_ALIGNMENT(TYPE, ALIGN) \ 441 (TREE_CODE (TYPE) == ARRAY_TYPE \ 442 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ 443 && (ALIGN) < FASTEST_ALIGNMENT ? FASTEST_ALIGNMENT : (ALIGN)) 444 445/* Alignment of field after `int : 0' in a structure. 446 Ignored with PCC_BITFIELD_TYPE_MATTERS. */ 447/* #define EMPTY_FIELD_BOUNDARY 8 */ 448 449/* Every structure's size must be a multiple of this. */ 450#define STRUCTURE_SIZE_BOUNDARY 8 451 452/* Set this nonzero if move instructions will actually fail to work 453 when given unaligned data. */ 454#define STRICT_ALIGNMENT 1 455 456/* A bitfield declared as `int' forces `int' alignment for the struct. */ 457#define PCC_BITFIELD_TYPE_MATTERS 1 458 459/* Maximum size (in bits) to use for the largest integral type that 460 replaces a BLKmode type. */ 461/* #define MAX_FIXED_MODE_SIZE 0 */ 462 463/* Check a `double' value for validity for a particular machine mode. 464 This is defined to avoid crashes outputting certain constants. 465 Since we output the number in hex, the assembler won't choke on it. */ 466/* #define CHECK_FLOAT_VALUE(MODE,VALUE) */ 467 468/* A code distinguishing the floating point format of the target machine. */ 469/* #define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT */ 470 471/*** Register Usage ***/ 472 473/* Number of actual hardware registers. 474 The hardware registers are assigned numbers for the compiler 475 from 0 to just below FIRST_PSEUDO_REGISTER. 476 All registers that the compiler knows about must be given numbers, 477 even those that are not normally considered general registers. 478 479 The m88100 has a General Register File (GRF) of 32 32-bit registers. 480 The m88110 adds an Extended Register File (XRF) of 32 80-bit registers. */ 481#define FIRST_PSEUDO_REGISTER 64 482#define FIRST_EXTENDED_REGISTER 32 483 484/* General notes on extended registers, their use and misuse. 485 486 Possible good uses: 487 488 spill area instead of memory. 489 -waste if only used once 490 491 floating point calculations 492 -probably a waste unless we have run out of general purpose registers 493 494 freeing up general purpose registers 495 -e.g. may be able to have more loop invariants if floating 496 point is moved into extended registers. 497 498 499 I've noticed wasteful moves into and out of extended registers; e.g. a load 500 into x21, then inside a loop a move into r24, then r24 used as input to 501 an fadd. Why not just load into r24 to begin with? Maybe the new cse.c 502 will address this. This wastes a move, but the load,store and move could 503 have been saved had extended registers been used throughout. 504 E.g. in the code following code, if z and xz are placed in extended 505 registers, there is no need to save preserve registers. 506 507 long c=1,d=1,e=1,f=1,g=1,h=1,i=1,j=1,k; 508 509 double z=0,xz=4.5; 510 511 foo(a,b) 512 long a,b; 513 { 514 while (a < b) 515 { 516 k = b + c + d + e + f + g + h + a + i + j++; 517 z += xz; 518 a++; 519 } 520 printf("k= %d; z=%f;\n", k, z); 521 } 522 523 I've found that it is possible to change the constraints (putting * before 524 the 'r' constraints int the fadd.ddd instruction) and get the entire 525 addition and store to go into extended registers. However, this also 526 forces simple addition and return of floating point arguments to a 527 function into extended registers. Not the correct solution. 528 529 Found the following note in local-alloc.c which may explain why I can't 530 get both registers to be in extended registers since two are allocated in 531 local-alloc and one in global-alloc. Doesn't explain (I don't believe) 532 why an extended register is used instead of just using the preserve 533 register. 534 535 from local-alloc.c: 536 We have provision to exempt registers, even when they are contained 537 within the block, that can be tied to others that are not contained in it. 538 This is so that global_alloc could process them both and tie them then. 539 But this is currently disabled since tying in global_alloc is not 540 yet implemented. 541 542 The explanation of why the preserved register is not used is as follows, 543 I believe. The registers are being allocated in order. Tying is not 544 done so efficiently, so when it comes time to do the first allocation, 545 there are no registers left to use without spilling except extended 546 registers. Then when the next pseudo register needs a hard reg, there 547 are still no registers to be had for free, but this one must be a GRF 548 reg instead of an extended reg, so a preserve register is spilled. Thus 549 the move from extended to GRF is necessitated. I do not believe this can 550 be 'fixed' through the files in config/m88k. 551 552 gcc seems to sometimes make worse use of register allocation -- not counting 553 moves -- whenever extended registers are present. For example in the 554 whetstone, the simple for loop (slightly modified) 555 for(i = 1; i <= n1; i++) 556 { 557 x1 = (x1 + x2 + x3 - x4) * t; 558 x2 = (x1 + x2 - x3 + x4) * t; 559 x3 = (x1 - x2 + x3 + x4) * t; 560 x4 = (x1 + x2 + x3 + x4) * t; 561 } 562 in general loads the high bits of the addresses of x2-x4 and i into registers 563 outside the loop. Whenever extended registers are used, it loads all of 564 these inside the loop. My conjecture is that since the 88110 has so many 565 registers, and gcc makes no distinction at this point -- just that they are 566 not fixed, that in loop.c it believes it can expect a number of registers 567 to be available. Then it allocates 'too many' in local-alloc which causes 568 problems later. 'Too many' are allocated because a large portion of the 569 registers are extended registers and cannot be used for certain purposes 570 ( e.g. hold the address of a variable). When this loop is compiled on its 571 own, the problem does not occur. I don't know the solution yet, though it 572 is probably in the base sources. Possibly a different way to calculate 573 "threshold". */ 574 575/* 1 for registers that have pervasive standard uses and are not available 576 for the register allocator. Registers r14-r25 and x22-x29 are expected 577 to be preserved across function calls. 578 579 On the 88000, the standard uses of the General Register File (GRF) are: 580 Reg 0 = Pseudo argument pointer (hardware fixed to 0). 581 Reg 1 = Subroutine return pointer (hardware). 582 Reg 2-9 = Parameter registers (OCS). 583 Reg 10 = OCS reserved temporary. 584 Reg 11 = Static link if needed [OCS reserved temporary]. 585 Reg 12 = Address of structure return (OCS). 586 Reg 13 = OCS reserved temporary. 587 Reg 14-25 = Preserved register set. 588 Reg 26-29 = Reserved by OCS and ABI. 589 Reg 30 = Frame pointer (Common use). 590 Reg 31 = Stack pointer. 591 592 The following follows the current 88open UCS specification for the 593 Extended Register File (XRF): 594 Reg 32 = x0 Always equal to zero 595 Reg 33-53 = x1-x21 Temporary registers (Caller Save) 596 Reg 54-61 = x22-x29 Preserver registers (Callee Save) 597 Reg 62-63 = x30-x31 Reserved for future ABI use. 598 599 Note: The current 88110 extended register mapping is subject to change. 600 The bias towards caller-save registers is based on the 601 presumption that memory traffic can potentially be reduced by 602 allowing the "caller" to save only that part of the register 603 which is actually being used. (i.e. don't do a st.x if a st.d 604 is sufficient). Also, in scientific code (a.k.a. Fortran), the 605 large number of variables defined in common blocks may require 606 that almost all registers be saved across calls anyway. */ 607 608#define FIXED_REGISTERS \ 609 {1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 610 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \ 611 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 612 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1} 613 614/* 1 for registers not available across function calls. 615 These must include the FIXED_REGISTERS and also any 616 registers that can be used without being saved. 617 The latter must include the registers where values are returned 618 and the register where structure-value addresses are passed. 619 Aside from that, you can include as many other registers as you like. */ 620 621#define CALL_USED_REGISTERS \ 622 {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, \ 623 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \ 624 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ 625 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1} 626 627/* Macro to conditionally modify fixed_regs/call_used_regs. */ 628#define CONDITIONAL_REGISTER_USAGE \ 629 { \ 630 if (! TARGET_88110) \ 631 { \ 632 register int i; \ 633 for (i = FIRST_EXTENDED_REGISTER; i < FIRST_PSEUDO_REGISTER; i++) \ 634 { \ 635 fixed_regs[i] = 1; \ 636 call_used_regs[i] = 1; \ 637 } \ 638 } \ 639 if (flag_pic) \ 640 { \ 641 /* Current hack to deal with -fpic -O2 problems. */ \ 642 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ 643 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ 644 global_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ 645 } \ 646 } 647 648/* These interfaces that don't apply to the m88000. */ 649/* OVERLAPPING_REGNO_P(REGNO) 0 */ 650/* INSN_CLOBBERS_REGNO_P(INSN, REGNO) 0 */ 651 652/* True if register is an extended register. */ 653#define XRF_REGNO_P(N) ((N) < FIRST_PSEUDO_REGISTER && (N) >= FIRST_EXTENDED_REGISTER) 654 655/* Return number of consecutive hard regs needed starting at reg REGNO 656 to hold something of mode MODE. 657 This is ordinarily the length in words of a value of mode MODE 658 but can be less for certain modes in special long registers. 659 660 On the m88000, GRF registers hold 32-bits and XRF registers hold 80-bits. 661 An XRF register can hold any mode, but two GRF registers are required 662 for larger modes. */ 663#define HARD_REGNO_NREGS(REGNO, MODE) \ 664 (XRF_REGNO_P (REGNO) \ 665 ? 1 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) 666 667/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. 668 669 For double integers, we never put the value into an odd register so that 670 the operators don't run into the situation where the high part of one of 671 the inputs is the low part of the result register. (It's ok if the output 672 registers are the same as the input registers.) The XRF registers can 673 hold all modes, but only DF and SF modes can be manipulated in these 674 registers. The compiler should be allowed to use these as a fast spill 675 area. */ 676#define HARD_REGNO_MODE_OK(REGNO, MODE) \ 677 (XRF_REGNO_P(REGNO) \ 678 ? (TARGET_88110 && GET_MODE_CLASS (MODE) == MODE_FLOAT) \ 679 : (((MODE) != DImode && (MODE) != DFmode && (MODE) != DCmode) \ 680 || ((REGNO) & 1) == 0)) 681 682/* Value is 1 if it is a good idea to tie two pseudo registers 683 when one has mode MODE1 and one has mode MODE2. 684 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, 685 for any hard reg, then this must be 0 for correct output. */ 686#define MODES_TIEABLE_P(MODE1, MODE2) \ 687 (((MODE1) == DFmode || (MODE1) == DCmode || (MODE1) == DImode \ 688 || (TARGET_88110 && GET_MODE_CLASS (MODE1) == MODE_FLOAT)) \ 689 == ((MODE2) == DFmode || (MODE2) == DCmode || (MODE2) == DImode \ 690 || (TARGET_88110 && GET_MODE_CLASS (MODE2) == MODE_FLOAT))) 691 692/* Specify the registers used for certain standard purposes. 693 The values of these macros are register numbers. */ 694 695/* the m88000 pc isn't overloaded on a register that the compiler knows about. */ 696/* #define PC_REGNUM */ 697 698/* Register to use for pushing function arguments. */ 699#define STACK_POINTER_REGNUM 31 700 701/* Base register for access to local variables of the function. */ 702#define FRAME_POINTER_REGNUM 30 703 704/* Base register for access to arguments of the function. */ 705#define ARG_POINTER_REGNUM 0 706 707/* Register used in cases where a temporary is known to be safe to use. */ 708#define TEMP_REGNUM 10 709 710/* Register in which static-chain is passed to a function. */ 711#define STATIC_CHAIN_REGNUM 11 712 713/* Register in which address to store a structure value 714 is passed to a function. */ 715#define STRUCT_VALUE_REGNUM 12 716 717/* Register to hold the addressing base for position independent 718 code access to data items. */ 719#define PIC_OFFSET_TABLE_REGNUM 25 720 721/* Order in which registers are preferred (most to least). Use temp 722 registers, then param registers top down. Preserve registers are 723 top down to maximize use of double memory ops for register save. 724 The 88open reserved registers (r26-r29 and x30-x31) may commonly be used 725 in most environments with the -fcall-used- or -fcall-saved- options. */ 726#define REG_ALLOC_ORDER \ 727 { \ 728 13, 12, 11, 10, 29, 28, 27, 26, \ 729 62, 63, 9, 8, 7, 6, 5, 4, \ 730 3, 2, 1, 53, 52, 51, 50, 49, \ 731 48, 47, 46, 45, 44, 43, 42, 41, \ 732 40, 39, 38, 37, 36, 35, 34, 33, \ 733 25, 24, 23, 22, 21, 20, 19, 18, \ 734 17, 16, 15, 14, 61, 60, 59, 58, \ 735 57, 56, 55, 54, 30, 31, 0, 32} 736 737/* Order for leaf functions. */ 738#define REG_LEAF_ALLOC_ORDER \ 739 { \ 740 9, 8, 7, 6, 13, 12, 11, 10, \ 741 29, 28, 27, 26, 62, 63, 5, 4, \ 742 3, 2, 0, 53, 52, 51, 50, 49, \ 743 48, 47, 46, 45, 44, 43, 42, 41, \ 744 40, 39, 38, 37, 36, 35, 34, 33, \ 745 25, 24, 23, 22, 21, 20, 19, 18, \ 746 17, 16, 15, 14, 61, 60, 59, 58, \ 747 57, 56, 55, 54, 30, 31, 1, 32} 748 749/* Switch between the leaf and non-leaf orderings. The purpose is to avoid 750 write-over scoreboard delays between caller and callee. */ 751#define ORDER_REGS_FOR_LOCAL_ALLOC \ 752{ \ 753 static int leaf[] = REG_LEAF_ALLOC_ORDER; \ 754 static int nonleaf[] = REG_ALLOC_ORDER; \ 755 \ 756 bcopy (regs_ever_live[1] ? nonleaf : leaf, reg_alloc_order, \ 757 FIRST_PSEUDO_REGISTER * sizeof (int)); \ 758} 759 760/*** Register Classes ***/ 761 762/* Define the classes of registers for register constraints in the 763 machine description. Also define ranges of constants. 764 765 One of the classes must always be named ALL_REGS and include all hard regs. 766 If there is more than one class, another class must be named NO_REGS 767 and contain no registers. 768 769 The name GENERAL_REGS must be the name of a class (or an alias for 770 another name such as ALL_REGS). This is the class of registers 771 that is allowed by "g" or "r" in a register constraint. 772 Also, registers outside this class are allocated only when 773 instructions express preferences for them. 774 775 The classes must be numbered in nondecreasing order; that is, 776 a larger-numbered class must never be contained completely 777 in a smaller-numbered class. 778 779 For any two classes, it is very desirable that there be another 780 class that represents their union. */ 781 782/* The m88000 hardware has two kinds of registers. In addition, we denote 783 the arg pointer as a separate class. */ 784 785enum reg_class { NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS, AGRF_REGS, 786 XGRF_REGS, ALL_REGS, LIM_REG_CLASSES }; 787 788#define N_REG_CLASSES (int) LIM_REG_CLASSES 789 790/* Give names of register classes as strings for dump file. */ 791#define REG_CLASS_NAMES {"NO_REGS", "AP_REG", "XRF_REGS", "GENERAL_REGS", \ 792 "AGRF_REGS", "XGRF_REGS", "ALL_REGS" } 793 794/* Define which registers fit in which classes. 795 This is an initializer for a vector of HARD_REG_SET 796 of length N_REG_CLASSES. */ 797#define REG_CLASS_CONTENTS {{0x00000000, 0x00000000}, \ 798 {0x00000001, 0x00000000}, \ 799 {0x00000000, 0xffffffff}, \ 800 {0xfffffffe, 0x00000000}, \ 801 {0xffffffff, 0x00000000}, \ 802 {0xfffffffe, 0xffffffff}, \ 803 {0xffffffff, 0xffffffff}} 804 805/* The same information, inverted: 806 Return the class number of the smallest class containing 807 reg number REGNO. This could be a conditional expression 808 or could index an array. */ 809#define REGNO_REG_CLASS(REGNO) \ 810 ((REGNO) ? ((REGNO < 32) ? GENERAL_REGS : XRF_REGS) : AP_REG) 811 812/* The class value for index registers, and the one for base regs. */ 813#define BASE_REG_CLASS AGRF_REGS 814#define INDEX_REG_CLASS GENERAL_REGS 815 816/* Get reg_class from a letter such as appears in the machine description. 817 For the 88000, the following class/letter is defined for the XRF: 818 x - Extended register file */ 819#define REG_CLASS_FROM_LETTER(C) \ 820 (((C) == 'x') ? XRF_REGS : NO_REGS) 821 822/* Macros to check register numbers against specific register classes. 823 These assume that REGNO is a hard or pseudo reg number. 824 They give nonzero only if REGNO is a hard reg of the suitable class 825 or a pseudo reg currently allocated to a suitable hard reg. 826 Since they use reg_renumber, they are safe only once reg_renumber 827 has been allocated, which happens in local-alloc.c. */ 828#define REGNO_OK_FOR_BASE_P(REGNO) \ 829 ((REGNO) < FIRST_EXTENDED_REGISTER \ 830 || (unsigned) reg_renumber[REGNO] < FIRST_EXTENDED_REGISTER) 831#define REGNO_OK_FOR_INDEX_P(REGNO) \ 832 (((REGNO) && (REGNO) < FIRST_EXTENDED_REGISTER) \ 833 || (unsigned) reg_renumber[REGNO] < FIRST_EXTENDED_REGISTER) 834 835/* Given an rtx X being reloaded into a reg required to be 836 in class CLASS, return the class of reg to actually use. 837 In general this is just CLASS; but on some machines 838 in some cases it is preferable to use a more restrictive class. 839 Double constants should be in a register iff they can be made cheaply. */ 840#define PREFERRED_RELOAD_CLASS(X,CLASS) \ 841 (CONSTANT_P(X) && (CLASS == XRF_REGS) ? NO_REGS : (CLASS)) 842 843/* Return the register class of a scratch register needed to load IN 844 into a register of class CLASS in MODE. On the m88k, when PIC, we 845 need a temporary when loading some addresses into a register. */ 846#define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, IN) \ 847 ((flag_pic \ 848 && GET_CODE (IN) == CONST \ 849 && GET_CODE (XEXP (IN, 0)) == PLUS \ 850 && GET_CODE (XEXP (XEXP (IN, 0), 0)) == CONST_INT \ 851 && ! SMALL_INT (XEXP (XEXP (IN, 0), 1))) ? GENERAL_REGS : NO_REGS) 852 853/* Return the maximum number of consecutive registers 854 needed to represent mode MODE in a register of class CLASS. */ 855#define CLASS_MAX_NREGS(CLASS, MODE) \ 856 ((((CLASS) == XRF_REGS) ? 1 \ 857 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))) 858 859/* Letters in the range `I' through `P' in a register constraint string can 860 be used to stand for particular ranges of immediate operands. The C 861 expression is true iff C is a known letter and VALUE is appropriate for 862 that letter. 863 864 For the m88000, the following constants are used: 865 `I' requires a non-negative 16-bit value. 866 `J' requires a non-positive 16-bit value. 867 `K' requires a non-negative value < 32. 868 `L' requires a constant with only the upper 16-bits set. 869 `M' requires constant values that can be formed with `set'. 870 `N' requires a negative value. 871 `O' requires zero. 872 `P' requires a non-negative value. */ 873 874/* Quick tests for certain values. */ 875#define SMALL_INT(X) (SMALL_INTVAL (INTVAL (X))) 876#define SMALL_INTVAL(I) ((unsigned) (I) < 0x10000) 877#define ADD_INT(X) (ADD_INTVAL (INTVAL (X))) 878#define ADD_INTVAL(I) ((unsigned) (I) + 0xffff < 0x1ffff) 879#define POWER_OF_2(I) ((I) && POWER_OF_2_or_0(I)) 880#define POWER_OF_2_or_0(I) (((I) & ((unsigned)(I) - 1)) == 0) 881 882#define CONST_OK_FOR_LETTER_P(VALUE, C) \ 883 ((C) == 'I' ? SMALL_INTVAL (VALUE) \ 884 : (C) == 'J' ? SMALL_INTVAL (-(VALUE)) \ 885 : (C) == 'K' ? (unsigned)(VALUE) < 32 \ 886 : (C) == 'L' ? ((VALUE) & 0xffff) == 0 \ 887 : (C) == 'M' ? integer_ok_for_set (VALUE) \ 888 : (C) == 'N' ? (VALUE) < 0 \ 889 : (C) == 'O' ? (VALUE) == 0 \ 890 : (C) == 'P' ? (VALUE) >= 0 \ 891 : 0) 892 893/* Similar, but for floating constants, and defining letters G and H. 894 Here VALUE is the CONST_DOUBLE rtx itself. For the m88000, the 895 constraints are: `G' requires zero, and `H' requires one or two. */ 896#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ 897 ((C) == 'G' ? (CONST_DOUBLE_HIGH (VALUE) == 0 \ 898 && CONST_DOUBLE_LOW (VALUE) == 0) \ 899 : 0) 900 901/* Letters in the range `Q' through `U' in a register constraint string 902 may be defined in a machine-dependent fashion to stand for arbitrary 903 operand types. 904 905 For the m88k, `Q' handles addresses in a call context. */ 906 907#define EXTRA_CONSTRAINT(OP, C) \ 908 ((C) == 'Q' ? symbolic_address_p (OP) : 0) 909 910/*** Describing Stack Layout ***/ 911 912/* Define this if pushing a word on the stack moves the stack pointer 913 to a smaller address. */ 914#define STACK_GROWS_DOWNWARD 915 916/* Define this if the addresses of local variable slots are at negative 917 offsets from the frame pointer. */ 918/* #define FRAME_GROWS_DOWNWARD */ 919 920/* Offset from the frame pointer to the first local variable slot to be 921 allocated. For the m88k, the debugger wants the return address (r1) 922 stored at location r30+4, and the previous frame pointer stored at 923 location r30. */ 924#define STARTING_FRAME_OFFSET 8 925 926/* If we generate an insn to push BYTES bytes, this says how many the 927 stack pointer really advances by. The m88k has no push instruction. */ 928/* #define PUSH_ROUNDING(BYTES) */ 929 930/* If defined, the maximum amount of space required for outgoing arguments 931 will be computed and placed into the variable 932 `current_function_outgoing_args_size'. No space will be pushed 933 onto the stack for each call; instead, the function prologue should 934 increase the stack frame size by this amount. */ 935#define ACCUMULATE_OUTGOING_ARGS 936 937/* Offset from the stack pointer register to the first location at which 938 outgoing arguments are placed. Use the default value zero. */ 939/* #define STACK_POINTER_OFFSET 0 */ 940 941/* Offset of first parameter from the argument pointer register value. 942 Using an argument pointer, this is 0 for the m88k. GCC knows 943 how to eliminate the argument pointer references if necessary. */ 944#define FIRST_PARM_OFFSET(FNDECL) 0 945 946/* Define this if functions should assume that stack space has been 947 allocated for arguments even when their values are passed in 948 registers. 949 950 The value of this macro is the size, in bytes, of the area reserved for 951 arguments passed in registers. 952 953 This space can either be allocated by the caller or be a part of the 954 machine-dependent stack frame: `OUTGOING_REG_PARM_STACK_SPACE' 955 says which. */ 956#define REG_PARM_STACK_SPACE(FNDECL) 32 957 958/* Define this macro if REG_PARM_STACK_SPACE is defined but stack 959 parameters don't skip the area specified by REG_PARM_STACK_SPACE. 960 Normally, when a parameter is not passed in registers, it is placed on 961 the stack beyond the REG_PARM_STACK_SPACE area. Defining this macro 962 suppresses this behavior and causes the parameter to be passed on the 963 stack in its natural location. */ 964#define STACK_PARMS_IN_REG_PARM_AREA 965 966/* Define this if it is the responsibility of the caller to allocate the 967 area reserved for arguments passed in registers. If 968 `ACCUMULATE_OUTGOING_ARGS' is also defined, the only effect of this 969 macro is to determine whether the space is included in 970 `current_function_outgoing_args_size'. */ 971/* #define OUTGOING_REG_PARM_STACK_SPACE */ 972 973/* Offset from the stack pointer register to an item dynamically allocated 974 on the stack, e.g., by `alloca'. 975 976 The default value for this macro is `STACK_POINTER_OFFSET' plus the 977 length of the outgoing arguments. The default is correct for most 978 machines. See `function.c' for details. */ 979/* #define STACK_DYNAMIC_OFFSET(FUNDECL) ... */ 980 981/* Value is the number of bytes of arguments automatically 982 popped when returning from a subroutine call. 983 FUNDECL is the declaration node of the function (as a tree), 984 FUNTYPE is the data type of the function (as a tree), 985 or for a library call it is an identifier node for the subroutine name. 986 SIZE is the number of bytes of arguments passed on the stack. */ 987#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0 988 989/* Define how to find the value returned by a function. 990 VALTYPE is the data type of the value (as a tree). 991 If the precise function being called is known, FUNC is its FUNCTION_DECL; 992 otherwise, FUNC is 0. */ 993#define FUNCTION_VALUE(VALTYPE, FUNC) \ 994 gen_rtx (REG, \ 995 TYPE_MODE (VALTYPE) == BLKmode ? SImode : TYPE_MODE (VALTYPE), \ 996 2) 997 998/* Define this if it differs from FUNCTION_VALUE. */ 999/* #define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) ... */ 1000 1001/* Disable the promotion of some structures and unions to registers. */ 1002#define RETURN_IN_MEMORY(TYPE) \ 1003 (TYPE_MODE (TYPE) == BLKmode \ 1004 || ((TREE_CODE (TYPE) == RECORD_TYPE || TREE_CODE(TYPE) == UNION_TYPE) \ 1005 && !(TYPE_MODE (TYPE) == SImode \ 1006 || (TYPE_MODE (TYPE) == BLKmode \ 1007 && TYPE_ALIGN (TYPE) == BITS_PER_WORD \ 1008 && int_size_in_bytes (TYPE) == UNITS_PER_WORD)))) 1009 1010/* Don't default to pcc-struct-return, because we have already specified 1011 exactly how to return structures in the RETURN_IN_MEMORY macro. */ 1012#define DEFAULT_PCC_STRUCT_RETURN 0 1013 1014/* Define how to find the value returned by a library function 1015 assuming the value has mode MODE. */ 1016#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 2) 1017 1018/* True if N is a possible register number for a function value 1019 as seen by the caller. */ 1020#define FUNCTION_VALUE_REGNO_P(N) ((N) == 2) 1021 1022/* Determine whether a function argument is passed in a register, and 1023 which register. See m88k.c. */ 1024#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ 1025 m88k_function_arg (CUM, MODE, TYPE, NAMED) 1026 1027/* Define this if it differs from FUNCTION_ARG. */ 1028/* #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) ... */ 1029 1030/* A C expression for the number of words, at the beginning of an 1031 argument, must be put in registers. The value must be zero for 1032 arguments that are passed entirely in registers or that are entirely 1033 pushed on the stack. */ 1034#define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) (0) 1035 1036/* A C expression that indicates when an argument must be passed by 1037 reference. If nonzero for an argument, a copy of that argument is 1038 made in memory and a pointer to the argument is passed instead of the 1039 argument itself. The pointer is passed in whatever way is appropriate 1040 for passing a pointer to that type. */ 1041#define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) (0) 1042 1043/* A C type for declaring a variable that is used as the first argument 1044 of `FUNCTION_ARG' and other related values. It suffices to count 1045 the number of words of argument so far. */ 1046#define CUMULATIVE_ARGS int 1047 1048/* Initialize a variable CUM of type CUMULATIVE_ARGS for a call to a 1049 function whose data type is FNTYPE. For a library call, FNTYPE is 0. */ 1050#define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) ((CUM) = 0) 1051 1052/* A C statement (sans semicolon) to update the summarizer variable 1053 CUM to advance past an argument in the argument list. The values 1054 MODE, TYPE and NAMED describe that argument. Once this is done, 1055 the variable CUM is suitable for analyzing the *following* argument 1056 with `FUNCTION_ARG', etc. (TYPE is null for libcalls where that 1057 information may not be available.) */ 1058#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ 1059 do { \ 1060 enum machine_mode __mode = (TYPE) ? TYPE_MODE (TYPE) : (MODE); \ 1061 if ((CUM & 1) \ 1062 && (__mode == DImode || __mode == DFmode \ 1063 || ((TYPE) && TYPE_ALIGN (TYPE) > BITS_PER_WORD))) \ 1064 CUM++; \ 1065 CUM += (((__mode != BLKmode) \ 1066 ? GET_MODE_SIZE (MODE) : int_size_in_bytes (TYPE)) \ 1067 + 3) / 4; \ 1068 } while (0) 1069 1070/* True if N is a possible register number for function argument passing. 1071 On the m88000, these are registers 2 through 9. */ 1072#define FUNCTION_ARG_REGNO_P(N) ((N) <= 9 && (N) >= 2) 1073 1074/* A C expression which determines whether, and in which direction, 1075 to pad out an argument with extra space. The value should be of 1076 type `enum direction': either `upward' to pad above the argument, 1077 `downward' to pad below, or `none' to inhibit padding. 1078 1079 This macro does not control the *amount* of padding; that is always 1080 just enough to reach the next multiple of `FUNCTION_ARG_BOUNDARY'. */ 1081#define FUNCTION_ARG_PADDING(MODE, TYPE) \ 1082 ((MODE) == BLKmode \ 1083 || ((TYPE) && (TREE_CODE (TYPE) == RECORD_TYPE \ 1084 || TREE_CODE (TYPE) == UNION_TYPE)) \ 1085 ? upward : GET_MODE_BITSIZE (MODE) < PARM_BOUNDARY ? downward : none) 1086 1087/* If defined, a C expression that gives the alignment boundary, in bits, 1088 of an argument with the specified mode and type. If it is not defined, 1089 `PARM_BOUNDARY' is used for all arguments. */ 1090#define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \ 1091 (((TYPE) ? TYPE_ALIGN (TYPE) : GET_MODE_BITSIZE (MODE)) <= PARM_BOUNDARY \ 1092 ? PARM_BOUNDARY : 2 * PARM_BOUNDARY) 1093 1094/* Generate necessary RTL for __builtin_saveregs(). 1095 ARGLIST is the argument list; see expr.c. */ 1096#define EXPAND_BUILTIN_SAVEREGS(ARGLIST) m88k_builtin_saveregs (ARGLIST) 1097 1098/* Generate the assembly code for function entry. */ 1099#define FUNCTION_PROLOGUE(FILE, SIZE) m88k_begin_prologue(FILE, SIZE) 1100 1101/* Perform special actions at the point where the prologue ends. */ 1102#define FUNCTION_END_PROLOGUE(FILE) m88k_end_prologue(FILE) 1103 1104/* Output assembler code to FILE to increment profiler label # LABELNO 1105 for profiling a function entry. Redefined in sysv3.h, sysv4.h and 1106 dgux.h. */ 1107#define FUNCTION_PROFILER(FILE, LABELNO) \ 1108 output_function_profiler (FILE, LABELNO, "mcount", 1) 1109 1110/* Maximum length in instructions of the code output by FUNCTION_PROFILER. */ 1111#define FUNCTION_PROFILER_LENGTH (5+3+1+5) 1112 1113/* Output assembler code to FILE to initialize basic-block profiling for 1114 the current module. LABELNO is unique to each instance. */ 1115#define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \ 1116 output_function_block_profiler (FILE, LABELNO) 1117 1118/* Maximum length in instructions of the code output by 1119 FUNCTION_BLOCK_PROFILER. */ 1120#define FUNCTION_BLOCK_PROFILER_LENGTH (3+5+2+5) 1121 1122/* Output assembler code to FILE to increment the count associated with 1123 the basic block number BLOCKNO. */ 1124#define BLOCK_PROFILER(FILE, BLOCKNO) output_block_profiler (FILE, BLOCKNO) 1125 1126/* Maximum length in instructions of the code output by BLOCK_PROFILER. */ 1127#define BLOCK_PROFILER_LENGTH 4 1128 1129/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 1130 the stack pointer does not matter. The value is tested only in 1131 functions that have frame pointers. 1132 No definition is equivalent to always zero. */ 1133#define EXIT_IGNORE_STACK (1) 1134 1135/* Generate the assembly code for function exit. */ 1136#define FUNCTION_EPILOGUE(FILE, SIZE) m88k_end_epilogue(FILE, SIZE) 1137 1138/* Perform special actions at the point where the epilogue begins. */ 1139#define FUNCTION_BEGIN_EPILOGUE(FILE) m88k_begin_epilogue(FILE) 1140 1141/* Value should be nonzero if functions must have frame pointers. 1142 Zero means the frame pointer need not be set up (and parms 1143 may be accessed via the stack pointer) in functions that seem suitable. 1144 This is computed in `reload', in reload1.c. */ 1145#define FRAME_POINTER_REQUIRED \ 1146(current_function_varargs \ 1147 || (TARGET_OMIT_LEAF_FRAME_POINTER && !leaf_function_p ()) \ 1148 || (write_symbols != NO_DEBUG && !TARGET_OCS_FRAME_POSITION)) 1149 1150/* Definitions for register eliminations. 1151 1152 We have two registers that can be eliminated on the m88k. First, the 1153 frame pointer register can often be eliminated in favor of the stack 1154 pointer register. Secondly, the argument pointer register can always be 1155 eliminated; it is replaced with either the stack or frame pointer. */ 1156 1157/* This is an array of structures. Each structure initializes one pair 1158 of eliminable registers. The "from" register number is given first, 1159 followed by "to". Eliminations of the same "from" register are listed 1160 in order of preference. */ 1161#define ELIMINABLE_REGS \ 1162{{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 1163 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ 1164 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}} 1165 1166/* Given FROM and TO register numbers, say whether this elimination 1167 is allowed. */ 1168#define CAN_ELIMINATE(FROM, TO) \ 1169 (!((FROM) == FRAME_POINTER_REGNUM && FRAME_POINTER_REQUIRED)) 1170 1171/* Define the offset between two registers, one to be eliminated, and the other 1172 its replacement, at the start of a routine. */ 1173#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ 1174{ m88k_layout_frame (); \ 1175 if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \ 1176 (OFFSET) = m88k_fp_offset; \ 1177 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \ 1178 (OFFSET) = m88k_stack_size - m88k_fp_offset; \ 1179 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \ 1180 (OFFSET) = m88k_stack_size; \ 1181 else \ 1182 abort (); \ 1183} 1184 1185/*** Trampolines for Nested Functions ***/ 1186 1187/* Output assembler code for a block containing the constant parts 1188 of a trampoline, leaving space for the variable parts. 1189 1190 This block is placed on the stack and filled in. It is aligned 1191 0 mod 128 and those portions that are executed are constant. 1192 This should work for instruction caches that have cache lines up 1193 to the aligned amount (128 is arbitrary), provided no other code 1194 producer is attempting to play the same game. This of course is 1195 in violation of any number of 88open standards. */ 1196 1197#define TRAMPOLINE_TEMPLATE(FILE) \ 1198{ \ 1199 char buf[256]; \ 1200 static int labelno = 0; \ 1201 labelno++; \ 1202 ASM_GENERATE_INTERNAL_LABEL (buf, "LTRMP", labelno); \ 1203 /* Save the return address (r1) in the static chain reg (r11). */ \ 1204 fprintf (FILE, "\tor\t %s,%s,0\n", reg_names[11], reg_names[1]); \ 1205 /* Locate this block; transfer to the next instruction. */ \ 1206 fprintf (FILE, "\tbsr\t %s\n", &buf[1]); \ 1207 ASM_OUTPUT_INTERNAL_LABEL (FILE, "LTRMP", labelno); \ 1208 /* Save r10; use it as the relative pointer; restore r1. */ \ 1209 fprintf (FILE, "\tst\t %s,%s,24\n", reg_names[10], reg_names[1]); \ 1210 fprintf (FILE, "\tor\t %s,%s,0\n", reg_names[10], reg_names[1]); \ 1211 fprintf (FILE, "\tor\t %s,%s,0\n", reg_names[1], reg_names[11]); \ 1212 /* Load the function's address and go there. */ \ 1213 fprintf (FILE, "\tld\t %s,%s,32\n", reg_names[11], reg_names[10]); \ 1214 fprintf (FILE, "\tjmp.n\t %s\n", reg_names[11]); \ 1215 /* Restore r10 and load the static chain register. */ \ 1216 fprintf (FILE, "\tld.d\t %s,%s,24\n", reg_names[10], reg_names[10]); \ 1217 /* Storage: r10 save area, static chain, function address. */ \ 1218 ASM_OUTPUT_INT (FILE, const0_rtx); \ 1219 ASM_OUTPUT_INT (FILE, const0_rtx); \ 1220 ASM_OUTPUT_INT (FILE, const0_rtx); \ 1221} 1222 1223/* Length in units of the trampoline for entering a nested function. 1224 This is really two components. The first 32 bytes are fixed and 1225 must be copied; the last 12 bytes are just storage that's filled 1226 in later. So for allocation purposes, it's 32+12 bytes, but for 1227 initialization purposes, it's 32 bytes. */ 1228 1229#define TRAMPOLINE_SIZE (32+12) 1230 1231/* Alignment required for a trampoline. 128 is used to find the 1232 beginning of a line in the instruction cache and to allow for 1233 instruction cache lines of up to 128 bytes. */ 1234 1235#define TRAMPOLINE_ALIGNMENT 128 1236 1237/* Emit RTL insns to initialize the variable parts of a trampoline. 1238 FNADDR is an RTX for the address of the function's pure code. 1239 CXT is an RTX for the static chain value for the function. */ 1240 1241#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ 1242{ \ 1243 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 40)), FNADDR); \ 1244 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 36)), CXT); \ 1245} 1246 1247/*** Library Subroutine Names ***/ 1248 1249/* Define this macro if GNU CC should generate calls to the System V 1250 (and ANSI C) library functions `memcpy' and `memset' rather than 1251 the BSD functions `bcopy' and `bzero'. */ 1252#define TARGET_MEM_FUNCTIONS 1253 1254/*** Addressing Modes ***/ 1255 1256#define EXTRA_CC_MODES CCEVENmode 1257 1258#define EXTRA_CC_NAMES "CCEVEN" 1259 1260#define SELECT_CC_MODE(OP,X,Y) CCmode 1261 1262/* #define HAVE_POST_INCREMENT 0 */ 1263/* #define HAVE_POST_DECREMENT 0 */ 1264 1265/* #define HAVE_PRE_DECREMENT 0 */ 1266/* #define HAVE_PRE_INCREMENT 0 */ 1267 1268/* Recognize any constant value that is a valid address. 1269 When PIC, we do not accept an address that would require a scratch reg 1270 to load into a register. */ 1271 1272#define CONSTANT_ADDRESS_P(X) \ 1273 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \ 1274 || GET_CODE (X) == CONST_INT || GET_CODE (X) == HIGH \ 1275 || (GET_CODE (X) == CONST \ 1276 && ! (flag_pic && pic_address_needs_scratch (X)))) 1277 1278 1279/* Maximum number of registers that can appear in a valid memory address. */ 1280#define MAX_REGS_PER_ADDRESS 2 1281 1282/* The condition for memory shift insns. */ 1283#define SCALED_ADDRESS_P(ADDR) \ 1284 (GET_CODE (ADDR) == PLUS \ 1285 && (GET_CODE (XEXP (ADDR, 0)) == MULT \ 1286 || GET_CODE (XEXP (ADDR, 1)) == MULT)) 1287 1288/* Can the reference to X be made short? */ 1289#define SHORT_ADDRESS_P(X,TEMP) \ 1290 ((TEMP) = (GET_CODE (X) == CONST ? get_related_value (X) : X), \ 1291 ((TEMP) && GET_CODE (TEMP) == SYMBOL_REF && SYMBOL_REF_FLAG (TEMP))) 1292 1293/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression 1294 that is a valid memory address for an instruction. 1295 The MODE argument is the machine mode for the MEM expression 1296 that wants to use this address. 1297 1298 On the m88000, a legitimate address has the form REG, REG+REG, 1299 REG+SMALLINT, REG+(REG*modesize) (REG[REG]), or SMALLINT. 1300 1301 The register elimination process should deal with the argument 1302 pointer and frame pointer changing to REG+SMALLINT. */ 1303 1304#define LEGITIMATE_INDEX_P(X, MODE) \ 1305 ((GET_CODE (X) == CONST_INT \ 1306 && SMALL_INT (X)) \ 1307 || (REG_P (X) \ 1308 && REG_OK_FOR_INDEX_P (X)) \ 1309 || (GET_CODE (X) == MULT \ 1310 && REG_P (XEXP (X, 0)) \ 1311 && REG_OK_FOR_INDEX_P (XEXP (X, 0)) \ 1312 && GET_CODE (XEXP (X, 1)) == CONST_INT \ 1313 && INTVAL (XEXP (X, 1)) == GET_MODE_SIZE (MODE))) 1314 1315#define RTX_OK_FOR_BASE_P(X) \ 1316 ((GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \ 1317 || (GET_CODE (X) == SUBREG \ 1318 && GET_CODE (SUBREG_REG (X)) == REG \ 1319 && REG_OK_FOR_BASE_P (SUBREG_REG (X)))) 1320 1321#define RTX_OK_FOR_INDEX_P(X) \ 1322 ((GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X)) \ 1323 || (GET_CODE (X) == SUBREG \ 1324 && GET_CODE (SUBREG_REG (X)) == REG \ 1325 && REG_OK_FOR_INDEX_P (SUBREG_REG (X)))) 1326 1327#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ 1328{ \ 1329 register rtx _x; \ 1330 if (REG_P (X)) \ 1331 { \ 1332 if (REG_OK_FOR_BASE_P (X)) \ 1333 goto ADDR; \ 1334 } \ 1335 else if (GET_CODE (X) == PLUS) \ 1336 { \ 1337 register rtx _x0 = XEXP (X, 0); \ 1338 register rtx _x1 = XEXP (X, 1); \ 1339 if ((flag_pic \ 1340 && _x0 == pic_offset_table_rtx \ 1341 && (flag_pic == 2 \ 1342 ? RTX_OK_FOR_BASE_P (_x1) \ 1343 : (GET_CODE (_x1) == SYMBOL_REF \ 1344 || GET_CODE (_x1) == LABEL_REF))) \ 1345 || (REG_P (_x0) \ 1346 && (REG_OK_FOR_BASE_P (_x0) \ 1347 && LEGITIMATE_INDEX_P (_x1, MODE))) \ 1348 || (REG_P (_x1) \ 1349 && (REG_OK_FOR_BASE_P (_x1) \ 1350 && LEGITIMATE_INDEX_P (_x0, MODE)))) \ 1351 goto ADDR; \ 1352 } \ 1353 else if (GET_CODE (X) == LO_SUM) \ 1354 { \ 1355 register rtx _x0 = XEXP (X, 0); \ 1356 register rtx _x1 = XEXP (X, 1); \ 1357 if (((REG_P (_x0) \ 1358 && REG_OK_FOR_BASE_P (_x0)) \ 1359 || (GET_CODE (_x0) == SUBREG \ 1360 && REG_P (SUBREG_REG (_x0)) \ 1361 && REG_OK_FOR_BASE_P (SUBREG_REG (_x0)))) \ 1362 && CONSTANT_P (_x1)) \ 1363 goto ADDR; \ 1364 } \ 1365 else if (GET_CODE (X) == CONST_INT \ 1366 && SMALL_INT (X)) \ 1367 goto ADDR; \ 1368 else if (SHORT_ADDRESS_P (X, _x)) \ 1369 goto ADDR; \ 1370} 1371 1372/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 1373 and check its validity for a certain class. 1374 We have two alternate definitions for each of them. 1375 The usual definition accepts all pseudo regs; the other rejects 1376 them unless they have been allocated suitable hard regs. 1377 The symbol REG_OK_STRICT causes the latter definition to be used. 1378 1379 Most source files want to accept pseudo regs in the hope that 1380 they will get allocated to the class that the insn wants them to be in. 1381 Source files for reload pass need to be strict. 1382 After reload, it makes no difference, since pseudo regs have 1383 been eliminated by then. */ 1384 1385#ifndef REG_OK_STRICT 1386 1387/* Nonzero if X is a hard reg that can be used as an index 1388 or if it is a pseudo reg. Not the argument pointer. */ 1389#define REG_OK_FOR_INDEX_P(X) \ 1390 (!XRF_REGNO_P(REGNO (X))) 1391/* Nonzero if X is a hard reg that can be used as a base reg 1392 or if it is a pseudo reg. */ 1393#define REG_OK_FOR_BASE_P(X) (REG_OK_FOR_INDEX_P (X)) 1394 1395#else 1396 1397/* Nonzero if X is a hard reg that can be used as an index. */ 1398#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) 1399/* Nonzero if X is a hard reg that can be used as a base reg. */ 1400#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) 1401 1402#endif 1403 1404/* Try machine-dependent ways of modifying an illegitimate address 1405 to be legitimate. If we find one, return the new, valid address. 1406 This macro is used in only one place: `memory_address' in explow.c. 1407 1408 OLDX is the address as it was before break_out_memory_refs was called. 1409 In some cases it is useful to look at this to decide what needs to be done. 1410 1411 MODE and WIN are passed so that this macro can use 1412 GO_IF_LEGITIMATE_ADDRESS. 1413 1414 It is always safe for this macro to do nothing. It exists to recognize 1415 opportunities to optimize the output. */ 1416 1417/* On the m88000, change REG+N into REG+REG, and REG+(X*Y) into REG+REG. */ 1418 1419#define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \ 1420{ \ 1421 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \ 1422 (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \ 1423 copy_to_mode_reg (SImode, XEXP (X, 1))); \ 1424 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \ 1425 (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \ 1426 copy_to_mode_reg (SImode, XEXP (X, 0))); \ 1427 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \ 1428 (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \ 1429 force_operand (XEXP (X, 0), 0)); \ 1430 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \ 1431 (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \ 1432 force_operand (XEXP (X, 1), 0)); \ 1433 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == PLUS) \ 1434 (X) = gen_rtx (PLUS, Pmode, force_operand (XEXP (X, 0), NULL_RTX),\ 1435 XEXP (X, 1)); \ 1436 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == PLUS) \ 1437 (X) = gen_rtx (PLUS, Pmode, XEXP (X, 0), \ 1438 force_operand (XEXP (X, 1), NULL_RTX)); \ 1439 if (GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == CONST \ 1440 || GET_CODE (X) == LABEL_REF) \ 1441 (X) = legitimize_address (flag_pic, X, 0, 0); \ 1442 if (memory_address_p (MODE, X)) \ 1443 goto WIN; } 1444 1445/* Go to LABEL if ADDR (a legitimate address expression) 1446 has an effect that depends on the machine mode it is used for. 1447 On the m88000 this is never true. */ 1448 1449#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) 1450 1451/* Nonzero if the constant value X is a legitimate general operand. 1452 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ 1453#define LEGITIMATE_CONSTANT_P(X) (1) 1454 1455/* Define this, so that when PIC, reload won't try to reload invalid 1456 addresses which require two reload registers. */ 1457 1458#define LEGITIMATE_PIC_OPERAND_P(X) (! pic_address_needs_scratch (X)) 1459 1460 1461/*** Condition Code Information ***/ 1462 1463/* C code for a data type which is used for declaring the `mdep' 1464 component of `cc_status'. It defaults to `int'. */ 1465/* #define CC_STATUS_MDEP int */ 1466 1467/* A C expression to initialize the `mdep' field to "empty". */ 1468/* #define CC_STATUS_MDEP_INIT (cc_status.mdep = 0) */ 1469 1470/* Macro to zap the normal portions of CC_STATUS, but leave the 1471 machine dependent parts (ie, literal synthesis) alone. */ 1472/* #define CC_STATUS_INIT_NO_MDEP \ 1473 (cc_status.flags = 0, cc_status.value1 = 0, cc_status.value2 = 0) */ 1474 1475/* When using a register to hold the condition codes, the cc_status 1476 mechanism cannot be used. */ 1477#define NOTICE_UPDATE_CC(EXP, INSN) (0) 1478 1479/*** Miscellaneous Parameters ***/ 1480 1481/* Define the codes that are matched by predicates in m88k.c. */ 1482#define PREDICATE_CODES \ 1483 {"move_operand", {SUBREG, REG, CONST_INT, LO_SUM, MEM}}, \ 1484 {"call_address_operand", {SUBREG, REG, SYMBOL_REF, LABEL_REF, CONST}}, \ 1485 {"arith_operand", {SUBREG, REG, CONST_INT}}, \ 1486 {"arith5_operand", {SUBREG, REG, CONST_INT}}, \ 1487 {"arith32_operand", {SUBREG, REG, CONST_INT}}, \ 1488 {"arith64_operand", {SUBREG, REG, CONST_INT}}, \ 1489 {"int5_operand", {CONST_INT}}, \ 1490 {"int32_operand", {CONST_INT}}, \ 1491 {"add_operand", {SUBREG, REG, CONST_INT}}, \ 1492 {"reg_or_bbx_mask_operand", {SUBREG, REG, CONST_INT}}, \ 1493 {"real_or_0_operand", {SUBREG, REG, CONST_DOUBLE}}, \ 1494 {"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \ 1495 {"relop", {EQ, NE, LT, LE, GE, GT, LTU, LEU, GEU, GTU}}, \ 1496 {"even_relop", {EQ, LT, GT, LTU, GTU}}, \ 1497 {"odd_relop", { NE, LE, GE, LEU, GEU}}, \ 1498 {"partial_ccmode_register_operand", { SUBREG, REG}}, \ 1499 {"relop_no_unsigned", {EQ, NE, LT, LE, GE, GT}}, \ 1500 {"equality_op", {EQ, NE}}, \ 1501 {"pc_or_label_ref", {PC, LABEL_REF}}, 1502 1503/* The case table contains either words or branch instructions. This says 1504 which. We always claim that the vector is PC-relative. It is position 1505 independent when -fpic is used. */ 1506#define CASE_VECTOR_INSNS (TARGET_88100 || flag_pic) 1507 1508/* An alias for a machine mode name. This is the machine mode that 1509 elements of a jump-table should have. */ 1510#define CASE_VECTOR_MODE SImode 1511 1512/* Define as C expression which evaluates to nonzero if the tablejump 1513 instruction expects the table to contain offsets from the address of the 1514 table. 1515 Do not define this if the table should contain absolute addresses. */ 1516#define CASE_VECTOR_PC_RELATIVE 1 1517 1518/* Define this if control falls through a `case' insn when the index 1519 value is out of range. This means the specified default-label is 1520 actually ignored by the `case' insn proper. */ 1521/* #define CASE_DROPS_THROUGH */ 1522 1523/* Define this to be the smallest number of different values for which it 1524 is best to use a jump-table instead of a tree of conditional branches. 1525 The default is 4 for machines with a casesi instruction and 5 otherwise. 1526 The best 88110 number is around 7, though the exact number isn't yet 1527 known. A third alternative for the 88110 is to use a binary tree of 1528 bb1 instructions on bits 2/1/0 if the range is dense. This may not 1529 win very much though. */ 1530#define CASE_VALUES_THRESHOLD (TARGET_88100 ? 4 : 7) 1531 1532/* Specify the tree operation to be used to convert reals to integers. */ 1533#define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR 1534 1535/* This is the kind of divide that is easiest to do in the general case. */ 1536#define EASY_DIV_EXPR TRUNC_DIV_EXPR 1537 1538/* Define this as 1 if `char' should by default be signed; else as 0. */ 1539#define DEFAULT_SIGNED_CHAR 1 1540 1541/* The 88open ABI says size_t is unsigned int. */ 1542#define SIZE_TYPE "unsigned int" 1543 1544/* Allow and ignore #sccs directives */ 1545#define SCCS_DIRECTIVE 1546 1547/* Handle #pragma pack and sometimes #pragma weak. */ 1548#define HANDLE_SYSV_PRAGMA 1549 1550/* Tell when to handle #pragma weak. This is only done for V.4. */ 1551#define SUPPORTS_WEAK TARGET_SVR4 1552#define SUPPORTS_ONE_ONLY TARGET_SVR4 1553 1554/* Max number of bytes we can move from memory to memory 1555 in one reasonably fast instruction. */ 1556#define MOVE_MAX 8 1557 1558/* Define if normal loads of shorter-than-word items from memory clears 1559 the rest of the bigs in the register. */ 1560#define BYTE_LOADS_ZERO_EXTEND 1561 1562/* Zero if access to memory by bytes is faster. */ 1563#define SLOW_BYTE_ACCESS 1 1564 1565/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits 1566 is done just by pretending it is already truncated. */ 1567#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 1568 1569/* Define this if addresses of constant functions 1570 shouldn't be put through pseudo regs where they can be cse'd. 1571 Desirable on machines where ordinary constants are expensive 1572 but a CALL with constant address is cheap. */ 1573#define NO_FUNCTION_CSE 1574 1575/* Define this macro if an argument declared as `char' or 1576 `short' in a prototype should actually be passed as an 1577 `int'. In addition to avoiding errors in certain cases of 1578 mismatch, it also makes for better code on certain machines. */ 1579#define PROMOTE_PROTOTYPES 1580 1581/* Define this macro if a float function always returns float 1582 (even in traditional mode). Redefined in luna.h. */ 1583#define TRADITIONAL_RETURN_FLOAT 1584 1585/* We assume that the store-condition-codes instructions store 0 for false 1586 and some other value for true. This is the value stored for true. */ 1587#define STORE_FLAG_VALUE -1 1588 1589/* Specify the machine mode that pointers have. 1590 After generation of rtl, the compiler makes no further distinction 1591 between pointers and any other objects of this machine mode. */ 1592#define Pmode SImode 1593 1594/* A function address in a call instruction 1595 is a word address (for indexing purposes) 1596 so give the MEM rtx word mode. */ 1597#define FUNCTION_MODE SImode 1598 1599/* A barrier will be aligned so account for the possible expansion. 1600 A volatile load may be preceded by a serializing instruction. 1601 Account for profiling code output at NOTE_INSN_PROLOGUE_END. 1602 Account for block profiling code at basic block boundaries. */ 1603#define ADJUST_INSN_LENGTH(RTX, LENGTH) \ 1604 if (GET_CODE (RTX) == BARRIER \ 1605 || (TARGET_SERIALIZE_VOLATILE \ 1606 && GET_CODE (RTX) == INSN \ 1607 && GET_CODE (PATTERN (RTX)) == SET \ 1608 && ((GET_CODE (SET_SRC (PATTERN (RTX))) == MEM \ 1609 && MEM_VOLATILE_P (SET_SRC (PATTERN (RTX))))))) \ 1610 LENGTH += 1; \ 1611 else if (GET_CODE (RTX) == NOTE \ 1612 && NOTE_LINE_NUMBER (RTX) == NOTE_INSN_PROLOGUE_END) \ 1613 { \ 1614 if (profile_block_flag) \ 1615 LENGTH += FUNCTION_BLOCK_PROFILER_LENGTH; \ 1616 if (profile_flag) \ 1617 LENGTH += (FUNCTION_PROFILER_LENGTH + REG_PUSH_LENGTH \ 1618 + REG_POP_LENGTH); \ 1619 } \ 1620 else if (profile_block_flag \ 1621 && (GET_CODE (RTX) == CODE_LABEL \ 1622 || GET_CODE (RTX) == JUMP_INSN \ 1623 || (GET_CODE (RTX) == INSN \ 1624 && GET_CODE (PATTERN (RTX)) == SEQUENCE \ 1625 && GET_CODE (XVECEXP (PATTERN (RTX), 0, 0)) == JUMP_INSN)))\ 1626 LENGTH += BLOCK_PROFILER_LENGTH; 1627 1628/* Track the state of the last volatile memory reference. Clear the 1629 state with CC_STATUS_INIT for now. */ 1630#define CC_STATUS_INIT m88k_volatile_code = '\0' 1631 1632/* Compute the cost of computing a constant rtl expression RTX 1633 whose rtx-code is CODE. The body of this macro is a portion 1634 of a switch statement. If the code is computed here, 1635 return it with a return statement. Otherwise, break from the switch. 1636 1637 We assume that any 16 bit integer can easily be recreated, so we 1638 indicate 0 cost, in an attempt to get GCC not to optimize things 1639 like comparison against a constant. 1640 1641 The cost of CONST_DOUBLE is zero (if it can be placed in an insn, it 1642 is as good as a register; since it can't be placed in any insn, it 1643 won't do anything in cse, but it will cause expand_binop to pass the 1644 constant to the define_expands). */ 1645#define CONST_COSTS(RTX,CODE,OUTER_CODE) \ 1646 case CONST_INT: \ 1647 if (SMALL_INT (RTX)) \ 1648 return 0; \ 1649 else if (SMALL_INTVAL (- INTVAL (RTX))) \ 1650 return 2; \ 1651 else if (classify_integer (SImode, INTVAL (RTX)) != m88k_oru_or) \ 1652 return 4; \ 1653 return 7; \ 1654 case HIGH: \ 1655 return 2; \ 1656 case CONST: \ 1657 case LABEL_REF: \ 1658 case SYMBOL_REF: \ 1659 if (flag_pic) \ 1660 return (flag_pic == 2) ? 11 : 8; \ 1661 return 5; \ 1662 case CONST_DOUBLE: \ 1663 return 0; 1664 1665/* Provide the costs of an addressing mode that contains ADDR. 1666 If ADDR is not a valid address, its cost is irrelevant. 1667 REG+REG is made slightly more expensive because it might keep 1668 a register live for longer than we might like. */ 1669#define ADDRESS_COST(ADDR) \ 1670 (GET_CODE (ADDR) == REG ? 1 : \ 1671 GET_CODE (ADDR) == LO_SUM ? 1 : \ 1672 GET_CODE (ADDR) == HIGH ? 2 : \ 1673 GET_CODE (ADDR) == MULT ? 1 : \ 1674 GET_CODE (ADDR) != PLUS ? 4 : \ 1675 (REG_P (XEXP (ADDR, 0)) && REG_P (XEXP (ADDR, 1))) ? 2 : 1) 1676 1677/* Provide the costs of a rtl expression. This is in the body of a 1678 switch on CODE. */ 1679#define RTX_COSTS(X,CODE,OUTER_CODE) \ 1680 case MEM: \ 1681 return COSTS_N_INSNS (2); \ 1682 case MULT: \ 1683 return COSTS_N_INSNS (3); \ 1684 case DIV: \ 1685 case UDIV: \ 1686 case MOD: \ 1687 case UMOD: \ 1688 return COSTS_N_INSNS (38); 1689 1690/* A C expressions returning the cost of moving data of MODE from a register 1691 to or from memory. This is more costly than between registers. */ 1692#define MEMORY_MOVE_COST(MODE,CLASS,IN) 4 1693 1694/* Provide the cost of a branch. Exact meaning under development. */ 1695#define BRANCH_COST (TARGET_88100 ? 1 : 2) 1696 1697/* A C statement (sans semicolon) to update the integer variable COST 1698 based on the relationship between INSN that is dependent on 1699 DEP_INSN through the dependence LINK. The default is to make no 1700 adjustment to COST. On the m88k, ignore the cost of anti- and 1701 output-dependencies. On the m88100, a store can issue two cycles 1702 before the value (not the address) has finished computing. */ 1703#define ADJUST_COST(INSN,LINK,DEP_INSN,COST) \ 1704 do { \ 1705 if (REG_NOTE_KIND (LINK) != 0) \ 1706 (COST) = 0; /* Anti or output dependence. */ \ 1707 else if (! TARGET_88100 \ 1708 && recog_memoized (INSN) >= 0 \ 1709 && get_attr_type (INSN) == TYPE_STORE \ 1710 && SET_SRC (PATTERN (INSN)) == SET_DEST (PATTERN (DEP_INSN))) \ 1711 (COST) -= 4; /* 88110 store reservation station. */ \ 1712 } while (0) 1713 1714/* Do not break .stabs pseudos into continuations. */ 1715#define DBX_CONTIN_LENGTH 0 1716 1717/*** Output of Assembler Code ***/ 1718 1719/* Control the assembler format that we output. */ 1720 1721/* A C string constant describing how to begin a comment in the target 1722 assembler language. The compiler assumes that the comment will end at 1723 the end of the line. */ 1724#define ASM_COMMENT_START ";" 1725 1726/* Allow pseudo-ops to be overridden. Override these in svr[34].h. */ 1727#undef INT_ASM_OP 1728#undef ASCII_DATA_ASM_OP 1729#undef CONST_SECTION_ASM_OP 1730#undef CTORS_SECTION_ASM_OP 1731#undef DTORS_SECTION_ASM_OP 1732#undef ASM_OUTPUT_SECTION_NAME 1733#undef INIT_SECTION_ASM_OP 1734#undef FINI_SECTION_ASM_OP 1735#undef TYPE_ASM_OP 1736#undef SIZE_ASM_OP 1737#undef SET_ASM_OP 1738#undef SKIP_ASM_OP 1739#undef COMMON_ASM_OP 1740#undef ALIGN_ASM_OP 1741#undef IDENT_ASM_OP 1742 1743/* These are used in varasm.c as well. */ 1744#define TEXT_SECTION_ASM_OP "text" 1745#define DATA_SECTION_ASM_OP "data" 1746 1747/* Other sections. */ 1748#define CONST_SECTION_ASM_OP (TARGET_SVR4 \ 1749 ? "section\t .rodata,\"a\"" \ 1750 : "section\t .rodata,\"x\"") 1751#define TDESC_SECTION_ASM_OP (TARGET_SVR4 \ 1752 ? "section\t .tdesc,\"a\"" \ 1753 : "section\t .tdesc,\"x\"") 1754 1755/* These must be constant strings for crtstuff.c. */ 1756#define CTORS_SECTION_ASM_OP "section\t .ctors,\"d\"" 1757#define DTORS_SECTION_ASM_OP "section\t .dtors,\"d\"" 1758#define INIT_SECTION_ASM_OP "section\t .init,\"x\"" 1759#define FINI_SECTION_ASM_OP "section\t .fini,\"x\"" 1760 1761/* These are pretty much common to all assemblers. */ 1762#define IDENT_ASM_OP "ident" 1763#define FILE_ASM_OP "file" 1764#define SECTION_ASM_OP "section" 1765#define SET_ASM_OP "def" 1766#define GLOBAL_ASM_OP "global" 1767#define ALIGN_ASM_OP "align" 1768#define SKIP_ASM_OP "zero" 1769#define COMMON_ASM_OP "comm" 1770#define BSS_ASM_OP "bss" 1771#define FLOAT_ASM_OP "float" 1772#define DOUBLE_ASM_OP "double" 1773#define INT_ASM_OP "word" 1774#define ASM_LONG INT_ASM_OP 1775#define SHORT_ASM_OP "half" 1776#define CHAR_ASM_OP "byte" 1777#define ASCII_DATA_ASM_OP "string" 1778 1779/* These are particular to the global pool optimization. */ 1780#define SBSS_ASM_OP "sbss" 1781#define SCOMM_ASM_OP "scomm" 1782#define SDATA_SECTION_ASM_OP "sdata" 1783 1784/* These are specific to PIC. */ 1785#define TYPE_ASM_OP "type" 1786#define SIZE_ASM_OP "size" 1787#ifndef AS_BUG_POUND_TYPE /* Faulty assemblers require @ rather than #. */ 1788#undef TYPE_OPERAND_FMT 1789#define TYPE_OPERAND_FMT "#%s" 1790#endif 1791 1792/* This is how we tell the assembler that a symbol is weak. */ 1793 1794#undef ASM_WEAKEN_LABEL 1795#define ASM_WEAKEN_LABEL(FILE,NAME) \ 1796 do { fputs ("\tweak\t", FILE); assemble_name (FILE, NAME); \ 1797 fputc ('\n', FILE); } while (0) 1798 1799/* These are specific to version 03.00 assembler syntax. */ 1800#define INTERNAL_ASM_OP "local" 1801#define VERSION_ASM_OP "version" 1802#define UNALIGNED_SHORT_ASM_OP "uahalf" 1803#define UNALIGNED_INT_ASM_OP "uaword" 1804#define PUSHSECTION_ASM_OP "section" 1805#define POPSECTION_ASM_OP "previous" 1806 1807/* These are specific to the version 04.00 assembler syntax. */ 1808#define REQUIRES_88110_ASM_OP "requires_88110" 1809 1810/* Output any initial stuff to the assembly file. Always put out 1811 a file directive, even if not debugging. 1812 1813 Immediately after putting out the file, put out a "sem.<value>" 1814 declaration. This should be harmless on other systems, and 1815 is used in DG/UX by the debuggers to supplement COFF. The 1816 fields in the integer value are as follows: 1817 1818 Bits Value Meaning 1819 ---- ----- ------- 1820 0-1 0 No information about stack locations 1821 1 Auto/param locations are based on r30 1822 2 Auto/param locations are based on CFA 1823 1824 3-2 0 No information on dimension order 1825 1 Array dims in sym table matches source language 1826 2 Array dims in sym table is in reverse order 1827 1828 5-4 0 No information about the case of global names 1829 1 Global names appear in the symbol table as in the source 1830 2 Global names have been converted to lower case 1831 3 Global names have been converted to upper case. */ 1832 1833#ifdef SDB_DEBUGGING_INFO 1834#define ASM_COFFSEM(FILE) \ 1835 if (write_symbols == SDB_DEBUG) \ 1836 { \ 1837 fprintf (FILE, "\nsem.%x:\t\t; %s\n", \ 1838 (((TARGET_OCS_FRAME_POSITION) ? 2 : 1) << 0) + (1 << 2) + (1 << 4),\ 1839 (TARGET_OCS_FRAME_POSITION) \ 1840 ? "frame is CFA, normal array dims, case unchanged" \ 1841 : "frame is r30, normal array dims, case unchanged"); \ 1842 } 1843#else 1844#define ASM_COFFSEM(FILE) 1845#endif 1846 1847/* Output the first line of the assembly file. Redefined in dgux.h. */ 1848 1849#define ASM_FIRST_LINE(FILE) \ 1850 do { \ 1851 if (TARGET_SVR4) \ 1852 { \ 1853 if (TARGET_88110) \ 1854 fprintf (FILE, "\t%s\t \"%s\"\n", VERSION_ASM_OP, "04.00"); \ 1855 else \ 1856 fprintf (FILE, "\t%s\t \"%s\"\n", VERSION_ASM_OP, "03.00"); \ 1857 } \ 1858 } while (0) 1859 1860/* Override svr[34].h. */ 1861#undef ASM_FILE_START 1862#define ASM_FILE_START(FILE) \ 1863 output_file_start (FILE, f_options, sizeof f_options / sizeof f_options[0], \ 1864 W_options, sizeof W_options / sizeof W_options[0]) 1865 1866#undef ASM_FILE_END 1867 1868#define ASM_OUTPUT_SOURCE_FILENAME(FILE, NAME) \ 1869 fprintf (FILE, "\t%s\t \"%s\"\n", FILE_ASM_OP, NAME) 1870 1871#ifdef SDB_DEBUGGING_INFO 1872#undef ASM_OUTPUT_SOURCE_LINE 1873#define ASM_OUTPUT_SOURCE_LINE(FILE, LINE) \ 1874 if (m88k_prologue_done) \ 1875 fprintf (FILE, "\n\tln\t %d\t\t\t\t; Real source line %d\n",\ 1876 LINE - sdb_begin_function_line, LINE) 1877#endif 1878 1879/* Code to handle #ident directives. Override svr[34].h definition. */ 1880#undef ASM_OUTPUT_IDENT 1881#ifdef DBX_DEBUGGING_INFO 1882#define ASM_OUTPUT_IDENT(FILE, NAME) 1883#else 1884#define ASM_OUTPUT_IDENT(FILE, NAME) \ 1885 output_ascii (FILE, IDENT_ASM_OP, 4000, NAME, strlen (NAME)); 1886#endif 1887 1888/* Output to assembler file text saying following lines 1889 may contain character constants, extra white space, comments, etc. */ 1890#define ASM_APP_ON "" 1891 1892/* Output to assembler file text saying following lines 1893 no longer contain unusual constructs. */ 1894#define ASM_APP_OFF "" 1895 1896/* Format the assembly opcode so that the arguments are all aligned. 1897 The maximum instruction size is 8 characters (fxxx.xxx), so a tab and a 1898 space will do to align the output. Abandon the output if a `%' is 1899 encountered. */ 1900#define ASM_OUTPUT_OPCODE(STREAM, PTR) \ 1901 { \ 1902 int ch; \ 1903 char *orig_ptr; \ 1904 \ 1905 for (orig_ptr = (PTR); \ 1906 (ch = *(PTR)) && ch != ' ' && ch != '\t' && ch != '\n' && ch != '%'; \ 1907 (PTR)++) \ 1908 putc (ch, STREAM); \ 1909 \ 1910 if (ch == ' ' && orig_ptr != (PTR) && (PTR) - orig_ptr < 8) \ 1911 putc ('\t', STREAM); \ 1912 } 1913 1914/* How to refer to registers in assembler output. 1915 This sequence is indexed by compiler's hard-register-number. 1916 Updated by OVERRIDE_OPTIONS to include the # for version 03.00 syntax. */ 1917 1918#define REGISTER_NAMES \ 1919 {"#r0"+1, "#r1"+1, "#r2"+1, "#r3"+1, "#r4"+1, "#r5"+1, "#r6"+1, "#r7"+1, \ 1920 "#r8"+1, "#r9"+1, "#r10"+1,"#r11"+1,"#r12"+1,"#r13"+1,"#r14"+1,"#r15"+1,\ 1921 "#r16"+1,"#r17"+1,"#r18"+1,"#r19"+1,"#r20"+1,"#r21"+1,"#r22"+1,"#r23"+1,\ 1922 "#r24"+1,"#r25"+1,"#r26"+1,"#r27"+1,"#r28"+1,"#r29"+1,"#r30"+1,"#r31"+1,\ 1923 "#x0"+1, "#x1"+1, "#x2"+1, "#x3"+1, "#x4"+1, "#x5"+1, "#x6"+1, "#x7"+1, \ 1924 "#x8"+1, "#x9"+1, "#x10"+1,"#x11"+1,"#x12"+1,"#x13"+1,"#x14"+1,"#x15"+1,\ 1925 "#x16"+1,"#x17"+1,"#x18"+1,"#x19"+1,"#x20"+1,"#x21"+1,"#x22"+1,"#x23"+1,\ 1926 "#x24"+1,"#x25"+1,"#x26"+1,"#x27"+1,"#x28"+1,"#x29"+1,"#x30"+1,"#x31"+1} 1927 1928/* Define additional names for use in asm clobbers and asm declarations. 1929 1930 We define the fake Condition Code register as an alias for reg 0 (which 1931 is our `condition code' register), so that condition codes can easily 1932 be clobbered by an asm. The carry bit in the PSR is now used. */ 1933 1934#define ADDITIONAL_REGISTER_NAMES {"psr", 0, "cc", 0} 1935 1936/* How to renumber registers for dbx and gdb. */ 1937#define DBX_REGISTER_NUMBER(REGNO) (REGNO) 1938 1939/* Tell when to declare ASM names. Override svr4.h to provide this hook. */ 1940#undef DECLARE_ASM_NAME 1941#define DECLARE_ASM_NAME TARGET_SVR4 1942 1943/* Write the extra assembler code needed to declare a function properly. */ 1944#undef ASM_DECLARE_FUNCTION_NAME 1945#define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \ 1946 do { \ 1947 if (DECLARE_ASM_NAME) \ 1948 { \ 1949 fprintf (FILE, "\t%s\t ", TYPE_ASM_OP); \ 1950 assemble_name (FILE, NAME); \ 1951 putc (',', FILE); \ 1952 fprintf (FILE, TYPE_OPERAND_FMT, "function"); \ 1953 putc ('\n', FILE); \ 1954 } \ 1955 ASM_OUTPUT_LABEL(FILE, NAME); \ 1956 } while (0) 1957 1958/* Write the extra assembler code needed to declare an object properly. */ 1959#undef ASM_DECLARE_OBJECT_NAME 1960#define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \ 1961 do { \ 1962 if (DECLARE_ASM_NAME) \ 1963 { \ 1964 fprintf (FILE, "\t%s\t ", TYPE_ASM_OP); \ 1965 assemble_name (FILE, NAME); \ 1966 putc (',', FILE); \ 1967 fprintf (FILE, TYPE_OPERAND_FMT, "object"); \ 1968 putc ('\n', FILE); \ 1969 size_directive_output = 0; \ 1970 if (!flag_inhibit_size_directive && DECL_SIZE (DECL)) \ 1971 { \ 1972 size_directive_output = 1; \ 1973 fprintf (FILE, "\t%s\t ", SIZE_ASM_OP); \ 1974 assemble_name (FILE, NAME); \ 1975 fprintf (FILE, ",%d\n", int_size_in_bytes (TREE_TYPE (DECL))); \ 1976 } \ 1977 } \ 1978 ASM_OUTPUT_LABEL(FILE, NAME); \ 1979 } while (0) 1980 1981/* Output the size directive for a decl in rest_of_decl_compilation 1982 in the case where we did not do so before the initializer. 1983 Once we find the error_mark_node, we know that the value of 1984 size_directive_output was set 1985 by ASM_DECLARE_OBJECT_NAME when it was run for the same decl. */ 1986 1987#undef ASM_FINISH_DECLARE_OBJECT 1988#define ASM_FINISH_DECLARE_OBJECT(FILE, DECL, TOP_LEVEL, AT_END) \ 1989do { \ 1990 char *name = XSTR (XEXP (DECL_RTL (DECL), 0), 0); \ 1991 if (!flag_inhibit_size_directive && DECL_SIZE (DECL) \ 1992 && DECLARE_ASM_NAME \ 1993 && ! AT_END && TOP_LEVEL \ 1994 && DECL_INITIAL (DECL) == error_mark_node \ 1995 && !size_directive_output) \ 1996 { \ 1997 size_directive_output = 1; \ 1998 fprintf (FILE, "\t%s\t ", SIZE_ASM_OP); \ 1999 assemble_name (FILE, name); \ 2000 fprintf (FILE, ",%d\n", int_size_in_bytes (TREE_TYPE (DECL))); \ 2001 } \ 2002 } while (0) 2003 2004/* This is how to declare the size of a function. */ 2005#undef ASM_DECLARE_FUNCTION_SIZE 2006#define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL) \ 2007 do { \ 2008 if (DECLARE_ASM_NAME) \ 2009 { \ 2010 if (!flag_inhibit_size_directive) \ 2011 { \ 2012 char label[256]; \ 2013 static int labelno = 0; \ 2014 labelno++; \ 2015 ASM_GENERATE_INTERNAL_LABEL (label, "Lfe", labelno); \ 2016 ASM_OUTPUT_INTERNAL_LABEL (FILE, "Lfe", labelno); \ 2017 fprintf (FILE, "\t%s\t ", SIZE_ASM_OP); \ 2018 assemble_name (FILE, (FNAME)); \ 2019 fprintf (FILE, ",%s-", &label[1]); \ 2020 assemble_name (FILE, (FNAME)); \ 2021 putc ('\n', FILE); \ 2022 } \ 2023 } \ 2024 } while (0) 2025 2026/* This is how to output the definition of a user-level label named NAME, 2027 such as the label on a static function or variable NAME. */ 2028#define ASM_OUTPUT_LABEL(FILE,NAME) \ 2029 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0) 2030 2031/* This is how to output a command to make the user-level label named NAME 2032 defined for reference from other files. */ 2033#define ASM_GLOBALIZE_LABEL(FILE,NAME) \ 2034 do { \ 2035 fprintf (FILE, "\t%s\t ", GLOBAL_ASM_OP); \ 2036 assemble_name (FILE, NAME); \ 2037 putc ('\n', FILE); \ 2038 } while (0) 2039 2040/* The prefix to add to user-visible assembler symbols. 2041 Override svr[34].h. */ 2042#undef USER_LABEL_PREFIX 2043#define USER_LABEL_PREFIX "_" 2044 2045/* This is how to output a reference to a user-level label named NAME. 2046 Override svr[34].h. */ 2047#undef ASM_OUTPUT_LABELREF 2048#define ASM_OUTPUT_LABELREF(FILE,NAME) \ 2049 { \ 2050 if (!TARGET_NO_UNDERSCORES && !TARGET_SVR4) \ 2051 fputc ('_', FILE); \ 2052 fputs (NAME, FILE); \ 2053 } 2054 2055/* This is how to output an internal numbered label where 2056 PREFIX is the class of label and NUM is the number within the class. 2057 For V.4, labels use `.' rather than `@'. */ 2058 2059#undef ASM_OUTPUT_INTERNAL_LABEL 2060#ifdef AS_BUG_DOT_LABELS /* The assembler requires a declaration of local. */ 2061#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ 2062 fprintf (FILE, TARGET_SVR4 ? ".%s%d:\n\t%s\t .%s%d\n" : "@%s%d:\n", \ 2063 PREFIX, NUM, INTERNAL_ASM_OP, PREFIX, NUM) 2064#else 2065#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ 2066 fprintf (FILE, TARGET_SVR4 ? ".%s%d:\n" : "@%s%d:\n", PREFIX, NUM) 2067#endif /* AS_BUG_DOT_LABELS */ 2068 2069/* This is how to store into the string LABEL 2070 the symbol_ref name of an internal numbered label where 2071 PREFIX is the class of label and NUM is the number within the class. 2072 This is suitable for output with `assemble_name'. This must agree 2073 with ASM_OUTPUT_INTERNAL_LABEL above, except for being prefixed 2074 with an `*'. */ 2075 2076#undef ASM_GENERATE_INTERNAL_LABEL 2077#define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ 2078 sprintf (LABEL, TARGET_SVR4 ? "*.%s%d" : "*@%s%d", PREFIX, NUM) 2079 2080/* Internal macro to get a single precision floating point value into 2081 an int, so we can print its value in hex. */ 2082#define FLOAT_TO_INT_INTERNAL( FVALUE, IVALUE ) \ 2083 { union { \ 2084 REAL_VALUE_TYPE d; \ 2085 struct { \ 2086 unsigned sign : 1; \ 2087 unsigned exponent1 : 1; \ 2088 unsigned exponent2 : 3; \ 2089 unsigned exponent3 : 7; \ 2090 unsigned mantissa1 : 20; \ 2091 unsigned mantissa2 : 3; \ 2092 unsigned mantissa3 : 29; \ 2093 } s; \ 2094 } _u; \ 2095 \ 2096 union { \ 2097 int i; \ 2098 struct { \ 2099 unsigned sign : 1; \ 2100 unsigned exponent1 : 1; \ 2101 unsigned exponent3 : 7; \ 2102 unsigned mantissa1 : 20; \ 2103 unsigned mantissa2 : 3; \ 2104 } s; \ 2105 } _u2; \ 2106 \ 2107 _u.d = REAL_VALUE_TRUNCATE (SFmode, FVALUE); \ 2108 _u2.s.sign = _u.s.sign; \ 2109 _u2.s.exponent1 = _u.s.exponent1; \ 2110 _u2.s.exponent3 = _u.s.exponent3; \ 2111 _u2.s.mantissa1 = _u.s.mantissa1; \ 2112 _u2.s.mantissa2 = _u.s.mantissa2; \ 2113 IVALUE = _u2.i; \ 2114 } 2115 2116/* This is how to output an assembler line defining a `double' constant. 2117 Use "word" pseudos to avoid printing NaNs, infinity, etc. */ 2118#define ASM_OUTPUT_DOUBLE(FILE,VALUE) \ 2119 do { \ 2120 union { REAL_VALUE_TYPE d; long l[2]; } x; \ 2121 x.d = (VALUE); \ 2122 fprintf (FILE, "\t%s\t 0x%.8x, 0x%.8x\n", INT_ASM_OP, \ 2123 x.l[0], x.l[1]); \ 2124 } while (0) 2125 2126/* This is how to output an assembler line defining a `float' constant. */ 2127#define ASM_OUTPUT_FLOAT(FILE,VALUE) \ 2128 do { \ 2129 int i; \ 2130 FLOAT_TO_INT_INTERNAL (VALUE, i); \ 2131 fprintf (FILE, "\t%s\t 0x%.8x\n", INT_ASM_OP, i); \ 2132 } while (0) 2133 2134/* Likewise for `int', `short', and `char' constants. */ 2135#define ASM_OUTPUT_INT(FILE,VALUE) \ 2136( fprintf (FILE, "\t%s\t ", INT_ASM_OP), \ 2137 output_addr_const (FILE, (VALUE)), \ 2138 fprintf (FILE, "\n")) 2139 2140#define ASM_OUTPUT_SHORT(FILE,VALUE) \ 2141( fprintf (FILE, "\t%s\t ", SHORT_ASM_OP), \ 2142 output_addr_const (FILE, (VALUE)), \ 2143 fprintf (FILE, "\n")) 2144 2145#define ASM_OUTPUT_CHAR(FILE,VALUE) \ 2146( fprintf (FILE, "\t%s\t ", CHAR_ASM_OP), \ 2147 output_addr_const (FILE, (VALUE)), \ 2148 fprintf (FILE, "\n")) 2149 2150/* This is how to output an assembler line for a numeric constant byte. */ 2151#define ASM_OUTPUT_BYTE(FILE,VALUE) \ 2152 fprintf (FILE, "\t%s\t 0x%x\n", CHAR_ASM_OP, (VALUE)) 2153 2154/* The single-byte pseudo-op is the default. Override svr[34].h. */ 2155#undef ASM_BYTE_OP 2156#define ASM_BYTE_OP "byte" 2157#undef ASM_OUTPUT_ASCII 2158#define ASM_OUTPUT_ASCII(FILE, P, SIZE) \ 2159 output_ascii (FILE, ASCII_DATA_ASM_OP, 48, P, SIZE) 2160 2161/* Override svr4.h. Change to the readonly data section for a table of 2162 addresses. final_scan_insn changes back to the text section. */ 2163#undef ASM_OUTPUT_CASE_LABEL 2164#define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLE) \ 2165 do { \ 2166 if (! CASE_VECTOR_INSNS) \ 2167 { \ 2168 readonly_data_section (); \ 2169 ASM_OUTPUT_ALIGN (FILE, 2); \ 2170 } \ 2171 ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); \ 2172 } while (0) 2173 2174/* Epilogue for case labels. This jump instruction is called by casesi 2175 to transfer to the appropriate branch instruction within the table. 2176 The label `@L<n>e' is coined to mark the end of the table. */ 2177#define ASM_OUTPUT_CASE_END(FILE, NUM, TABLE) \ 2178 do { \ 2179 if (CASE_VECTOR_INSNS) \ 2180 { \ 2181 char label[256]; \ 2182 ASM_GENERATE_INTERNAL_LABEL (label, "L", NUM); \ 2183 fprintf (FILE, "%se:\n", &label[1]); \ 2184 if (! flag_delayed_branch) \ 2185 fprintf (FILE, "\tlda\t %s,%s[%s]\n", reg_names[1], \ 2186 reg_names[1], reg_names[m88k_case_index]); \ 2187 fprintf (FILE, "\tjmp\t %s\n", reg_names[1]); \ 2188 } \ 2189 } while (0) 2190 2191/* This is how to output an element of a case-vector that is absolute. */ 2192#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ 2193 do { \ 2194 char buffer[256]; \ 2195 ASM_GENERATE_INTERNAL_LABEL (buffer, "L", VALUE); \ 2196 fprintf (FILE, CASE_VECTOR_INSNS ? "\tbr\t %s\n" : "\tword\t %s\n", \ 2197 &buffer[1]); \ 2198 } while (0) 2199 2200/* This is how to output an element of a case-vector that is relative. */ 2201#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ 2202 ASM_OUTPUT_ADDR_VEC_ELT (FILE, VALUE) 2203 2204/* This is how to output an assembler line 2205 that says to advance the location counter 2206 to a multiple of 2**LOG bytes. */ 2207#define ASM_OUTPUT_ALIGN(FILE,LOG) \ 2208 if ((LOG) != 0) \ 2209 fprintf (FILE, "\t%s\t %d\n", ALIGN_ASM_OP, 1<<(LOG)) 2210 2211/* On the m88100, align the text address to half a cache boundary when it 2212 can only be reached by jumping. Pack code tightly when compiling 2213 crtstuff.c. */ 2214#define LABEL_ALIGN_AFTER_BARRIER(LABEL) \ 2215 (TARGET_88100 && !flag_inhibit_size_directive ? 3 : 2) 2216 2217/* Override svr[34].h. */ 2218#undef ASM_OUTPUT_SKIP 2219#define ASM_OUTPUT_SKIP(FILE,SIZE) \ 2220 fprintf (FILE, "\t%s\t %u\n", SKIP_ASM_OP, (SIZE)) 2221 2222/* Override svr4.h. */ 2223#undef ASM_OUTPUT_EXTERNAL_LIBCALL 2224 2225/* This says how to output an assembler line to define a global common 2226 symbol. Size can be zero for the unusual case of a `struct { int : 0; }'. 2227 Override svr[34].h. */ 2228#undef ASM_OUTPUT_COMMON 2229#undef ASM_OUTPUT_ALIGNED_COMMON 2230#define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ 2231( fprintf ((FILE), "\t%s\t ", \ 2232 ((SIZE) ? (SIZE) : 1) <= m88k_gp_threshold ? SCOMM_ASM_OP : COMMON_ASM_OP), \ 2233 assemble_name ((FILE), (NAME)), \ 2234 fprintf ((FILE), ",%u\n", (SIZE) ? (SIZE) : 1)) 2235 2236/* This says how to output an assembler line to define a local common 2237 symbol. Override svr[34].h. */ 2238#undef ASM_OUTPUT_LOCAL 2239#undef ASM_OUTPUT_ALIGNED_LOCAL 2240#define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \ 2241( fprintf ((FILE), "\t%s\t ", \ 2242 ((SIZE) ? (SIZE) : 1) <= m88k_gp_threshold ? SBSS_ASM_OP : BSS_ASM_OP), \ 2243 assemble_name ((FILE), (NAME)), \ 2244 fprintf ((FILE), ",%u,%d\n", (SIZE) ? (SIZE) : 1, (SIZE) <= 4 ? 4 : 8)) 2245 2246/* Store in OUTPUT a string (made with alloca) containing 2247 an assembler-name for a local static variable named NAME. 2248 LABELNO is an integer which is different for each call. */ 2249#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ 2250( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ 2251 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) 2252 2253/* This is how to output an insn to push a register on the stack. 2254 It need not be very fast code. */ 2255#define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ 2256 fprintf (FILE, "\tsubu\t %s,%s,%d\n\tst\t %s,%s,0\n", \ 2257 reg_names[STACK_POINTER_REGNUM], \ 2258 reg_names[STACK_POINTER_REGNUM], \ 2259 (STACK_BOUNDARY / BITS_PER_UNIT), \ 2260 reg_names[REGNO], \ 2261 reg_names[STACK_POINTER_REGNUM]) 2262 2263/* Length in instructions of the code output by ASM_OUTPUT_REG_PUSH. */ 2264#define REG_PUSH_LENGTH 2 2265 2266/* This is how to output an insn to pop a register from the stack. */ 2267#define ASM_OUTPUT_REG_POP(FILE,REGNO) \ 2268 fprintf (FILE, "\tld\t %s,%s,0\n\taddu\t %s,%s,%d\n", \ 2269 reg_names[REGNO], \ 2270 reg_names[STACK_POINTER_REGNUM], \ 2271 reg_names[STACK_POINTER_REGNUM], \ 2272 reg_names[STACK_POINTER_REGNUM], \ 2273 (STACK_BOUNDARY / BITS_PER_UNIT)) 2274 2275/* Length in instructions of the code output by ASM_OUTPUT_REG_POP. */ 2276#define REG_POP_LENGTH 2 2277 2278/* Define the parentheses used to group arithmetic operations 2279 in assembler code. */ 2280#define ASM_OPEN_PAREN "(" 2281#define ASM_CLOSE_PAREN ")" 2282 2283/* Define results of standard character escape sequences. */ 2284#define TARGET_BELL 007 2285#define TARGET_BS 010 2286#define TARGET_TAB 011 2287#define TARGET_NEWLINE 012 2288#define TARGET_VT 013 2289#define TARGET_FF 014 2290#define TARGET_CR 015 2291 2292/* Macros to deal with OCS debug information */ 2293 2294#define OCS_START_PREFIX "Ltb" 2295#define OCS_END_PREFIX "Lte" 2296 2297#define PUT_OCS_FUNCTION_START(FILE) \ 2298 { ASM_OUTPUT_INTERNAL_LABEL (FILE, OCS_START_PREFIX, m88k_function_number); } 2299 2300#define PUT_OCS_FUNCTION_END(FILE) \ 2301 { ASM_OUTPUT_INTERNAL_LABEL (FILE, OCS_END_PREFIX, m88k_function_number); } 2302 2303/* Macros for debug information */ 2304#define DEBUGGER_AUTO_OFFSET(X) \ 2305 (m88k_debugger_offset (X, 0) \ 2306 + (TARGET_OCS_FRAME_POSITION ? 0 : m88k_stack_size - m88k_fp_offset)) 2307 2308#define DEBUGGER_ARG_OFFSET(OFFSET, X) \ 2309 (m88k_debugger_offset (X, OFFSET) \ 2310 + (TARGET_OCS_FRAME_POSITION ? 0 : m88k_stack_size - m88k_fp_offset)) 2311 2312/* Macros to deal with SDB debug information */ 2313#ifdef SDB_DEBUGGING_INFO 2314 2315/* Output structure tag names even when it causes a forward reference. */ 2316#define SDB_ALLOW_FORWARD_REFERENCES 2317 2318/* Print out extra debug information in the assembler file */ 2319#define PUT_SDB_SCL(a) \ 2320 do { \ 2321 register int s = (a); \ 2322 register char *scl; \ 2323 switch (s) \ 2324 { \ 2325 case C_EFCN: scl = "end of function"; break; \ 2326 case C_NULL: scl = "NULL storage class"; break; \ 2327 case C_AUTO: scl = "automatic"; break; \ 2328 case C_EXT: scl = "external"; break; \ 2329 case C_STAT: scl = "static"; break; \ 2330 case C_REG: scl = "register"; break; \ 2331 case C_EXTDEF: scl = "external definition"; break; \ 2332 case C_LABEL: scl = "label"; break; \ 2333 case C_ULABEL: scl = "undefined label"; break; \ 2334 case C_MOS: scl = "structure member"; break; \ 2335 case C_ARG: scl = "argument"; break; \ 2336 case C_STRTAG: scl = "structure tag"; break; \ 2337 case C_MOU: scl = "union member"; break; \ 2338 case C_UNTAG: scl = "union tag"; break; \ 2339 case C_TPDEF: scl = "typedef"; break; \ 2340 case C_USTATIC: scl = "uninitialized static"; break; \ 2341 case C_ENTAG: scl = "enumeration tag"; break; \ 2342 case C_MOE: scl = "member of enumeration"; break; \ 2343 case C_REGPARM: scl = "register parameter"; break; \ 2344 case C_FIELD: scl = "bit field"; break; \ 2345 case C_BLOCK: scl = "block start/end"; break; \ 2346 case C_FCN: scl = "function start/end"; break; \ 2347 case C_EOS: scl = "end of structure"; break; \ 2348 case C_FILE: scl = "filename"; break; \ 2349 case C_LINE: scl = "line"; break; \ 2350 case C_ALIAS: scl = "duplicated tag"; break; \ 2351 case C_HIDDEN: scl = "hidden"; break; \ 2352 default: scl = "unknown"; break; \ 2353 } \ 2354 \ 2355 fprintf(asm_out_file, "\tscl\t %d\t\t\t\t; %s\n", s, scl); \ 2356 } while (0) 2357 2358#define PUT_SDB_TYPE(a) \ 2359 do { \ 2360 register int t = (a); \ 2361 static char buffer[100]; \ 2362 register char *p = buffer, *q; \ 2363 register int typ = t; \ 2364 register int i,d; \ 2365 \ 2366 for (i = 0; i <= 5; i++) \ 2367 { \ 2368 switch ((typ >> ((i*N_TSHIFT) + N_BTSHFT)) & 03) \ 2369 { \ 2370 case DT_PTR: \ 2371 strcpy (p, "ptr to "); \ 2372 p += sizeof("ptr to"); \ 2373 break; \ 2374 \ 2375 case DT_ARY: \ 2376 strcpy (p, "array of "); \ 2377 p += sizeof("array of"); \ 2378 break; \ 2379 \ 2380 case DT_FCN: \ 2381 strcpy (p, "func ret "); \ 2382 p += sizeof("func ret"); \ 2383 break; \ 2384 } \ 2385 } \ 2386 \ 2387 switch (typ & N_BTMASK) \ 2388 { \ 2389 case T_NULL: q = "<no type>"; break; \ 2390 case T_CHAR: q = "char"; break; \ 2391 case T_SHORT: q = "short"; break; \ 2392 case T_INT: q = "int"; break; \ 2393 case T_LONG: q = "long"; break; \ 2394 case T_FLOAT: q = "float"; break; \ 2395 case T_DOUBLE: q = "double"; break; \ 2396 case T_STRUCT: q = "struct"; break; \ 2397 case T_UNION: q = "union"; break; \ 2398 case T_ENUM: q = "enum"; break; \ 2399 case T_MOE: q = "enum member"; break; \ 2400 case T_UCHAR: q = "unsigned char"; break; \ 2401 case T_USHORT: q = "unsigned short"; break; \ 2402 case T_UINT: q = "unsigned int"; break; \ 2403 case T_ULONG: q = "unsigned long"; break; \ 2404 default: q = "void"; break; \ 2405 } \ 2406 \ 2407 strcpy (p, q); \ 2408 fprintf(asm_out_file, "\ttype\t %d\t\t\t\t; %s\n", \ 2409 t, buffer); \ 2410 } while (0) 2411 2412#define PUT_SDB_INT_VAL(a) \ 2413 fprintf (asm_out_file, "\tval\t %d\n", (a)) 2414 2415#define PUT_SDB_VAL(a) \ 2416( fprintf (asm_out_file, "\tval\t "), \ 2417 output_addr_const (asm_out_file, (a)), \ 2418 fputc ('\n', asm_out_file)) 2419 2420#define PUT_SDB_DEF(a) \ 2421 do { fprintf (asm_out_file, "\tsdef\t "); \ 2422 ASM_OUTPUT_LABELREF (asm_out_file, a); \ 2423 fputc ('\n', asm_out_file); \ 2424 } while (0) 2425 2426#define PUT_SDB_PLAIN_DEF(a) \ 2427 fprintf(asm_out_file,"\tsdef\t .%s\n", a) 2428 2429/* Simply and endef now. */ 2430#define PUT_SDB_ENDEF \ 2431 fputs("\tendef\n\n", asm_out_file) 2432 2433#define PUT_SDB_SIZE(a) \ 2434 fprintf (asm_out_file, "\tsize\t %d\n", (a)) 2435 2436/* Max dimensions to store for debug information (limited by COFF). */ 2437#define SDB_MAX_DIM 6 2438 2439/* New method for dim operations. */ 2440#define PUT_SDB_START_DIM \ 2441 fputs("\tdim\t ", asm_out_file) 2442 2443/* How to end the DIM sequence. */ 2444#define PUT_SDB_LAST_DIM(a) \ 2445 fprintf(asm_out_file, "%d\n", a) 2446 2447#define PUT_SDB_TAG(a) \ 2448 do { \ 2449 fprintf (asm_out_file, "\ttag\t "); \ 2450 ASM_OUTPUT_LABELREF (asm_out_file, a); \ 2451 fputc ('\n', asm_out_file); \ 2452 } while( 0 ) 2453 2454#define PUT_SDB_BLOCK_OR_FUNCTION(NAME, SCL, LINE) \ 2455 do { \ 2456 fprintf (asm_out_file, "\n\tsdef\t %s\n\tval\t .\n", \ 2457 NAME); \ 2458 PUT_SDB_SCL( SCL ); \ 2459 fprintf (asm_out_file, "\tline\t %d\n\tendef\n\n", \ 2460 (LINE)); \ 2461 } while (0) 2462 2463#define PUT_SDB_BLOCK_START(LINE) \ 2464 PUT_SDB_BLOCK_OR_FUNCTION (".bb", C_BLOCK, (LINE)) 2465 2466#define PUT_SDB_BLOCK_END(LINE) \ 2467 PUT_SDB_BLOCK_OR_FUNCTION (".eb", C_BLOCK, (LINE)) 2468 2469#define PUT_SDB_FUNCTION_START(LINE) \ 2470 do { \ 2471 fprintf (asm_out_file, "\tln\t 1\n"); \ 2472 PUT_SDB_BLOCK_OR_FUNCTION (".bf", C_FCN, (LINE)); \ 2473 } while (0) 2474 2475#define PUT_SDB_FUNCTION_END(LINE) \ 2476 do { \ 2477 PUT_SDB_BLOCK_OR_FUNCTION (".ef", C_FCN, (LINE)); \ 2478 } while (0) 2479 2480#define PUT_SDB_EPILOGUE_END(NAME) \ 2481 do { \ 2482 text_section (); \ 2483 fprintf (asm_out_file, "\n\tsdef\t "); \ 2484 ASM_OUTPUT_LABELREF(asm_out_file, (NAME)); \ 2485 fputc('\n', asm_out_file); \ 2486 PUT_SDB_SCL( C_EFCN ); \ 2487 fprintf (asm_out_file, "\tendef\n\n"); \ 2488 } while (0) 2489 2490#define SDB_GENERATE_FAKE(BUFFER, NUMBER) \ 2491 sprintf ((BUFFER), ".%dfake", (NUMBER)); 2492 2493#endif /* SDB_DEBUGGING_INFO */ 2494 2495/* Support const and tdesc sections. Generally, a const section will 2496 be distinct from the text section whenever we do V.4-like things 2497 and so follows DECLARE_ASM_NAME. Note that strings go in text 2498 rather than const. Override svr[34].h. */ 2499 2500#undef USE_CONST_SECTION 2501#undef EXTRA_SECTIONS 2502 2503#define USE_CONST_SECTION DECLARE_ASM_NAME 2504 2505#if defined(USING_SVR4_H) 2506 2507#define EXTRA_SECTIONS in_const, in_tdesc, in_sdata, in_ctors, in_dtors 2508#define INIT_SECTION_FUNCTION 2509#define FINI_SECTION_FUNCTION 2510 2511#else 2512#if defined(USING_SVR3_H) 2513 2514#define EXTRA_SECTIONS in_const, in_tdesc, in_sdata, in_ctors, in_dtors, \ 2515 in_init, in_fini 2516 2517#else /* luna or other not based on svr[34].h. */ 2518 2519#undef INIT_SECTION_ASM_OP 2520#define EXTRA_SECTIONS in_const, in_tdesc, in_sdata 2521#define CONST_SECTION_FUNCTION \ 2522void \ 2523const_section () \ 2524{ \ 2525 text_section(); \ 2526} 2527#define CTORS_SECTION_FUNCTION 2528#define DTORS_SECTION_FUNCTION 2529#define INIT_SECTION_FUNCTION 2530#define FINI_SECTION_FUNCTION 2531 2532#endif /* USING_SVR3_H */ 2533#endif /* USING_SVR4_H */ 2534 2535#undef EXTRA_SECTION_FUNCTIONS 2536#define EXTRA_SECTION_FUNCTIONS \ 2537 CONST_SECTION_FUNCTION \ 2538 \ 2539void \ 2540tdesc_section () \ 2541{ \ 2542 if (in_section != in_tdesc) \ 2543 { \ 2544 fprintf (asm_out_file, "%s\n", TDESC_SECTION_ASM_OP); \ 2545 in_section = in_tdesc; \ 2546 } \ 2547} \ 2548 \ 2549void \ 2550sdata_section () \ 2551{ \ 2552 if (in_section != in_sdata) \ 2553 { \ 2554 fprintf (asm_out_file, "%s\n", SDATA_SECTION_ASM_OP); \ 2555 in_section = in_sdata; \ 2556 } \ 2557} \ 2558 \ 2559 CTORS_SECTION_FUNCTION \ 2560 DTORS_SECTION_FUNCTION \ 2561 INIT_SECTION_FUNCTION \ 2562 FINI_SECTION_FUNCTION 2563 2564/* A C statement or statements to switch to the appropriate 2565 section for output of DECL. DECL is either a `VAR_DECL' node 2566 or a constant of some sort. RELOC indicates whether forming 2567 the initial value of DECL requires link-time relocations. 2568 2569 For strings, the section is selected before the segment info is encoded. */ 2570#undef SELECT_SECTION 2571#define SELECT_SECTION(DECL,RELOC) \ 2572{ \ 2573 if (TREE_CODE (DECL) == STRING_CST) \ 2574 { \ 2575 if (! flag_writable_strings) \ 2576 const_section (); \ 2577 else if ( TREE_STRING_LENGTH (DECL) <= m88k_gp_threshold) \ 2578 sdata_section (); \ 2579 else \ 2580 data_section (); \ 2581 } \ 2582 else if (TREE_CODE (DECL) == VAR_DECL) \ 2583 { \ 2584 if (SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0))) \ 2585 sdata_section (); \ 2586 else if ((flag_pic && RELOC) \ 2587 || !TREE_READONLY (DECL) || TREE_SIDE_EFFECTS (DECL) \ 2588 || !DECL_INITIAL (DECL) \ 2589 || (DECL_INITIAL (DECL) != error_mark_node \ 2590 && !TREE_CONSTANT (DECL_INITIAL (DECL)))) \ 2591 data_section (); \ 2592 else \ 2593 const_section (); \ 2594 } \ 2595 else \ 2596 const_section (); \ 2597} 2598 2599/* Jump tables consist of branch instructions and should be output in 2600 the text section. When we use a table of addresses, we explicitly 2601 change to the readonly data section. */ 2602#define JUMP_TABLES_IN_TEXT_SECTION 1 2603 2604/* Define this macro if references to a symbol must be treated differently 2605 depending on something about the variable or function named by the 2606 symbol (such as what section it is in). 2607 2608 The macro definition, if any, is executed immediately after the rtl for 2609 DECL has been created and stored in `DECL_RTL (DECL)'. The value of the 2610 rtl will be a `mem' whose address is a `symbol_ref'. 2611 2612 For the m88k, determine if the item should go in the global pool. */ 2613#define ENCODE_SECTION_INFO(DECL) \ 2614 do { \ 2615 if (m88k_gp_threshold > 0) \ 2616 if (TREE_CODE (DECL) == VAR_DECL) \ 2617 { \ 2618 if (!TREE_READONLY (DECL) || TREE_SIDE_EFFECTS (DECL)) \ 2619 { \ 2620 int size = int_size_in_bytes (TREE_TYPE (DECL)); \ 2621 \ 2622 if (size > 0 && size <= m88k_gp_threshold) \ 2623 SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; \ 2624 } \ 2625 } \ 2626 else if (TREE_CODE (DECL) == STRING_CST \ 2627 && flag_writable_strings \ 2628 && TREE_STRING_LENGTH (DECL) <= m88k_gp_threshold) \ 2629 SYMBOL_REF_FLAG (XEXP (TREE_CST_RTL (DECL), 0)) = 1; \ 2630 } while (0) 2631 2632/* Print operand X (an rtx) in assembler syntax to file FILE. 2633 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. 2634 For `%' followed by punctuation, CODE is the punctuation and X is null. */ 2635#define PRINT_OPERAND_PUNCT_VALID_P(c) \ 2636 ((c) == '#' || (c) == '.' || (c) == '!' || (c) == '*' || (c) == ';') 2637 2638#define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE) 2639 2640/* Print a memory address as an operand to reference that memory location. */ 2641#define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR) 2642 2643/* This says not to strength reduce the addr calculations within loops 2644 (otherwise it does not take advantage of m88k scaled loads and stores */ 2645 2646#define DONT_REDUCE_ADDR 2647