13. When find_reloads is used to count number of spills needed 2it does not take into account the fact that a reload may 3turn out to be a dummy. 4 5I'm not sure this really happens any more. Doesn't it find 6all the dummies on both passes? 7 810. movl a3@,a0 9 movl a3@(16),a1 10 clrb a0@(a1:l) 11is generated and may be worse than 12 movl a3@,a0 13 addl a3@(16),a0 14 clrb a0@ 15If ordering of operands is improved, many more 16such cases will be generated from typical array accesses. 17 1838. Hack expand_mult so that if there is no same-modes multiply 19it will use a widening multiply and then truncate rather than 20calling the library. 21 2239. Hack expanding of division to notice cases for 23long -> short division. 24 2540. Represent divide insns as (DIV:SI ...) followed by 26a separate lowpart extract. Represent remainder insns as DIV:SI 27followed by a separate highpart extract. Then cse can work on 28the DIV:SI part. Problem is, this may not be desirable on machines 29where computing the quotient alone does not necessarily give 30a remainder--such as the 68020 for long operands. 31 3252. Reloading can look at how reload_contents got set up. 33If it was copied from a register, just reload from that register. 34Otherwise, perhaps can change the previous insn to move the 35data via the reload reg, thus avoiding one memory ref. 36 3763. Potential problem in cc_status.value2, if it ever activates itself 38after a two-address subtraction (which currently cannot happen). 39It is supposed to compare the current value of the destination 40but eliminating it would use the results of the subtraction, equivalent 41to comparing the previous value of the destination. 42 4365. Should loops that neither start nor end with a break 44be rearranged to end with the last break? 45 4669. Define the floating point converting arithmetic instructions 47for the 68881. 48 4974. Combine loop opt with cse opt in one pass. Do cse on each loop, 50then loop opt on that loop, and go from innermost loops outward. 51Make loop invariants available for cse at end of loop. 52 5385. pea can force a value to be reloaded into an areg 54which can make it worse than separate adding and pushing. 55This can only happen for adding something within addql range 56and it only loses if the qty becomes dead at that point 57so it can be added to with no copying. 58 5993. If a pseudo doesn't get a hard reg everywhere, 60can it get one during a loop? 61 6296. Can do SImode bitfield insns without reloading, but must 63alter the operands in special ways. 64 6599. final could check loop-entry branches to see if they 66screw up deletion of a test instruction. If they do, 67can put another test instruction before the branch and 68make it conditional and redirect it. 69 70106. Aliasing may be impossible if data types of refs differ 71and data type of containing objects also differ. 72(But check this wrt unions.) 73 74108. Can speed up flow analysis by making a table saying which 75register is set and which registers are used by each instruction that 76only sets one register and only uses two. This way avoid the tree 77walk for such instructions (most instructions). 78 79109. It is desirable to avoid converting INDEX to SImode if a 80narrower mode suffices, as HImode does on the 68000. 81How can this be done? 82 83110. Possible special combination pattern: 84If the two operands to a comparison die there and both come from insns 85that are identical except for replacing one operand with the other, 86throw away those insns. Ok if insns being discarded are known 1 to 1. 87An andl #1 after a seq is 1 to 1, but how should compiler know that? 88 89112. Can convert float to unsigned int by subtracting a constant, 90converting to signed int, and changing the sign bit. 91 92117. Any number of slow zero-extensions in one loop, that have 93their clr insns moved out of the loop, can share one register 94if their original life spans are disjoint. 95But it may be hard to be sure of this since 96the life span data that regscan produces may be hard to interpret 97validly or may be incorrect after cse. 98 99118. In cse, when a bfext insn refers to a register, if the field 100corresponds to a halfword or a byte and the register is equivalent 101to a memory location, it would be possible to detect this and 102replace it with a simple memory reference. 103 104121. Insns that store two values cannot be moved out of loops. 105The code in scan_loop doesn't even try to deal with them. 106 107122. When insn-output.c turns a bit-test into a sign-test, 108it should see whether the cc is already set up with that sign. 109 110123. When a conditional expression is used as a function arg, it would 111be faster (and in some cases shorter) to push each alternative rather 112than compute in a register and push that. This would require 113being able to specify "push this" as a target for expand_expr. 114 115124. On the 386, bad code results from foo (bar ()) when bar 116returns a double, because the pseudo used fails to get preferenced 117into an fp reg because of the distinction between regs 8 and 9. 118