1/* mips16-opc.c. Mips16 opcode table. 2 Copyright 1996, 1997, 1998, 2000, 2005 Free Software Foundation, Inc. 3 Contributed by Ian Lance Taylor, Cygnus Support 4 5This file is part of GDB, GAS, and the GNU binutils. 6 7GDB, GAS, and the GNU binutils are free software; you can redistribute 8them and/or modify them under the terms of the GNU General Public 9License as published by the Free Software Foundation; either version 101, or (at your option) any later version. 11 12GDB, GAS, and the GNU binutils are distributed in the hope that they 13will be useful, but WITHOUT ANY WARRANTY; without even the implied 14warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See 15the GNU General Public License for more details. 16 17You should have received a copy of the GNU General Public License 18along with this file; see the file COPYING. If not, write to the Free 19Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 2002110-1301, USA. */ 21 22#include <stdio.h> 23#include "sysdep.h" 24#include "opcode/mips.h" 25 26/* This is the opcodes table for the mips16 processor. The format of 27 this table is intentionally identical to the one in mips-opc.c. 28 However, the special letters that appear in the argument string are 29 different, and the table uses some different flags. */ 30 31/* Use some short hand macros to keep down the length of the lines in 32 the opcodes table. */ 33 34#define UBD INSN_UNCOND_BRANCH_DELAY 35#define BR MIPS16_INSN_BRANCH 36 37#define WR_x MIPS16_INSN_WRITE_X 38#define WR_y MIPS16_INSN_WRITE_Y 39#define WR_z MIPS16_INSN_WRITE_Z 40#define WR_T MIPS16_INSN_WRITE_T 41#define WR_SP MIPS16_INSN_WRITE_SP 42#define WR_31 MIPS16_INSN_WRITE_31 43#define WR_Y MIPS16_INSN_WRITE_GPR_Y 44 45#define RD_x MIPS16_INSN_READ_X 46#define RD_y MIPS16_INSN_READ_Y 47#define RD_Z MIPS16_INSN_READ_Z 48#define RD_T MIPS16_INSN_READ_T 49#define RD_SP MIPS16_INSN_READ_SP 50#define RD_31 MIPS16_INSN_READ_31 51#define RD_PC MIPS16_INSN_READ_PC 52#define RD_X MIPS16_INSN_READ_GPR_X 53 54#define WR_HI INSN_WRITE_HI 55#define WR_LO INSN_WRITE_LO 56#define RD_HI INSN_READ_HI 57#define RD_LO INSN_READ_LO 58 59#define TRAP INSN_TRAP 60 61#define I3 INSN_ISA3 62 63#define T3 INSN_3900 64 65const struct mips_opcode mips16_opcodes[] = 66{ 67{"nop", "", 0x6500, 0xffff, RD_Z, 0, 0 }, /* move $0,$Z */ 68{"la", "x,A", 0x0800, 0xf800, WR_x|RD_PC, 0, 0 }, 69{"abs", "x,w", 0, (int) M_ABS, INSN_MACRO, 0, 0 }, 70{"addiu", "y,x,4", 0x4000, 0xf810, WR_y|RD_x, 0, 0 }, 71{"addiu", "x,k", 0x4800, 0xf800, WR_x|RD_x, 0, 0 }, 72{"addiu", "S,K", 0x6300, 0xff00, WR_SP|RD_SP, 0, 0 }, 73{"addiu", "S,S,K", 0x6300, 0xff00, WR_SP|RD_SP, 0, 0 }, 74{"addiu", "x,P,V", 0x0800, 0xf800, WR_x|RD_PC, 0, 0 }, 75{"addiu", "x,S,V", 0x0000, 0xf800, WR_x|RD_SP, 0, 0 }, 76{"addu", "z,v,y", 0xe001, 0xf803, WR_z|RD_x|RD_y, 0, 0 }, 77{"addu", "y,x,4", 0x4000, 0xf810, WR_y|RD_x, 0, 0 }, 78{"addu", "x,k", 0x4800, 0xf800, WR_x|RD_x, 0, 0 }, 79{"addu", "S,K", 0x6300, 0xff00, WR_SP|RD_SP, 0, 0 }, 80{"addu", "S,S,K", 0x6300, 0xff00, WR_SP|RD_SP, 0, 0 }, 81{"addu", "x,P,V", 0x0800, 0xf800, WR_x|RD_PC, 0, 0 }, 82{"addu", "x,S,V", 0x0000, 0xf800, WR_x|RD_SP, 0, 0 }, 83{"and", "x,y", 0xe80c, 0xf81f, WR_x|RD_x|RD_y, 0, 0 }, 84{"b", "q", 0x1000, 0xf800, BR, 0, 0 }, 85{"beq", "x,y,p", 0, (int) M_BEQ, INSN_MACRO, 0, 0 }, 86{"beq", "x,U,p", 0, (int) M_BEQ_I, INSN_MACRO, 0, 0 }, 87{"beqz", "x,p", 0x2000, 0xf800, BR|RD_x, 0, 0 }, 88{"bge", "x,y,p", 0, (int) M_BGE, INSN_MACRO, 0, 0 }, 89{"bge", "x,8,p", 0, (int) M_BGE_I, INSN_MACRO, 0, 0 }, 90{"bgeu", "x,y,p", 0, (int) M_BGEU, INSN_MACRO, 0, 0 }, 91{"bgeu", "x,8,p", 0, (int) M_BGEU_I, INSN_MACRO, 0, 0 }, 92{"bgt", "x,y,p", 0, (int) M_BGT, INSN_MACRO, 0, 0 }, 93{"bgt", "x,8,p", 0, (int) M_BGT_I, INSN_MACRO, 0, 0 }, 94{"bgtu", "x,y,p", 0, (int) M_BGTU, INSN_MACRO, 0, 0 }, 95{"bgtu", "x,8,p", 0, (int) M_BGTU_I, INSN_MACRO, 0, 0 }, 96{"ble", "x,y,p", 0, (int) M_BLE, INSN_MACRO, 0, 0 }, 97{"ble", "x,8,p", 0, (int) M_BLE_I, INSN_MACRO, 0, 0 }, 98{"bleu", "x,y,p", 0, (int) M_BLEU, INSN_MACRO, 0, 0 }, 99{"bleu", "x,8,p", 0, (int) M_BLEU_I, INSN_MACRO, 0, 0 }, 100{"blt", "x,y,p", 0, (int) M_BLT, INSN_MACRO, 0, 0 }, 101{"blt", "x,8,p", 0, (int) M_BLT_I, INSN_MACRO, 0, 0 }, 102{"bltu", "x,y,p", 0, (int) M_BLTU, INSN_MACRO, 0, 0 }, 103{"bltu", "x,8,p", 0, (int) M_BLTU_I, INSN_MACRO, 0, 0 }, 104{"bne", "x,y,p", 0, (int) M_BNE, INSN_MACRO, 0, 0 }, 105{"bne", "x,U,p", 0, (int) M_BNE_I, INSN_MACRO, 0, 0 }, 106{"bnez", "x,p", 0x2800, 0xf800, BR|RD_x, 0, 0 }, 107{"break", "6", 0xe805, 0xf81f, TRAP, 0, 0 }, 108{"bteqz", "p", 0x6000, 0xff00, BR|RD_T, 0, 0 }, 109{"btnez", "p", 0x6100, 0xff00, BR|RD_T, 0, 0 }, 110{"cmpi", "x,U", 0x7000, 0xf800, WR_T|RD_x, 0, 0 }, 111{"cmp", "x,y", 0xe80a, 0xf81f, WR_T|RD_x|RD_y, 0, 0 }, 112{"cmp", "x,U", 0x7000, 0xf800, WR_T|RD_x, 0, 0 }, 113{"dla", "y,E", 0xfe00, 0xff00, WR_y|RD_PC, 0, I3 }, 114{"daddiu", "y,x,4", 0x4010, 0xf810, WR_y|RD_x, 0, I3 }, 115{"daddiu", "y,j", 0xfd00, 0xff00, WR_y|RD_y, 0, I3 }, 116{"daddiu", "S,K", 0xfb00, 0xff00, WR_SP|RD_SP, 0, I3 }, 117{"daddiu", "S,S,K", 0xfb00, 0xff00, WR_SP|RD_SP, 0, I3 }, 118{"daddiu", "y,P,W", 0xfe00, 0xff00, WR_y|RD_PC, 0, I3 }, 119{"daddiu", "y,S,W", 0xff00, 0xff00, WR_y|RD_SP, 0, I3 }, 120{"daddu", "z,v,y", 0xe000, 0xf803, WR_z|RD_x|RD_y, 0, I3 }, 121{"daddu", "y,x,4", 0x4010, 0xf810, WR_y|RD_x, 0, I3 }, 122{"daddu", "y,j", 0xfd00, 0xff00, WR_y|RD_y, 0, I3 }, 123{"daddu", "S,K", 0xfb00, 0xff00, WR_SP|RD_SP, 0, I3 }, 124{"daddu", "S,S,K", 0xfb00, 0xff00, WR_SP|RD_SP, 0, I3 }, 125{"daddu", "y,P,W", 0xfe00, 0xff00, WR_y|RD_PC, 0, I3 }, 126{"daddu", "y,S,W", 0xff00, 0xff00, WR_y|RD_SP, 0, I3 }, 127{"ddiv", "0,x,y", 0xe81e, 0xf81f, RD_x|RD_y|WR_HI|WR_LO, 0, I3 }, 128{"ddiv", "z,v,y", 0, (int) M_DDIV_3, INSN_MACRO, 0, 0 }, 129{"ddivu", "0,x,y", 0xe81f, 0xf81f, RD_x|RD_y|WR_HI|WR_LO, 0, I3 }, 130{"ddivu", "z,v,y", 0, (int) M_DDIVU_3, INSN_MACRO, 0, 0 }, 131{"div", "0,x,y", 0xe81a, 0xf81f, RD_x|RD_y|WR_HI|WR_LO, 0, 0 }, 132{"div", "z,v,y", 0, (int) M_DIV_3, INSN_MACRO, 0, 0 }, 133{"divu", "0,x,y", 0xe81b, 0xf81f, RD_x|RD_y|WR_HI|WR_LO, 0, 0 }, 134{"divu", "z,v,y", 0, (int) M_DIVU_3, INSN_MACRO, 0, 0 }, 135{"dmul", "z,v,y", 0, (int) M_DMUL, INSN_MACRO, 0, I3 }, 136{"dmult", "x,y", 0xe81c, 0xf81f, RD_x|RD_y|WR_HI|WR_LO, 0, I3 }, 137{"dmultu", "x,y", 0xe81d, 0xf81f, RD_x|RD_y|WR_HI|WR_LO, 0, I3 }, 138{"drem", "0,x,y", 0xe81e, 0xf81f, RD_x|RD_y|WR_HI|WR_LO, 0, I3 }, 139{"drem", "z,v,y", 0, (int) M_DREM_3, INSN_MACRO, 0, 0 }, 140{"dremu", "0,x,y", 0xe81f, 0xf81f, RD_x|RD_y|WR_HI|WR_LO, 0, I3 }, 141{"dremu", "z,v,y", 0, (int) M_DREMU_3, INSN_MACRO, 0, 0 }, 142{"dsllv", "y,x", 0xe814, 0xf81f, WR_y|RD_y|RD_x, 0, I3 }, 143{"dsll", "x,w,[", 0x3001, 0xf803, WR_x|RD_y, 0, I3 }, 144{"dsll", "y,x", 0xe814, 0xf81f, WR_y|RD_y|RD_x, 0, I3 }, 145{"dsrav", "y,x", 0xe817, 0xf81f, WR_y|RD_y|RD_x, 0, I3 }, 146{"dsra", "y,]", 0xe813, 0xf81f, WR_y|RD_y, 0, I3 }, 147{"dsra", "y,x", 0xe817, 0xf81f, WR_y|RD_y|RD_x, 0, I3 }, 148{"dsrlv", "y,x", 0xe816, 0xf81f, WR_y|RD_y|RD_x, 0, I3 }, 149{"dsrl", "y,]", 0xe808, 0xf81f, WR_y|RD_y, 0, I3 }, 150{"dsrl", "y,x", 0xe816, 0xf81f, WR_y|RD_y|RD_x, 0, I3 }, 151{"dsubu", "z,v,y", 0xe002, 0xf803, WR_z|RD_x|RD_y, 0, I3 }, 152{"dsubu", "y,x,4", 0, (int) M_DSUBU_I, INSN_MACRO, 0, 0 }, 153{"dsubu", "y,j", 0, (int) M_DSUBU_I_2, INSN_MACRO, 0, 0 }, 154{"exit", "L", 0xed09, 0xff1f, TRAP, 0, 0 }, 155{"exit", "L", 0xee09, 0xff1f, TRAP, 0, 0 }, 156{"exit", "L", 0xef09, 0xff1f, TRAP, 0, 0 }, 157{"entry", "l", 0xe809, 0xf81f, TRAP, 0, 0 }, 158{"extend", "e", 0xf000, 0xf800, 0, 0, 0 }, 159{"jalr", "x", 0xe840, 0xf8ff, UBD|WR_31|RD_x, 0, 0 }, 160{"jalr", "R,x", 0xe840, 0xf8ff, UBD|WR_31|RD_x, 0, 0 }, 161{"jal", "x", 0xe840, 0xf8ff, UBD|WR_31|RD_x, 0, 0 }, 162{"jal", "R,x", 0xe840, 0xf8ff, UBD|WR_31|RD_x, 0, 0 }, 163{"jal", "a", 0x1800, 0xfc00, UBD|WR_31, 0, 0 }, 164{"jalx", "a", 0x1c00, 0xfc00, UBD|WR_31, 0, 0 }, 165{"jr", "x", 0xe800, 0xf8ff, UBD|RD_x, 0, 0 }, 166{"jr", "R", 0xe820, 0xffff, UBD|RD_31, 0, 0 }, 167{"j", "x", 0xe800, 0xf8ff, UBD|RD_x, 0, 0 }, 168{"j", "R", 0xe820, 0xffff, UBD|RD_31, 0, 0 }, 169{"lb", "y,5(x)", 0x8000, 0xf800, WR_y|RD_x, 0, 0 }, 170{"lbu", "y,5(x)", 0xa000, 0xf800, WR_y|RD_x, 0, 0 }, 171{"ld", "y,D(x)", 0x3800, 0xf800, WR_y|RD_x, 0, I3 }, 172{"ld", "y,B", 0xfc00, 0xff00, WR_y|RD_PC, 0, I3 }, 173{"ld", "y,D(P)", 0xfc00, 0xff00, WR_y|RD_PC, 0, I3 }, 174{"ld", "y,D(S)", 0xf800, 0xff00, WR_y|RD_SP, 0, I3 }, 175{"lh", "y,H(x)", 0x8800, 0xf800, WR_y|RD_x, 0, 0 }, 176{"lhu", "y,H(x)", 0xa800, 0xf800, WR_y|RD_x, 0, 0 }, 177{"li", "x,U", 0x6800, 0xf800, WR_x, 0, 0 }, 178{"lw", "y,W(x)", 0x9800, 0xf800, WR_y|RD_x, 0, 0 }, 179{"lw", "x,A", 0xb000, 0xf800, WR_x|RD_PC, 0, 0 }, 180{"lw", "x,V(P)", 0xb000, 0xf800, WR_x|RD_PC, 0, 0 }, 181{"lw", "x,V(S)", 0x9000, 0xf800, WR_x|RD_SP, 0, 0 }, 182{"lwu", "y,W(x)", 0xb800, 0xf800, WR_y|RD_x, 0, I3 }, 183{"mfhi", "x", 0xe810, 0xf8ff, WR_x|RD_HI, 0, 0 }, 184{"mflo", "x", 0xe812, 0xf8ff, WR_x|RD_LO, 0, 0 }, 185{"move", "y,X", 0x6700, 0xff00, WR_y|RD_X, 0, 0 }, 186{"move", "Y,Z", 0x6500, 0xff00, WR_Y|RD_Z, 0, 0 }, 187{"mul", "z,v,y", 0, (int) M_MUL, INSN_MACRO, 0, 0 }, 188{"mult", "x,y", 0xe818, 0xf81f, RD_x|RD_y|WR_HI|WR_LO, 0, 0 }, 189{"multu", "x,y", 0xe819, 0xf81f, RD_x|RD_y|WR_HI|WR_LO, 0, 0 }, 190{"neg", "x,w", 0xe80b, 0xf81f, WR_x|RD_y, 0, 0 }, 191{"not", "x,w", 0xe80f, 0xf81f, WR_x|RD_y, 0, 0 }, 192{"or", "x,y", 0xe80d, 0xf81f, WR_x|RD_x|RD_y, 0, 0 }, 193{"rem", "0,x,y", 0xe81a, 0xf81f, RD_x|RD_y|WR_HI|WR_LO, 0, 0 }, 194{"rem", "z,v,y", 0, (int) M_REM_3, INSN_MACRO, 0, 0 }, 195{"remu", "0,x,y", 0xe81b, 0xf81f, RD_x|RD_y|WR_HI|WR_LO, 0, 0 }, 196{"remu", "z,v,y", 0, (int) M_REMU_3, INSN_MACRO, 0, 0 }, 197{"sb", "y,5(x)", 0xc000, 0xf800, RD_y|RD_x, 0, 0 }, 198{"sd", "y,D(x)", 0x7800, 0xf800, RD_y|RD_x, 0, I3 }, 199{"sd", "y,D(S)", 0xf900, 0xff00, RD_y|RD_PC, 0, I3 }, 200{"sd", "R,C(S)", 0xfa00, 0xff00, RD_31|RD_PC, 0, 0 }, 201{"sh", "y,H(x)", 0xc800, 0xf800, RD_y|RD_x, 0, 0 }, 202{"sllv", "y,x", 0xe804, 0xf81f, WR_y|RD_y|RD_x, 0, 0 }, 203{"sll", "x,w,<", 0x3000, 0xf803, WR_x|RD_y, 0, 0 }, 204{"sll", "y,x", 0xe804, 0xf81f, WR_y|RD_y|RD_x, 0, 0 }, 205{"slti", "x,8", 0x5000, 0xf800, WR_T|RD_x, 0, 0 }, 206{"slt", "x,y", 0xe802, 0xf81f, WR_T|RD_x|RD_y, 0, 0 }, 207{"slt", "x,8", 0x5000, 0xf800, WR_T|RD_x, 0, 0 }, 208{"sltiu", "x,8", 0x5800, 0xf800, WR_T|RD_x, 0, 0 }, 209{"sltu", "x,y", 0xe803, 0xf81f, WR_T|RD_x|RD_y, 0, 0 }, 210{"sltu", "x,8", 0x5800, 0xf800, WR_T|RD_x, 0, 0 }, 211{"srav", "y,x", 0xe807, 0xf81f, WR_y|RD_y|RD_x, 0, 0 }, 212{"sra", "x,w,<", 0x3003, 0xf803, WR_x|RD_y, 0, 0 }, 213{"sra", "y,x", 0xe807, 0xf81f, WR_y|RD_y|RD_x, 0, 0 }, 214{"srlv", "y,x", 0xe806, 0xf81f, WR_y|RD_y|RD_x, 0, 0 }, 215{"srl", "x,w,<", 0x3002, 0xf803, WR_x|RD_y, 0, 0 }, 216{"srl", "y,x", 0xe806, 0xf81f, WR_y|RD_y|RD_x, 0, 0 }, 217{"subu", "z,v,y", 0xe003, 0xf803, WR_z|RD_x|RD_y, 0, 0 }, 218{"subu", "y,x,4", 0, (int) M_SUBU_I, INSN_MACRO, 0, 0 }, 219{"subu", "x,k", 0, (int) M_SUBU_I_2, INSN_MACRO,0, 0 }, 220{"sw", "y,W(x)", 0xd800, 0xf800, RD_y|RD_x, 0, 0 }, 221{"sw", "x,V(S)", 0xd000, 0xf800, RD_x|RD_SP, 0, 0 }, 222{"sw", "R,V(S)", 0x6200, 0xff00, RD_31|RD_SP, 0, 0 }, 223{"xor", "x,y", 0xe80e, 0xf81f, WR_x|RD_x|RD_y, 0, 0 }, 224 /* MIPS16e additions */ 225{"jalrc", "x", 0xe8c0, 0xf8ff, WR_31|RD_x|TRAP, 0, 0 }, 226{"jalrc", "R,x", 0xe8c0, 0xf8ff, WR_31|RD_x|TRAP, 0, 0 }, 227{"jrc", "x", 0xe880, 0xf8ff, RD_x|TRAP, 0, 0 }, 228{"jrc", "R", 0xe8a0, 0xffff, RD_31|TRAP, 0, 0 }, 229{"restore", "M", 0x6400, 0xff80, WR_31|RD_SP|WR_SP|TRAP, 0, 0 }, 230{"save", "m", 0x6480, 0xff80, RD_31|RD_SP|WR_SP|TRAP, 0, 0 }, 231{"seb", "x", 0xe891, 0xf8ff, WR_x|RD_x, 0, 0 }, 232{"seh", "x", 0xe8b1, 0xf8ff, WR_x|RD_x, 0, 0 }, 233{"sew", "x", 0xe8d1, 0xf8ff, WR_x|RD_x, 0, I3 }, 234{"zeb", "x", 0xe811, 0xf8ff, WR_x|RD_x, 0, 0 }, 235{"zeh", "x", 0xe831, 0xf8ff, WR_x|RD_x, 0, 0 }, 236{"zew", "x", 0xe851, 0xf8ff, WR_x|RD_x, 0, I3 }, 237}; 238 239const int bfd_mips16_num_opcodes = 240 ((sizeof mips16_opcodes) / (sizeof (mips16_opcodes[0]))); 241