1/* Print Motorola 68k instructions. 2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006 4 Free Software Foundation, Inc. 5 6 This file is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 2 of the License, or 9 (at your option) any later version. 10 11 This program is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 GNU General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with this program; if not, write to the Free Software 18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, 19 MA 02110-1301, USA. */ 20 21#include "sysdep.h" 22#include "dis-asm.h" 23#include "floatformat.h" 24#include "libiberty.h" 25#include "opintl.h" 26 27#include "opcode/m68k.h" 28 29/* Local function prototypes. */ 30 31const char * const fpcr_names[] = 32{ 33 "", "%fpiar", "%fpsr", "%fpiar/%fpsr", "%fpcr", 34 "%fpiar/%fpcr", "%fpsr/%fpcr", "%fpiar/%fpsr/%fpcr" 35}; 36 37static char *const reg_names[] = 38{ 39 "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7", 40 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp", 41 "%ps", "%pc" 42}; 43 44/* Name of register halves for MAC/EMAC. 45 Seperate from reg_names since 'spu', 'fpl' look weird. */ 46static char *const reg_half_names[] = 47{ 48 "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7", 49 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%a6", "%a7", 50 "%ps", "%pc" 51}; 52 53/* Sign-extend an (unsigned char). */ 54#if __STDC__ == 1 55#define COERCE_SIGNED_CHAR(ch) ((signed char) (ch)) 56#else 57#define COERCE_SIGNED_CHAR(ch) ((int) (((ch) ^ 0x80) & 0xFF) - 128) 58#endif 59 60/* Get a 1 byte signed integer. */ 61#define NEXTBYTE(p) (p += 2, FETCH_DATA (info, p), COERCE_SIGNED_CHAR(p[-1])) 62 63/* Get a 2 byte signed integer. */ 64#define COERCE16(x) ((int) (((x) ^ 0x8000) - 0x8000)) 65#define NEXTWORD(p) \ 66 (p += 2, FETCH_DATA (info, p), \ 67 COERCE16 ((p[-2] << 8) + p[-1])) 68 69/* Get a 4 byte signed integer. */ 70#define COERCE32(x) ((bfd_signed_vma) ((x) ^ 0x80000000) - 0x80000000) 71#define NEXTLONG(p) \ 72 (p += 4, FETCH_DATA (info, p), \ 73 (COERCE32 ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1]))) 74 75/* Get a 4 byte unsigned integer. */ 76#define NEXTULONG(p) \ 77 (p += 4, FETCH_DATA (info, p), \ 78 (unsigned int) ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1])) 79 80/* Get a single precision float. */ 81#define NEXTSINGLE(val, p) \ 82 (p += 4, FETCH_DATA (info, p), \ 83 floatformat_to_double (&floatformat_ieee_single_big, (char *) p - 4, &val)) 84 85/* Get a double precision float. */ 86#define NEXTDOUBLE(val, p) \ 87 (p += 8, FETCH_DATA (info, p), \ 88 floatformat_to_double (&floatformat_ieee_double_big, (char *) p - 8, &val)) 89 90/* Get an extended precision float. */ 91#define NEXTEXTEND(val, p) \ 92 (p += 12, FETCH_DATA (info, p), \ 93 floatformat_to_double (&floatformat_m68881_ext, (char *) p - 12, &val)) 94 95/* Need a function to convert from packed to double 96 precision. Actually, it's easier to print a 97 packed number than a double anyway, so maybe 98 there should be a special case to handle this... */ 99#define NEXTPACKED(p) \ 100 (p += 12, FETCH_DATA (info, p), 0.0) 101 102/* Maximum length of an instruction. */ 103#define MAXLEN 22 104 105#include <setjmp.h> 106 107struct private 108{ 109 /* Points to first byte not fetched. */ 110 bfd_byte *max_fetched; 111 bfd_byte the_buffer[MAXLEN]; 112 bfd_vma insn_start; 113 jmp_buf bailout; 114}; 115 116/* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive) 117 to ADDR (exclusive) are valid. Returns 1 for success, longjmps 118 on error. */ 119#define FETCH_DATA(info, addr) \ 120 ((addr) <= ((struct private *) (info->private_data))->max_fetched \ 121 ? 1 : fetch_data ((info), (addr))) 122 123static int 124fetch_data (struct disassemble_info *info, bfd_byte *addr) 125{ 126 int status; 127 struct private *priv = (struct private *)info->private_data; 128 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer); 129 130 status = (*info->read_memory_func) (start, 131 priv->max_fetched, 132 addr - priv->max_fetched, 133 info); 134 if (status != 0) 135 { 136 (*info->memory_error_func) (status, start, info); 137 longjmp (priv->bailout, 1); 138 } 139 else 140 priv->max_fetched = addr; 141 return 1; 142} 143 144/* This function is used to print to the bit-bucket. */ 145static int 146dummy_printer (FILE *file ATTRIBUTE_UNUSED, 147 const char *format ATTRIBUTE_UNUSED, 148 ...) 149{ 150 return 0; 151} 152 153static void 154dummy_print_address (bfd_vma vma ATTRIBUTE_UNUSED, 155 struct disassemble_info *info ATTRIBUTE_UNUSED) 156{ 157} 158 159/* Fetch BITS bits from a position in the instruction specified by CODE. 160 CODE is a "place to put an argument", or 'x' for a destination 161 that is a general address (mode and register). 162 BUFFER contains the instruction. */ 163 164static int 165fetch_arg (unsigned char *buffer, 166 int code, 167 int bits, 168 disassemble_info *info) 169{ 170 int val = 0; 171 172 switch (code) 173 { 174 case '/': /* MAC/EMAC mask bit. */ 175 val = buffer[3] >> 5; 176 break; 177 178 case 'G': /* EMAC ACC load. */ 179 val = ((buffer[3] >> 3) & 0x2) | ((~buffer[1] >> 7) & 0x1); 180 break; 181 182 case 'H': /* EMAC ACC !load. */ 183 val = ((buffer[3] >> 3) & 0x2) | ((buffer[1] >> 7) & 0x1); 184 break; 185 186 case ']': /* EMAC ACCEXT bit. */ 187 val = buffer[0] >> 2; 188 break; 189 190 case 'I': /* MAC/EMAC scale factor. */ 191 val = buffer[2] >> 1; 192 break; 193 194 case 'F': /* EMAC ACCx. */ 195 val = buffer[0] >> 1; 196 break; 197 198 case 'f': 199 val = buffer[1]; 200 break; 201 202 case 's': 203 val = buffer[1]; 204 break; 205 206 case 'd': /* Destination, for register or quick. */ 207 val = (buffer[0] << 8) + buffer[1]; 208 val >>= 9; 209 break; 210 211 case 'x': /* Destination, for general arg. */ 212 val = (buffer[0] << 8) + buffer[1]; 213 val >>= 6; 214 break; 215 216 case 'k': 217 FETCH_DATA (info, buffer + 3); 218 val = (buffer[3] >> 4); 219 break; 220 221 case 'C': 222 FETCH_DATA (info, buffer + 3); 223 val = buffer[3]; 224 break; 225 226 case '1': 227 FETCH_DATA (info, buffer + 3); 228 val = (buffer[2] << 8) + buffer[3]; 229 val >>= 12; 230 break; 231 232 case '2': 233 FETCH_DATA (info, buffer + 3); 234 val = (buffer[2] << 8) + buffer[3]; 235 val >>= 6; 236 break; 237 238 case '3': 239 case 'j': 240 FETCH_DATA (info, buffer + 3); 241 val = (buffer[2] << 8) + buffer[3]; 242 break; 243 244 case '4': 245 FETCH_DATA (info, buffer + 5); 246 val = (buffer[4] << 8) + buffer[5]; 247 val >>= 12; 248 break; 249 250 case '5': 251 FETCH_DATA (info, buffer + 5); 252 val = (buffer[4] << 8) + buffer[5]; 253 val >>= 6; 254 break; 255 256 case '6': 257 FETCH_DATA (info, buffer + 5); 258 val = (buffer[4] << 8) + buffer[5]; 259 break; 260 261 case '7': 262 FETCH_DATA (info, buffer + 3); 263 val = (buffer[2] << 8) + buffer[3]; 264 val >>= 7; 265 break; 266 267 case '8': 268 FETCH_DATA (info, buffer + 3); 269 val = (buffer[2] << 8) + buffer[3]; 270 val >>= 10; 271 break; 272 273 case '9': 274 FETCH_DATA (info, buffer + 3); 275 val = (buffer[2] << 8) + buffer[3]; 276 val >>= 5; 277 break; 278 279 case 'e': 280 val = (buffer[1] >> 6); 281 break; 282 283 case 'm': 284 val = (buffer[1] & 0x40 ? 0x8 : 0) 285 | ((buffer[0] >> 1) & 0x7) 286 | (buffer[3] & 0x80 ? 0x10 : 0); 287 break; 288 289 case 'n': 290 val = (buffer[1] & 0x40 ? 0x8 : 0) | ((buffer[0] >> 1) & 0x7); 291 break; 292 293 case 'o': 294 val = (buffer[2] >> 4) | (buffer[3] & 0x80 ? 0x10 : 0); 295 break; 296 297 case 'M': 298 val = (buffer[1] & 0xf) | (buffer[3] & 0x40 ? 0x10 : 0); 299 break; 300 301 case 'N': 302 val = (buffer[3] & 0xf) | (buffer[3] & 0x40 ? 0x10 : 0); 303 break; 304 305 case 'h': 306 val = buffer[2] >> 2; 307 break; 308 309 default: 310 abort (); 311 } 312 313 switch (bits) 314 { 315 case 1: 316 return val & 1; 317 case 2: 318 return val & 3; 319 case 3: 320 return val & 7; 321 case 4: 322 return val & 017; 323 case 5: 324 return val & 037; 325 case 6: 326 return val & 077; 327 case 7: 328 return val & 0177; 329 case 8: 330 return val & 0377; 331 case 12: 332 return val & 07777; 333 default: 334 abort (); 335 } 336} 337 338/* Check if an EA is valid for a particular code. This is required 339 for the EMAC instructions since the type of source address determines 340 if it is a EMAC-load instruciton if the EA is mode 2-5, otherwise it 341 is a non-load EMAC instruction and the bits mean register Ry. 342 A similar case exists for the movem instructions where the register 343 mask is interpreted differently for different EAs. */ 344 345static bfd_boolean 346m68k_valid_ea (char code, int val) 347{ 348 int mode, mask; 349#define M(n0,n1,n2,n3,n4,n5,n6,n70,n71,n72,n73,n74) \ 350 (n0 | n1 << 1 | n2 << 2 | n3 << 3 | n4 << 4 | n5 << 5 | n6 << 6 \ 351 | n70 << 7 | n71 << 8 | n72 << 9 | n73 << 10 | n74 << 11) 352 353 switch (code) 354 { 355 case '*': 356 mask = M (1,1,1,1,1,1,1,1,1,1,1,1); 357 break; 358 case '~': 359 mask = M (0,0,1,1,1,1,1,1,1,0,0,0); 360 break; 361 case '%': 362 mask = M (1,1,1,1,1,1,1,1,1,0,0,0); 363 break; 364 case ';': 365 mask = M (1,0,1,1,1,1,1,1,1,1,1,1); 366 break; 367 case '@': 368 mask = M (1,0,1,1,1,1,1,1,1,1,1,0); 369 break; 370 case '!': 371 mask = M (0,0,1,0,0,1,1,1,1,1,1,0); 372 break; 373 case '&': 374 mask = M (0,0,1,0,0,1,1,1,1,0,0,0); 375 break; 376 case '$': 377 mask = M (1,0,1,1,1,1,1,1,1,0,0,0); 378 break; 379 case '?': 380 mask = M (1,0,1,0,0,1,1,1,1,0,0,0); 381 break; 382 case '/': 383 mask = M (1,0,1,0,0,1,1,1,1,1,1,0); 384 break; 385 case '|': 386 mask = M (0,0,1,0,0,1,1,1,1,1,1,0); 387 break; 388 case '>': 389 mask = M (0,0,1,0,1,1,1,1,1,0,0,0); 390 break; 391 case '<': 392 mask = M (0,0,1,1,0,1,1,1,1,1,1,0); 393 break; 394 case 'm': 395 mask = M (1,1,1,1,1,0,0,0,0,0,0,0); 396 break; 397 case 'n': 398 mask = M (0,0,0,0,0,1,0,0,0,1,0,0); 399 break; 400 case 'o': 401 mask = M (0,0,0,0,0,0,1,1,1,0,1,1); 402 break; 403 case 'p': 404 mask = M (1,1,1,1,1,1,0,0,0,0,0,0); 405 break; 406 case 'q': 407 mask = M (1,0,1,1,1,1,0,0,0,0,0,0); 408 break; 409 case 'v': 410 mask = M (1,0,1,1,1,1,0,1,1,0,0,0); 411 break; 412 case 'b': 413 mask = M (1,0,1,1,1,1,0,0,0,1,0,0); 414 break; 415 case 'w': 416 mask = M (0,0,1,1,1,1,0,0,0,1,0,0); 417 break; 418 case 'y': 419 mask = M (0,0,1,0,0,1,0,0,0,0,0,0); 420 break; 421 case 'z': 422 mask = M (0,0,1,0,0,1,0,0,0,1,0,0); 423 break; 424 case '4': 425 mask = M (0,0,1,1,1,1,0,0,0,0,0,0); 426 break; 427 default: 428 abort (); 429 } 430#undef M 431 432 mode = (val >> 3) & 7; 433 if (mode == 7) 434 mode += val & 7; 435 return (mask & (1 << mode)) != 0; 436} 437 438/* Print a base register REGNO and displacement DISP, on INFO->STREAM. 439 REGNO = -1 for pc, -2 for none (suppressed). */ 440 441static void 442print_base (int regno, bfd_vma disp, disassemble_info *info) 443{ 444 if (regno == -1) 445 { 446 (*info->fprintf_func) (info->stream, "%%pc@("); 447 (*info->print_address_func) (disp, info); 448 } 449 else 450 { 451 char buf[50]; 452 453 if (regno == -2) 454 (*info->fprintf_func) (info->stream, "@("); 455 else if (regno == -3) 456 (*info->fprintf_func) (info->stream, "%%zpc@("); 457 else 458 (*info->fprintf_func) (info->stream, "%s@(", reg_names[regno]); 459 460 sprintf_vma (buf, disp); 461 (*info->fprintf_func) (info->stream, "%s", buf); 462 } 463} 464 465/* Print an indexed argument. The base register is BASEREG (-1 for pc). 466 P points to extension word, in buffer. 467 ADDR is the nominal core address of that extension word. */ 468 469static unsigned char * 470print_indexed (int basereg, 471 unsigned char *p, 472 bfd_vma addr, 473 disassemble_info *info) 474{ 475 int word; 476 static char *const scales[] = { "", ":2", ":4", ":8" }; 477 bfd_vma base_disp; 478 bfd_vma outer_disp; 479 char buf[40]; 480 char vmabuf[50]; 481 482 word = NEXTWORD (p); 483 484 /* Generate the text for the index register. 485 Where this will be output is not yet determined. */ 486 sprintf (buf, "%s:%c%s", 487 reg_names[(word >> 12) & 0xf], 488 (word & 0x800) ? 'l' : 'w', 489 scales[(word >> 9) & 3]); 490 491 /* Handle the 68000 style of indexing. */ 492 493 if ((word & 0x100) == 0) 494 { 495 base_disp = word & 0xff; 496 if ((base_disp & 0x80) != 0) 497 base_disp -= 0x100; 498 if (basereg == -1) 499 base_disp += addr; 500 print_base (basereg, base_disp, info); 501 (*info->fprintf_func) (info->stream, ",%s)", buf); 502 return p; 503 } 504 505 /* Handle the generalized kind. */ 506 /* First, compute the displacement to add to the base register. */ 507 if (word & 0200) 508 { 509 if (basereg == -1) 510 basereg = -3; 511 else 512 basereg = -2; 513 } 514 if (word & 0100) 515 buf[0] = '\0'; 516 base_disp = 0; 517 switch ((word >> 4) & 3) 518 { 519 case 2: 520 base_disp = NEXTWORD (p); 521 break; 522 case 3: 523 base_disp = NEXTLONG (p); 524 } 525 if (basereg == -1) 526 base_disp += addr; 527 528 /* Handle single-level case (not indirect). */ 529 if ((word & 7) == 0) 530 { 531 print_base (basereg, base_disp, info); 532 if (buf[0] != '\0') 533 (*info->fprintf_func) (info->stream, ",%s", buf); 534 (*info->fprintf_func) (info->stream, ")"); 535 return p; 536 } 537 538 /* Two level. Compute displacement to add after indirection. */ 539 outer_disp = 0; 540 switch (word & 3) 541 { 542 case 2: 543 outer_disp = NEXTWORD (p); 544 break; 545 case 3: 546 outer_disp = NEXTLONG (p); 547 } 548 549 print_base (basereg, base_disp, info); 550 if ((word & 4) == 0 && buf[0] != '\0') 551 { 552 (*info->fprintf_func) (info->stream, ",%s", buf); 553 buf[0] = '\0'; 554 } 555 sprintf_vma (vmabuf, outer_disp); 556 (*info->fprintf_func) (info->stream, ")@(%s", vmabuf); 557 if (buf[0] != '\0') 558 (*info->fprintf_func) (info->stream, ",%s", buf); 559 (*info->fprintf_func) (info->stream, ")"); 560 561 return p; 562} 563 564/* Returns number of bytes "eaten" by the operand, or 565 return -1 if an invalid operand was found, or -2 if 566 an opcode tabe error was found. 567 ADDR is the pc for this arg to be relative to. */ 568 569static int 570print_insn_arg (const char *d, 571 unsigned char *buffer, 572 unsigned char *p0, 573 bfd_vma addr, 574 disassemble_info *info) 575{ 576 int val = 0; 577 int place = d[1]; 578 unsigned char *p = p0; 579 int regno; 580 const char *regname; 581 unsigned char *p1; 582 double flval; 583 int flt_p; 584 bfd_signed_vma disp; 585 unsigned int uval; 586 587 switch (*d) 588 { 589 case 'c': /* Cache identifier. */ 590 { 591 static char *const cacheFieldName[] = { "nc", "dc", "ic", "bc" }; 592 val = fetch_arg (buffer, place, 2, info); 593 (*info->fprintf_func) (info->stream, cacheFieldName[val]); 594 break; 595 } 596 597 case 'a': /* Address register indirect only. Cf. case '+'. */ 598 { 599 (*info->fprintf_func) 600 (info->stream, 601 "%s@", 602 reg_names[fetch_arg (buffer, place, 3, info) + 8]); 603 break; 604 } 605 606 case '_': /* 32-bit absolute address for move16. */ 607 { 608 uval = NEXTULONG (p); 609 (*info->print_address_func) (uval, info); 610 break; 611 } 612 613 case 'C': 614 (*info->fprintf_func) (info->stream, "%%ccr"); 615 break; 616 617 case 'S': 618 (*info->fprintf_func) (info->stream, "%%sr"); 619 break; 620 621 case 'U': 622 (*info->fprintf_func) (info->stream, "%%usp"); 623 break; 624 625 case 'E': 626 (*info->fprintf_func) (info->stream, "%%acc"); 627 break; 628 629 case 'G': 630 (*info->fprintf_func) (info->stream, "%%macsr"); 631 break; 632 633 case 'H': 634 (*info->fprintf_func) (info->stream, "%%mask"); 635 break; 636 637 case 'J': 638 { 639 /* FIXME: There's a problem here, different m68k processors call the 640 same address different names. This table can't get it right 641 because it doesn't know which processor it's disassembling for. */ 642 static const struct { char *name; int value; } names[] 643 = {{"%sfc", 0x000}, {"%dfc", 0x001}, {"%cacr", 0x002}, 644 {"%tc", 0x003}, {"%itt0",0x004}, {"%itt1", 0x005}, 645 {"%dtt0",0x006}, {"%dtt1",0x007}, {"%buscr",0x008}, 646 {"%usp", 0x800}, {"%vbr", 0x801}, {"%caar", 0x802}, 647 {"%msp", 0x803}, {"%isp", 0x804}, 648 {"%flashbar", 0xc04}, {"%rambar", 0xc05}, /* mcf528x added these. */ 649 650 /* Should we be calling this psr like we do in case 'Y'? */ 651 {"%mmusr",0x805}, 652 653 {"%urp", 0x806}, {"%srp", 0x807}, {"%pcr", 0x808}}; 654 655 val = fetch_arg (buffer, place, 12, info); 656 for (regno = sizeof names / sizeof names[0] - 1; regno >= 0; regno--) 657 if (names[regno].value == val) 658 { 659 (*info->fprintf_func) (info->stream, "%s", names[regno].name); 660 break; 661 } 662 if (regno < 0) 663 (*info->fprintf_func) (info->stream, "%d", val); 664 } 665 break; 666 667 case 'Q': 668 val = fetch_arg (buffer, place, 3, info); 669 /* 0 means 8, except for the bkpt instruction... */ 670 if (val == 0 && d[1] != 's') 671 val = 8; 672 (*info->fprintf_func) (info->stream, "#%d", val); 673 break; 674 675 case 'x': 676 val = fetch_arg (buffer, place, 3, info); 677 /* 0 means -1. */ 678 if (val == 0) 679 val = -1; 680 (*info->fprintf_func) (info->stream, "#%d", val); 681 break; 682 683 case 'M': 684 if (place == 'h') 685 { 686 static char *const scalefactor_name[] = { "<<", ">>" }; 687 val = fetch_arg (buffer, place, 1, info); 688 (*info->fprintf_func) (info->stream, scalefactor_name[val]); 689 } 690 else 691 { 692 val = fetch_arg (buffer, place, 8, info); 693 if (val & 0x80) 694 val = val - 0x100; 695 (*info->fprintf_func) (info->stream, "#%d", val); 696 } 697 break; 698 699 case 'T': 700 val = fetch_arg (buffer, place, 4, info); 701 (*info->fprintf_func) (info->stream, "#%d", val); 702 break; 703 704 case 'D': 705 (*info->fprintf_func) (info->stream, "%s", 706 reg_names[fetch_arg (buffer, place, 3, info)]); 707 break; 708 709 case 'A': 710 (*info->fprintf_func) 711 (info->stream, "%s", 712 reg_names[fetch_arg (buffer, place, 3, info) + 010]); 713 break; 714 715 case 'R': 716 (*info->fprintf_func) 717 (info->stream, "%s", 718 reg_names[fetch_arg (buffer, place, 4, info)]); 719 break; 720 721 case 'r': 722 regno = fetch_arg (buffer, place, 4, info); 723 if (regno > 7) 724 (*info->fprintf_func) (info->stream, "%s@", reg_names[regno]); 725 else 726 (*info->fprintf_func) (info->stream, "@(%s)", reg_names[regno]); 727 break; 728 729 case 'F': 730 (*info->fprintf_func) 731 (info->stream, "%%fp%d", 732 fetch_arg (buffer, place, 3, info)); 733 break; 734 735 case 'O': 736 val = fetch_arg (buffer, place, 6, info); 737 if (val & 0x20) 738 (*info->fprintf_func) (info->stream, "%s", reg_names[val & 7]); 739 else 740 (*info->fprintf_func) (info->stream, "%d", val); 741 break; 742 743 case '+': 744 (*info->fprintf_func) 745 (info->stream, "%s@+", 746 reg_names[fetch_arg (buffer, place, 3, info) + 8]); 747 break; 748 749 case '-': 750 (*info->fprintf_func) 751 (info->stream, "%s@-", 752 reg_names[fetch_arg (buffer, place, 3, info) + 8]); 753 break; 754 755 case 'k': 756 if (place == 'k') 757 (*info->fprintf_func) 758 (info->stream, "{%s}", 759 reg_names[fetch_arg (buffer, place, 3, info)]); 760 else if (place == 'C') 761 { 762 val = fetch_arg (buffer, place, 7, info); 763 if (val > 63) /* This is a signed constant. */ 764 val -= 128; 765 (*info->fprintf_func) (info->stream, "{#%d}", val); 766 } 767 else 768 return -2; 769 break; 770 771 case '#': 772 case '^': 773 p1 = buffer + (*d == '#' ? 2 : 4); 774 if (place == 's') 775 val = fetch_arg (buffer, place, 4, info); 776 else if (place == 'C') 777 val = fetch_arg (buffer, place, 7, info); 778 else if (place == '8') 779 val = fetch_arg (buffer, place, 3, info); 780 else if (place == '3') 781 val = fetch_arg (buffer, place, 8, info); 782 else if (place == 'b') 783 val = NEXTBYTE (p1); 784 else if (place == 'w' || place == 'W') 785 val = NEXTWORD (p1); 786 else if (place == 'l') 787 val = NEXTLONG (p1); 788 else 789 return -2; 790 (*info->fprintf_func) (info->stream, "#%d", val); 791 break; 792 793 case 'B': 794 if (place == 'b') 795 disp = NEXTBYTE (p); 796 else if (place == 'B') 797 disp = COERCE_SIGNED_CHAR (buffer[1]); 798 else if (place == 'w' || place == 'W') 799 disp = NEXTWORD (p); 800 else if (place == 'l' || place == 'L' || place == 'C') 801 disp = NEXTLONG (p); 802 else if (place == 'g') 803 { 804 disp = NEXTBYTE (buffer); 805 if (disp == 0) 806 disp = NEXTWORD (p); 807 else if (disp == -1) 808 disp = NEXTLONG (p); 809 } 810 else if (place == 'c') 811 { 812 if (buffer[1] & 0x40) /* If bit six is one, long offset. */ 813 disp = NEXTLONG (p); 814 else 815 disp = NEXTWORD (p); 816 } 817 else 818 return -2; 819 820 (*info->print_address_func) (addr + disp, info); 821 break; 822 823 case 'd': 824 val = NEXTWORD (p); 825 (*info->fprintf_func) 826 (info->stream, "%s@(%d)", 827 reg_names[fetch_arg (buffer, place, 3, info) + 8], val); 828 break; 829 830 case 's': 831 (*info->fprintf_func) (info->stream, "%s", 832 fpcr_names[fetch_arg (buffer, place, 3, info)]); 833 break; 834 835 case 'e': 836 val = fetch_arg(buffer, place, 2, info); 837 (*info->fprintf_func) (info->stream, "%%acc%d", val); 838 break; 839 840 case 'g': 841 val = fetch_arg(buffer, place, 1, info); 842 (*info->fprintf_func) (info->stream, "%%accext%s", val==0 ? "01" : "23"); 843 break; 844 845 case 'i': 846 val = fetch_arg(buffer, place, 2, info); 847 if (val == 1) 848 (*info->fprintf_func) (info->stream, "<<"); 849 else if (val == 3) 850 (*info->fprintf_func) (info->stream, ">>"); 851 else 852 return -1; 853 break; 854 855 case 'I': 856 /* Get coprocessor ID... */ 857 val = fetch_arg (buffer, 'd', 3, info); 858 859 if (val != 1) /* Unusual coprocessor ID? */ 860 (*info->fprintf_func) (info->stream, "(cpid=%d) ", val); 861 break; 862 863 case '4': 864 case '*': 865 case '~': 866 case '%': 867 case ';': 868 case '@': 869 case '!': 870 case '$': 871 case '?': 872 case '/': 873 case '&': 874 case '|': 875 case '<': 876 case '>': 877 case 'm': 878 case 'n': 879 case 'o': 880 case 'p': 881 case 'q': 882 case 'v': 883 case 'b': 884 case 'w': 885 case 'y': 886 case 'z': 887 if (place == 'd') 888 { 889 val = fetch_arg (buffer, 'x', 6, info); 890 val = ((val & 7) << 3) + ((val >> 3) & 7); 891 } 892 else 893 val = fetch_arg (buffer, 's', 6, info); 894 895 /* If the <ea> is invalid for *d, then reject this match. */ 896 if (!m68k_valid_ea (*d, val)) 897 return -1; 898 899 /* Get register number assuming address register. */ 900 regno = (val & 7) + 8; 901 regname = reg_names[regno]; 902 switch (val >> 3) 903 { 904 case 0: 905 (*info->fprintf_func) (info->stream, "%s", reg_names[val]); 906 break; 907 908 case 1: 909 (*info->fprintf_func) (info->stream, "%s", regname); 910 break; 911 912 case 2: 913 (*info->fprintf_func) (info->stream, "%s@", regname); 914 break; 915 916 case 3: 917 (*info->fprintf_func) (info->stream, "%s@+", regname); 918 break; 919 920 case 4: 921 (*info->fprintf_func) (info->stream, "%s@-", regname); 922 break; 923 924 case 5: 925 val = NEXTWORD (p); 926 (*info->fprintf_func) (info->stream, "%s@(%d)", regname, val); 927 break; 928 929 case 6: 930 p = print_indexed (regno, p, addr, info); 931 break; 932 933 case 7: 934 switch (val & 7) 935 { 936 case 0: 937 val = NEXTWORD (p); 938 (*info->print_address_func) (val, info); 939 break; 940 941 case 1: 942 uval = NEXTULONG (p); 943 (*info->print_address_func) (uval, info); 944 break; 945 946 case 2: 947 val = NEXTWORD (p); 948 (*info->fprintf_func) (info->stream, "%%pc@("); 949 (*info->print_address_func) (addr + val, info); 950 (*info->fprintf_func) (info->stream, ")"); 951 break; 952 953 case 3: 954 p = print_indexed (-1, p, addr, info); 955 break; 956 957 case 4: 958 flt_p = 1; /* Assume it's a float... */ 959 switch (place) 960 { 961 case 'b': 962 val = NEXTBYTE (p); 963 flt_p = 0; 964 break; 965 966 case 'w': 967 val = NEXTWORD (p); 968 flt_p = 0; 969 break; 970 971 case 'l': 972 val = NEXTLONG (p); 973 flt_p = 0; 974 break; 975 976 case 'f': 977 NEXTSINGLE (flval, p); 978 break; 979 980 case 'F': 981 NEXTDOUBLE (flval, p); 982 break; 983 984 case 'x': 985 NEXTEXTEND (flval, p); 986 break; 987 988 case 'p': 989 flval = NEXTPACKED (p); 990 break; 991 992 default: 993 return -1; 994 } 995 if (flt_p) /* Print a float? */ 996 (*info->fprintf_func) (info->stream, "#%g", flval); 997 else 998 (*info->fprintf_func) (info->stream, "#%d", val); 999 break; 1000 1001 default: 1002 return -1; 1003 } 1004 } 1005 1006 /* If place is '/', then this is the case of the mask bit for 1007 mac/emac loads. Now that the arg has been printed, grab the 1008 mask bit and if set, add a '&' to the arg. */ 1009 if (place == '/') 1010 { 1011 val = fetch_arg (buffer, place, 1, info); 1012 if (val) 1013 info->fprintf_func (info->stream, "&"); 1014 } 1015 break; 1016 1017 case 'L': 1018 case 'l': 1019 if (place == 'w') 1020 { 1021 char doneany; 1022 p1 = buffer + 2; 1023 val = NEXTWORD (p1); 1024 /* Move the pointer ahead if this point is farther ahead 1025 than the last. */ 1026 p = p1 > p ? p1 : p; 1027 if (val == 0) 1028 { 1029 (*info->fprintf_func) (info->stream, "#0"); 1030 break; 1031 } 1032 if (*d == 'l') 1033 { 1034 int newval = 0; 1035 1036 for (regno = 0; regno < 16; ++regno) 1037 if (val & (0x8000 >> regno)) 1038 newval |= 1 << regno; 1039 val = newval; 1040 } 1041 val &= 0xffff; 1042 doneany = 0; 1043 for (regno = 0; regno < 16; ++regno) 1044 if (val & (1 << regno)) 1045 { 1046 int first_regno; 1047 1048 if (doneany) 1049 (*info->fprintf_func) (info->stream, "/"); 1050 doneany = 1; 1051 (*info->fprintf_func) (info->stream, "%s", reg_names[regno]); 1052 first_regno = regno; 1053 while (val & (1 << (regno + 1))) 1054 ++regno; 1055 if (regno > first_regno) 1056 (*info->fprintf_func) (info->stream, "-%s", 1057 reg_names[regno]); 1058 } 1059 } 1060 else if (place == '3') 1061 { 1062 /* `fmovem' insn. */ 1063 char doneany; 1064 val = fetch_arg (buffer, place, 8, info); 1065 if (val == 0) 1066 { 1067 (*info->fprintf_func) (info->stream, "#0"); 1068 break; 1069 } 1070 if (*d == 'l') 1071 { 1072 int newval = 0; 1073 1074 for (regno = 0; regno < 8; ++regno) 1075 if (val & (0x80 >> regno)) 1076 newval |= 1 << regno; 1077 val = newval; 1078 } 1079 val &= 0xff; 1080 doneany = 0; 1081 for (regno = 0; regno < 8; ++regno) 1082 if (val & (1 << regno)) 1083 { 1084 int first_regno; 1085 if (doneany) 1086 (*info->fprintf_func) (info->stream, "/"); 1087 doneany = 1; 1088 (*info->fprintf_func) (info->stream, "%%fp%d", regno); 1089 first_regno = regno; 1090 while (val & (1 << (regno + 1))) 1091 ++regno; 1092 if (regno > first_regno) 1093 (*info->fprintf_func) (info->stream, "-%%fp%d", regno); 1094 } 1095 } 1096 else if (place == '8') 1097 { 1098 /* fmoveml for FP status registers. */ 1099 (*info->fprintf_func) (info->stream, "%s", 1100 fpcr_names[fetch_arg (buffer, place, 3, 1101 info)]); 1102 } 1103 else 1104 return -2; 1105 break; 1106 1107 case 'X': 1108 place = '8'; 1109 case 'Y': 1110 case 'Z': 1111 case 'W': 1112 case '0': 1113 case '1': 1114 case '2': 1115 case '3': 1116 { 1117 int val = fetch_arg (buffer, place, 5, info); 1118 char *name = 0; 1119 1120 switch (val) 1121 { 1122 case 2: name = "%tt0"; break; 1123 case 3: name = "%tt1"; break; 1124 case 0x10: name = "%tc"; break; 1125 case 0x11: name = "%drp"; break; 1126 case 0x12: name = "%srp"; break; 1127 case 0x13: name = "%crp"; break; 1128 case 0x14: name = "%cal"; break; 1129 case 0x15: name = "%val"; break; 1130 case 0x16: name = "%scc"; break; 1131 case 0x17: name = "%ac"; break; 1132 case 0x18: name = "%psr"; break; 1133 case 0x19: name = "%pcsr"; break; 1134 case 0x1c: 1135 case 0x1d: 1136 { 1137 int break_reg = ((buffer[3] >> 2) & 7); 1138 1139 (*info->fprintf_func) 1140 (info->stream, val == 0x1c ? "%%bad%d" : "%%bac%d", 1141 break_reg); 1142 } 1143 break; 1144 default: 1145 (*info->fprintf_func) (info->stream, "<mmu register %d>", val); 1146 } 1147 if (name) 1148 (*info->fprintf_func) (info->stream, "%s", name); 1149 } 1150 break; 1151 1152 case 'f': 1153 { 1154 int fc = fetch_arg (buffer, place, 5, info); 1155 1156 if (fc == 1) 1157 (*info->fprintf_func) (info->stream, "%%dfc"); 1158 else if (fc == 0) 1159 (*info->fprintf_func) (info->stream, "%%sfc"); 1160 else 1161 /* xgettext:c-format */ 1162 (*info->fprintf_func) (info->stream, _("<function code %d>"), fc); 1163 } 1164 break; 1165 1166 case 'V': 1167 (*info->fprintf_func) (info->stream, "%%val"); 1168 break; 1169 1170 case 't': 1171 { 1172 int level = fetch_arg (buffer, place, 3, info); 1173 1174 (*info->fprintf_func) (info->stream, "%d", level); 1175 } 1176 break; 1177 1178 case 'u': 1179 { 1180 short is_upper = 0; 1181 int reg = fetch_arg (buffer, place, 5, info); 1182 1183 if (reg & 0x10) 1184 { 1185 is_upper = 1; 1186 reg &= 0xf; 1187 } 1188 (*info->fprintf_func) (info->stream, "%s%s", 1189 reg_half_names[reg], 1190 is_upper ? "u" : "l"); 1191 } 1192 break; 1193 1194 default: 1195 return -2; 1196 } 1197 1198 return p - p0; 1199} 1200 1201/* Try to match the current instruction to best and if so, return the 1202 number of bytes consumed from the instruction stream, else zero. */ 1203 1204static int 1205match_insn_m68k (bfd_vma memaddr, 1206 disassemble_info * info, 1207 const struct m68k_opcode * best) 1208{ 1209 unsigned char *save_p; 1210 unsigned char *p; 1211 const char *d; 1212 1213 struct private *priv = (struct private *) info->private_data; 1214 bfd_byte *buffer = priv->the_buffer; 1215 fprintf_ftype save_printer = info->fprintf_func; 1216 void (* save_print_address) (bfd_vma, struct disassemble_info *) 1217 = info->print_address_func; 1218 1219 /* Point at first word of argument data, 1220 and at descriptor for first argument. */ 1221 p = buffer + 2; 1222 1223 /* Figure out how long the fixed-size portion of the instruction is. 1224 The only place this is stored in the opcode table is 1225 in the arguments--look for arguments which specify fields in the 2nd 1226 or 3rd words of the instruction. */ 1227 for (d = best->args; *d; d += 2) 1228 { 1229 /* I don't think it is necessary to be checking d[0] here; 1230 I suspect all this could be moved to the case statement below. */ 1231 if (d[0] == '#') 1232 { 1233 if (d[1] == 'l' && p - buffer < 6) 1234 p = buffer + 6; 1235 else if (p - buffer < 4 && d[1] != 'C' && d[1] != '8') 1236 p = buffer + 4; 1237 } 1238 1239 if ((d[0] == 'L' || d[0] == 'l') && d[1] == 'w' && p - buffer < 4) 1240 p = buffer + 4; 1241 1242 switch (d[1]) 1243 { 1244 case '1': 1245 case '2': 1246 case '3': 1247 case '7': 1248 case '8': 1249 case '9': 1250 case 'i': 1251 if (p - buffer < 4) 1252 p = buffer + 4; 1253 break; 1254 case '4': 1255 case '5': 1256 case '6': 1257 if (p - buffer < 6) 1258 p = buffer + 6; 1259 break; 1260 default: 1261 break; 1262 } 1263 } 1264 1265 /* pflusha is an exceptions. It takes no arguments but is two words 1266 long. Recognize it by looking at the lower 16 bits of the mask. */ 1267 if (p - buffer < 4 && (best->match & 0xFFFF) != 0) 1268 p = buffer + 4; 1269 1270 /* lpstop is another exception. It takes a one word argument but is 1271 three words long. */ 1272 if (p - buffer < 6 1273 && (best->match & 0xffff) == 0xffff 1274 && best->args[0] == '#' 1275 && best->args[1] == 'w') 1276 { 1277 /* Copy the one word argument into the usual location for a one 1278 word argument, to simplify printing it. We can get away with 1279 this because we know exactly what the second word is, and we 1280 aren't going to print anything based on it. */ 1281 p = buffer + 6; 1282 FETCH_DATA (info, p); 1283 buffer[2] = buffer[4]; 1284 buffer[3] = buffer[5]; 1285 } 1286 1287 FETCH_DATA (info, p); 1288 1289 d = best->args; 1290 1291 save_p = p; 1292 info->print_address_func = dummy_print_address; 1293 info->fprintf_func = (fprintf_ftype) dummy_printer; 1294 1295 /* We scan the operands twice. The first time we don't print anything, 1296 but look for errors. */ 1297 for (; *d; d += 2) 1298 { 1299 int eaten = print_insn_arg (d, buffer, p, memaddr + (p - buffer), info); 1300 1301 if (eaten >= 0) 1302 p += eaten; 1303 else if (eaten == -1) 1304 { 1305 info->fprintf_func = save_printer; 1306 info->print_address_func = save_print_address; 1307 return 0; 1308 } 1309 else 1310 { 1311 info->fprintf_func (info->stream, 1312 /* xgettext:c-format */ 1313 _("<internal error in opcode table: %s %s>\n"), 1314 best->name, best->args); 1315 info->fprintf_func = save_printer; 1316 info->print_address_func = save_print_address; 1317 return 2; 1318 } 1319 } 1320 1321 p = save_p; 1322 info->fprintf_func = save_printer; 1323 info->print_address_func = save_print_address; 1324 1325 d = best->args; 1326 1327 info->fprintf_func (info->stream, "%s", best->name); 1328 1329 if (*d) 1330 info->fprintf_func (info->stream, " "); 1331 1332 while (*d) 1333 { 1334 p += print_insn_arg (d, buffer, p, memaddr + (p - buffer), info); 1335 d += 2; 1336 1337 if (*d && *(d - 2) != 'I' && *d != 'k') 1338 info->fprintf_func (info->stream, ","); 1339 } 1340 1341 return p - buffer; 1342} 1343 1344/* Try to interpret the instruction at address MEMADDR as one that 1345 can execute on a processor with the features given by ARCH_MASK. 1346 If successful, print the instruction to INFO->STREAM and return 1347 its length in bytes. Return 0 otherwise. */ 1348 1349static int 1350m68k_scan_mask (bfd_vma memaddr, disassemble_info *info, 1351 unsigned int arch_mask) 1352{ 1353 int i; 1354 const char *d; 1355 static const struct m68k_opcode **opcodes[16]; 1356 static int numopcodes[16]; 1357 int val; 1358 int major_opcode; 1359 1360 struct private *priv = (struct private *) info->private_data; 1361 bfd_byte *buffer = priv->the_buffer; 1362 1363 if (!opcodes[0]) 1364 { 1365 /* Speed up the matching by sorting the opcode 1366 table on the upper four bits of the opcode. */ 1367 const struct m68k_opcode **opc_pointer[16]; 1368 1369 /* First count how many opcodes are in each of the sixteen buckets. */ 1370 for (i = 0; i < m68k_numopcodes; i++) 1371 numopcodes[(m68k_opcodes[i].opcode >> 28) & 15]++; 1372 1373 /* Then create a sorted table of pointers 1374 that point into the unsorted table. */ 1375 opc_pointer[0] = xmalloc (sizeof (struct m68k_opcode *) 1376 * m68k_numopcodes); 1377 opcodes[0] = opc_pointer[0]; 1378 1379 for (i = 1; i < 16; i++) 1380 { 1381 opc_pointer[i] = opc_pointer[i - 1] + numopcodes[i - 1]; 1382 opcodes[i] = opc_pointer[i]; 1383 } 1384 1385 for (i = 0; i < m68k_numopcodes; i++) 1386 *opc_pointer[(m68k_opcodes[i].opcode >> 28) & 15]++ = &m68k_opcodes[i]; 1387 } 1388 1389 FETCH_DATA (info, buffer + 2); 1390 major_opcode = (buffer[0] >> 4) & 15; 1391 1392 for (i = 0; i < numopcodes[major_opcode]; i++) 1393 { 1394 const struct m68k_opcode *opc = opcodes[major_opcode][i]; 1395 unsigned long opcode = opc->opcode; 1396 unsigned long match = opc->match; 1397 1398 if (((0xff & buffer[0] & (match >> 24)) == (0xff & (opcode >> 24))) 1399 && ((0xff & buffer[1] & (match >> 16)) == (0xff & (opcode >> 16))) 1400 /* Only fetch the next two bytes if we need to. */ 1401 && (((0xffff & match) == 0) 1402 || 1403 (FETCH_DATA (info, buffer + 4) 1404 && ((0xff & buffer[2] & (match >> 8)) == (0xff & (opcode >> 8))) 1405 && ((0xff & buffer[3] & match) == (0xff & opcode))) 1406 ) 1407 && (opc->arch & arch_mask) != 0) 1408 { 1409 /* Don't use for printout the variants of divul and divsl 1410 that have the same register number in two places. 1411 The more general variants will match instead. */ 1412 for (d = opc->args; *d; d += 2) 1413 if (d[1] == 'D') 1414 break; 1415 1416 /* Don't use for printout the variants of most floating 1417 point coprocessor instructions which use the same 1418 register number in two places, as above. */ 1419 if (*d == '\0') 1420 for (d = opc->args; *d; d += 2) 1421 if (d[1] == 't') 1422 break; 1423 1424 /* Don't match fmovel with more than one register; 1425 wait for fmoveml. */ 1426 if (*d == '\0') 1427 { 1428 for (d = opc->args; *d; d += 2) 1429 { 1430 if (d[0] == 's' && d[1] == '8') 1431 { 1432 val = fetch_arg (buffer, d[1], 3, info); 1433 if ((val & (val - 1)) != 0) 1434 break; 1435 } 1436 } 1437 } 1438 1439 /* Don't match FPU insns with non-default coprocessor ID. */ 1440 if (*d == '\0') 1441 { 1442 for (d = opc->args; *d; d += 2) 1443 { 1444 if (d[0] == 'I') 1445 { 1446 val = fetch_arg (buffer, 'd', 3, info); 1447 if (val != 1) 1448 break; 1449 } 1450 } 1451 } 1452 1453 if (*d == '\0') 1454 if ((val = match_insn_m68k (memaddr, info, opc))) 1455 return val; 1456 } 1457 } 1458 return 0; 1459} 1460 1461/* Print the m68k instruction at address MEMADDR in debugged memory, 1462 on INFO->STREAM. Returns length of the instruction, in bytes. */ 1463 1464int 1465print_insn_m68k (bfd_vma memaddr, disassemble_info *info) 1466{ 1467 unsigned int arch_mask; 1468 struct private priv; 1469 int val; 1470 1471 bfd_byte *buffer = priv.the_buffer; 1472 1473 info->private_data = (PTR) &priv; 1474 /* Tell objdump to use two bytes per chunk 1475 and six bytes per line for displaying raw data. */ 1476 info->bytes_per_chunk = 2; 1477 info->bytes_per_line = 6; 1478 info->display_endian = BFD_ENDIAN_BIG; 1479 priv.max_fetched = priv.the_buffer; 1480 priv.insn_start = memaddr; 1481 1482 if (setjmp (priv.bailout) != 0) 1483 /* Error return. */ 1484 return -1; 1485 1486 arch_mask = bfd_m68k_mach_to_features (info->mach); 1487 if (!arch_mask) 1488 { 1489 /* First try printing an m680x0 instruction. Try printing a Coldfire 1490 one if that fails. */ 1491 val = m68k_scan_mask (memaddr, info, m68k_mask); 1492 if (val) 1493 return val; 1494 1495 val = m68k_scan_mask (memaddr, info, mcf_mask); 1496 if (val) 1497 return val; 1498 } 1499 else 1500 { 1501 val = m68k_scan_mask (memaddr, info, arch_mask); 1502 if (val) 1503 return val; 1504 } 1505 1506 /* Handle undefined instructions. */ 1507 info->fprintf_func (info->stream, "0%o", (buffer[0] << 8) + buffer[1]); 1508 return 2; 1509} 1510