1221828Sgrehan#define _FP_W_TYPE_SIZE 32 2242131Sgrehan#define _FP_W_TYPE unsigned int 3221828Sgrehan#define _FP_WS_TYPE signed int 4221828Sgrehan#define _FP_I_TYPE int 5221828Sgrehan 6221828Sgrehan#define __FP_FRAC_ADD_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \ 7221828Sgrehan __asm__ ("add{l} {%11,%3|%3,%11}\n\t" \ 8221828Sgrehan "adc{l} {%9,%2|%2,%9}\n\t" \ 9221828Sgrehan "adc{l} {%7,%1|%1,%7}\n\t" \ 10221828Sgrehan "adc{l} {%5,%0|%0,%5}" \ 11221828Sgrehan : "=r" ((USItype) (r3)), \ 12221828Sgrehan "=&r" ((USItype) (r2)), \ 13221828Sgrehan "=&r" ((USItype) (r1)), \ 14221828Sgrehan "=&r" ((USItype) (r0)) \ 15221828Sgrehan : "%0" ((USItype) (x3)), \ 16221828Sgrehan "g" ((USItype) (y3)), \ 17221828Sgrehan "%1" ((USItype) (x2)), \ 18221828Sgrehan "g" ((USItype) (y2)), \ 19221828Sgrehan "%2" ((USItype) (x1)), \ 20221828Sgrehan "g" ((USItype) (y1)), \ 21221828Sgrehan "%3" ((USItype) (x0)), \ 22221828Sgrehan "g" ((USItype) (y0))) 23221828Sgrehan#define __FP_FRAC_ADD_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) \ 24221828Sgrehan __asm__ ("add{l} {%8,%2|%2,%8}\n\t" \ 25221828Sgrehan "adc{l} {%6,%1|%1,%6}\n\t" \ 26221828Sgrehan "adc{l} {%4,%0|%0,%4}" \ 27221828Sgrehan : "=r" ((USItype) (r2)), \ 28221828Sgrehan "=&r" ((USItype) (r1)), \ 29221828Sgrehan "=&r" ((USItype) (r0)) \ 30221828Sgrehan : "%0" ((USItype) (x2)), \ 31221828Sgrehan "g" ((USItype) (y2)), \ 32221828Sgrehan "%1" ((USItype) (x1)), \ 33242131Sgrehan "g" ((USItype) (y1)), \ 34242131Sgrehan "%2" ((USItype) (x0)), \ 35221828Sgrehan "g" ((USItype) (y0))) 36221828Sgrehan#define __FP_FRAC_SUB_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \ 37221828Sgrehan __asm__ ("sub{l} {%11,%3|%3,%11}\n\t" \ 38221828Sgrehan "sbb{l} {%9,%2|%2,%9}\n\t" \ 39261090Sjhb "sbb{l} {%7,%1|%1,%7}\n\t" \ 40244167Sgrehan "sbb{l} {%5,%0|%0,%5}" \ 41242131Sgrehan : "=r" ((USItype) (r3)), \ 42267393Sjhb "=&r" ((USItype) (r2)), \ 43221828Sgrehan "=&r" ((USItype) (r1)), \ 44242131Sgrehan "=&r" ((USItype) (r0)) \ 45221828Sgrehan : "0" ((USItype) (x3)), \ 46247523Sneel "g" ((USItype) (y3)), \ 47247523Sneel "1" ((USItype) (x2)), \ 48247523Sneel "g" ((USItype) (y2)), \ 49242131Sgrehan "2" ((USItype) (x1)), \ 50242131Sgrehan "g" ((USItype) (y1)), \ 51221828Sgrehan "3" ((USItype) (x0)), \ 52242131Sgrehan "g" ((USItype) (y0))) 53242131Sgrehan#define __FP_FRAC_SUB_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) \ 54221828Sgrehan __asm__ ("sub{l} {%8,%2|%2,%8}\n\t" \ 55242131Sgrehan "sbb{l} {%6,%1|%1,%6}\n\t" \ 56242131Sgrehan "sbb{l} {%4,%0|%0,%4}" \ 57242131Sgrehan : "=r" ((USItype) (r2)), \ 58242131Sgrehan "=&r" ((USItype) (r1)), \ 59242131Sgrehan "=&r" ((USItype) (r0)) \ 60242131Sgrehan : "0" ((USItype) (x2)), \ 61242131Sgrehan "g" ((USItype) (y2)), \ 62242131Sgrehan "1" ((USItype) (x1)), \ 63242131Sgrehan "g" ((USItype) (y1)), \ 64242131Sgrehan "2" ((USItype) (x0)), \ 65242131Sgrehan "g" ((USItype) (y0))) 66242131Sgrehan#define __FP_FRAC_ADDI_4(x3,x2,x1,x0,i) \ 67242131Sgrehan __asm__ ("add{l} {%4,%3|%3,%4}\n\t" \ 68242131Sgrehan "adc{l} {$0,%2|%2,0}\n\t" \ 69242131Sgrehan "adc{l} {$0,%1|%1,0}\n\t" \ 70242131Sgrehan "adc{l} {$0,%0|%0,0}" \ 71242131Sgrehan : "+r" ((USItype) (x3)), \ 72242131Sgrehan "+&r" ((USItype) (x2)), \ 73242131Sgrehan "+&r" ((USItype) (x1)), \ 74242131Sgrehan "+&r" ((USItype) (x0)) \ 75242131Sgrehan : "g" ((USItype) (i))) 76262350Sjhb 77262350Sjhb 78262350Sjhb#define _FP_MUL_MEAT_S(R,X,Y) \ 79242131Sgrehan _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm) 80242131Sgrehan#define _FP_MUL_MEAT_D(R,X,Y) \ 81242131Sgrehan _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm) 82242131Sgrehan#define _FP_MUL_MEAT_Q(R,X,Y) \ 83242131Sgrehan _FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm) 84242131Sgrehan 85242131Sgrehan#define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_loop(S,R,X,Y) 86242131Sgrehan#define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv(D,R,X,Y) 87242131Sgrehan#define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_4_udiv(Q,R,X,Y) 88221828Sgrehan 89242131Sgrehan#define _FP_NANFRAC_S _FP_QNANBIT_S 90221828Sgrehan#define _FP_NANFRAC_D _FP_QNANBIT_D, 0 91242131Sgrehan/* Even if XFmode is 12byte, we have to pad it to 92242131Sgrehan 16byte since soft-fp emulation is done in 16byte. */ 93242131Sgrehan#define _FP_NANFRAC_E _FP_QNANBIT_E, 0, 0, 0 94242131Sgrehan#define _FP_NANFRAC_Q _FP_QNANBIT_Q, 0, 0, 0 95221828Sgrehan 96221828Sgrehan#ifndef _SOFT_FLOAT 97242131Sgrehan#define FP_EX_SHIFT 0 98242131Sgrehan 99221828Sgrehan#define _FP_DECL_EX \ 100221828Sgrehan unsigned short _fcw __attribute__ ((unused)) = FP_RND_NEAREST; 101221828Sgrehan 102242131Sgrehan#define FP_RND_NEAREST 0 103221828Sgrehan#define FP_RND_ZERO 0xc00 104242131Sgrehan#define FP_RND_PINF 0x800 105221828Sgrehan#define FP_RND_MINF 0x400 106242131Sgrehan 107242131Sgrehan#define FP_RND_MASK 0xc00 108242131Sgrehan 109242131Sgrehan#define FP_INIT_ROUNDMODE \ 110242131Sgrehan do { \ 111221828Sgrehan __asm__ __volatile__ ("fnstcw\t%0" : "=m" (_fcw)); \ 112221828Sgrehan } while (0) 113221828Sgrehan#endif 114242131Sgrehan