1/* { dg-do assemble { target { ! ia32 } } } */ 2/* { dg-require-effective-target avx512vbmi } */ 3/* { dg-require-effective-target masm_intel } */ 4/* { dg-options "-Og -fschedule-insns -fno-tree-fre -mavx512vbmi --param=max-sched-ready-insns=1 -masm=intel" } */ 5 6typedef char v64u8 __attribute__((vector_size(64))); 7typedef int v64u32 __attribute__((vector_size(64))); 8typedef long v64u64 __attribute__((vector_size(64))); 9typedef __int128 v64u128 __attribute__((vector_size(64))); 10 11v64u128 12foo(int u8_0, unsigned u128_0, v64u32 v64u32_1, v64u32 v64u32_0, v64u64 v64u64_0, v64u128 v64u128_0) 13{ 14 v64u8 v64u8_0 = v64u8_0; 15 v64u32_0 = v64u32_0 >> (v64u32){0, 0, 0, 1, 0, ((v64u64)v64u64_0)[u8_0], ((v64u32)v64u128_0)[15], 0, 0, 0, 0, 4, ((v64u64)v64u64_0)[v64u32_0[0]] - 1}; 16 v64u8_0 = v64u8_0 << ((v64u8)v64u32_1 & 1); 17 v64u64_0[0] >>= 0; 18 return u128_0 + (v64u128)v64u8_0 + (v64u128)v64u32_0 + (v64u128)v64u64_0; 19} 20