1/* Definitions of target machine for GNU compiler.
2   MIPS SDE version, for use with the SDE C library rather than newlib.
3   Copyright (C) 2007-2015 Free Software Foundation, Inc.
4
5This file is part of GCC.
6
7GCC is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 3, or (at your option)
10any later version.
11
12GCC is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with GCC; see the file COPYING3.  If not see
19<http://www.gnu.org/licenses/>.  */
20
21#define TARGET_OS_CPP_BUILTINS()			\
22  do							\
23    {							\
24      builtin_assert ("system=sde");			\
25      builtin_assert ("system=posix");			\
26      builtin_define ("__SDE_MIPS__");			\
27							\
28      /* Deprecated: use __mips_isa_rev >= 2.  */	\
29      if (ISA_MIPS32R2)					\
30        builtin_define ("__mipsr2");			\
31							\
32      /* Deprecated: use __mips_fpr == 64.  */		\
33      if (TARGET_FLOAT64)				\
34	builtin_define ("__mipsfp64");			\
35							\
36      if (TARGET_NO_FLOAT) 				\
37	builtin_define ("__NO_FLOAT");			\
38      else if (TARGET_SOFT_FLOAT_ABI)			\
39	builtin_define ("__SOFT_FLOAT");		\
40      else if (TARGET_SINGLE_FLOAT)			\
41	builtin_define ("__SINGLE_FLOAT");		\
42							\
43      if (TARGET_BIG_ENDIAN)				\
44        {						\
45	  builtin_assert ("endian=big");		\
46	  builtin_assert ("cpu=mipseb");		\
47	}						\
48      else						\
49        {						\
50	  builtin_assert ("endian=little");		\
51	  builtin_assert ("cpu=mipsel");		\
52	}						\
53    }							\
54  while (0)
55
56/* For __clear_cache in libgcc2.c.  */
57#ifdef IN_LIBGCC2
58extern void mips_sync_icache (void *beg, unsigned long len);
59#undef CLEAR_INSN_CACHE
60#define CLEAR_INSN_CACHE(beg, end) \
61  mips_sync_icache (beg, end - beg)
62#endif
63
64/* For mips_cache_flush_func in mips.opt.  */
65#undef CACHE_FLUSH_FUNC
66#define CACHE_FLUSH_FUNC "mips_sync_icache"
67
68/* For inline code which needs to sync the icache and dcache,
69   noting that the SDE library takes arguments (address, size).  */
70#undef MIPS_ICACHE_SYNC
71#define MIPS_ICACHE_SYNC(ADDR, SIZE)					\
72  emit_library_call (gen_rtx_SYMBOL_REF (Pmode, mips_cache_flush_func),	\
73		     LCT_NORMAL, VOIDmode, 2, ADDR, Pmode,		\
74		     SIZE, TYPE_MODE (sizetype))
75
76/* This version of _mcount does not pop 2 words from the stack.  */
77#undef FUNCTION_PROFILER
78#define FUNCTION_PROFILER(FILE, LABELNO)				\
79  {									\
80    mips_push_asm_switch (&mips_noat);					\
81    /* _mcount treats $2 as the static chain register.  */		\
82    if (cfun->static_chain_decl != NULL)				\
83      fprintf (FILE, "\tmove\t%s,%s\n", reg_names[2],			\
84	       reg_names[STATIC_CHAIN_REGNUM]);				\
85    /* MIPS16 code passes saved $ra in $v1 instead of $at.  */		\
86    fprintf (FILE, "\tmove\t%s,%s\n",					\
87	     reg_names[GP_REG_FIRST + (TARGET_MIPS16 ? 3 : 1)],		\
88	     reg_names[RETURN_ADDR_REGNUM]);				\
89    fprintf (FILE, "\tjal\t_mcount\n");					\
90    mips_pop_asm_switch (&mips_noat);					\
91    /* _mcount treats $2 as the static chain register.  */		\
92    if (cfun->static_chain_decl != NULL)				\
93      fprintf (FILE, "\tmove\t%s,%s\n", reg_names[STATIC_CHAIN_REGNUM],	\
94	       reg_names[2]);						\
95  }
96
97/* ...nor does the call sequence preserve $31.  */
98#undef MIPS_SAVE_REG_FOR_PROFILING_P
99#define MIPS_SAVE_REG_FOR_PROFILING_P(REGNO) ((REGNO) == RETURN_ADDR_REGNUM)
100
101/* Compile in support for the -mno-float option.  */
102#define TARGET_SUPPORTS_NO_FLOAT 1
103