1;; Predicate definitions for MIPS. 2;; Copyright (C) 2004-2015 Free Software Foundation, Inc. 3;; 4;; This file is part of GCC. 5;; 6;; GCC is free software; you can redistribute it and/or modify 7;; it under the terms of the GNU General Public License as published by 8;; the Free Software Foundation; either version 3, or (at your option) 9;; any later version. 10;; 11;; GCC is distributed in the hope that it will be useful, 12;; but WITHOUT ANY WARRANTY; without even the implied warranty of 13;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14;; GNU General Public License for more details. 15;; 16;; You should have received a copy of the GNU General Public License 17;; along with GCC; see the file COPYING3. If not see 18;; <http://www.gnu.org/licenses/>. 19 20(define_predicate "const_uns_arith_operand" 21 (and (match_code "const_int") 22 (match_test "SMALL_OPERAND_UNSIGNED (INTVAL (op))"))) 23 24(define_predicate "uns_arith_operand" 25 (ior (match_operand 0 "const_uns_arith_operand") 26 (match_operand 0 "register_operand"))) 27 28(define_predicate "const_arith_operand" 29 (and (match_code "const_int") 30 (match_test "SMALL_OPERAND (INTVAL (op))"))) 31 32(define_predicate "arith_operand" 33 (ior (match_operand 0 "const_arith_operand") 34 (match_operand 0 "register_operand"))) 35 36(define_predicate "const_immlsa_operand" 37 (and (match_code "const_int") 38 (match_test "IN_RANGE (exact_log2 (INTVAL (op)), 1, 4)"))) 39 40(define_predicate "const_uimm6_operand" 41 (and (match_code "const_int") 42 (match_test "UIMM6_OPERAND (INTVAL (op))"))) 43 44(define_predicate "const_imm10_operand" 45 (and (match_code "const_int") 46 (match_test "IMM10_OPERAND (INTVAL (op))"))) 47 48(define_predicate "reg_imm10_operand" 49 (ior (match_operand 0 "const_imm10_operand") 50 (match_operand 0 "register_operand"))) 51 52(define_predicate "sle_operand" 53 (and (match_code "const_int") 54 (match_test "SMALL_OPERAND (INTVAL (op) + 1)"))) 55 56(define_predicate "sleu_operand" 57 (and (match_operand 0 "sle_operand") 58 (match_test "INTVAL (op) + 1 != 0"))) 59 60(define_predicate "const_0_operand" 61 (and (match_code "const_int,const_double,const_vector") 62 (match_test "op == CONST0_RTX (GET_MODE (op))"))) 63 64(define_predicate "reg_or_0_operand" 65 (ior (and (match_operand 0 "const_0_operand") 66 (not (match_test "TARGET_MIPS16"))) 67 (match_operand 0 "register_operand"))) 68 69(define_predicate "const_1_operand" 70 (and (match_code "const_int,const_double,const_vector") 71 (match_test "op == CONST1_RTX (GET_MODE (op))"))) 72 73(define_predicate "reg_or_1_operand" 74 (ior (match_operand 0 "const_1_operand") 75 (match_operand 0 "register_operand"))) 76 77;; This is used for indexing into vectors, and hence only accepts const_int. 78(define_predicate "const_0_or_1_operand" 79 (and (match_code "const_int") 80 (match_test "IN_RANGE (INTVAL (op), 0, 1)"))) 81 82(define_predicate "const_2_or_3_operand" 83 (and (match_code "const_int") 84 (match_test "IN_RANGE (INTVAL (op), 2, 3)"))) 85 86(define_predicate "const_0_to_3_operand" 87 (and (match_code "const_int") 88 (match_test "IN_RANGE (INTVAL (op), 0, 3)"))) 89 90(define_predicate "qi_mask_operand" 91 (and (match_code "const_int") 92 (match_test "UINTVAL (op) == 0xff"))) 93 94(define_predicate "hi_mask_operand" 95 (and (match_code "const_int") 96 (match_test "UINTVAL (op) == 0xffff"))) 97 98(define_predicate "si_mask_operand" 99 (and (match_code "const_int") 100 (match_test "UINTVAL (op) == 0xffffffff"))) 101 102(define_predicate "and_load_operand" 103 (ior (match_operand 0 "qi_mask_operand") 104 (match_operand 0 "hi_mask_operand") 105 (match_operand 0 "si_mask_operand"))) 106 107(define_predicate "low_bitmask_operand" 108 (and (match_test "ISA_HAS_EXT_INS") 109 (match_code "const_int") 110 (match_test "low_bitmask_len (mode, INTVAL (op)) > 16"))) 111 112(define_predicate "and_reg_operand" 113 (ior (match_operand 0 "register_operand") 114 (and (not (match_test "TARGET_MIPS16")) 115 (match_operand 0 "const_uns_arith_operand")) 116 (match_operand 0 "low_bitmask_operand") 117 (match_operand 0 "si_mask_operand"))) 118 119(define_predicate "and_operand" 120 (ior (match_operand 0 "and_load_operand") 121 (match_operand 0 "and_reg_operand"))) 122 123(define_predicate "d_operand" 124 (and (match_code "reg") 125 (match_test "TARGET_MIPS16 126 ? M16_REG_P (REGNO (op)) 127 : GP_REG_P (REGNO (op))"))) 128 129(define_predicate "lwsp_swsp_operand" 130 (and (match_code "mem") 131 (match_test "lwsp_swsp_address_p (XEXP (op, 0), mode)"))) 132 133(define_predicate "lw16_sw16_operand" 134 (and (match_code "mem") 135 (match_test "m16_based_address_p (XEXP (op, 0), mode, uw4_operand)"))) 136 137(define_predicate "lhu16_sh16_operand" 138 (and (match_code "mem") 139 (match_test "m16_based_address_p (XEXP (op, 0), mode, uh4_operand)"))) 140 141(define_predicate "lbu16_operand" 142 (and (match_code "mem") 143 (match_test "m16_based_address_p (XEXP (op, 0), mode, db4_operand)"))) 144 145(define_predicate "sb16_operand" 146 (and (match_code "mem") 147 (match_test "m16_based_address_p (XEXP (op, 0), mode, ub4_operand)"))) 148 149(define_predicate "db4_operand" 150 (and (match_code "const_int") 151 (match_test "mips_unsigned_immediate_p (INTVAL (op) + 1, 4, 0)"))) 152 153(define_predicate "db7_operand" 154 (and (match_code "const_int") 155 (match_test "mips_unsigned_immediate_p (INTVAL (op) + 1, 7, 0)"))) 156 157(define_predicate "db8_operand" 158 (and (match_code "const_int") 159 (match_test "mips_unsigned_immediate_p (INTVAL (op) + 1, 8, 0)"))) 160 161(define_predicate "ib3_operand" 162 (and (match_code "const_int") 163 (match_test "mips_unsigned_immediate_p (INTVAL (op) - 1, 3, 0)"))) 164 165(define_predicate "sb4_operand" 166 (and (match_code "const_int") 167 (match_test "mips_signed_immediate_p (INTVAL (op), 4, 0)"))) 168 169(define_predicate "sb5_operand" 170 (and (match_code "const_int") 171 (match_test "mips_signed_immediate_p (INTVAL (op), 5, 0)"))) 172 173(define_predicate "sb8_operand" 174 (and (match_code "const_int") 175 (match_test "mips_signed_immediate_p (INTVAL (op), 8, 0)"))) 176 177(define_predicate "sd8_operand" 178 (and (match_code "const_int") 179 (match_test "mips_signed_immediate_p (INTVAL (op), 8, 3)"))) 180 181(define_predicate "ub4_operand" 182 (and (match_code "const_int") 183 (match_test "mips_unsigned_immediate_p (INTVAL (op), 4, 0)"))) 184 185(define_predicate "ub8_operand" 186 (and (match_code "const_int") 187 (match_test "mips_unsigned_immediate_p (INTVAL (op), 8, 0)"))) 188 189(define_predicate "uh4_operand" 190 (and (match_code "const_int") 191 (match_test "mips_unsigned_immediate_p (INTVAL (op), 4, 1)"))) 192 193(define_predicate "uw4_operand" 194 (and (match_code "const_int") 195 (match_test "mips_unsigned_immediate_p (INTVAL (op), 4, 2)"))) 196 197(define_predicate "uw5_operand" 198 (and (match_code "const_int") 199 (match_test "mips_unsigned_immediate_p (INTVAL (op), 5, 2)"))) 200 201(define_predicate "uw6_operand" 202 (and (match_code "const_int") 203 (match_test "mips_unsigned_immediate_p (INTVAL (op), 6, 2)"))) 204 205(define_predicate "uw8_operand" 206 (and (match_code "const_int") 207 (match_test "mips_unsigned_immediate_p (INTVAL (op), 8, 2)"))) 208 209(define_predicate "addiur2_operand" 210 (and (match_code "const_int") 211 (ior (match_test "INTVAL (op) == -1") 212 (match_test "INTVAL (op) == 1") 213 (match_test "INTVAL (op) == 4") 214 (match_test "INTVAL (op) == 8") 215 (match_test "INTVAL (op) == 12") 216 (match_test "INTVAL (op) == 16") 217 (match_test "INTVAL (op) == 20") 218 (match_test "INTVAL (op) == 24")))) 219 220(define_predicate "addiusp_operand" 221 (and (match_code "const_int") 222 (ior (match_test "(IN_RANGE (INTVAL (op), 2, 257))") 223 (match_test "(IN_RANGE (INTVAL (op), -258, -3))")))) 224 225(define_predicate "andi16_operand" 226 (and (match_code "const_int") 227 (ior (match_test "IN_RANGE (INTVAL (op), 1, 4)") 228 (match_test "IN_RANGE (INTVAL (op), 7, 8)") 229 (match_test "IN_RANGE (INTVAL (op), 15, 16)") 230 (match_test "IN_RANGE (INTVAL (op), 31, 32)") 231 (match_test "IN_RANGE (INTVAL (op), 63, 64)") 232 (match_test "INTVAL (op) == 255") 233 (match_test "INTVAL (op) == 32768") 234 (match_test "INTVAL (op) == 65535")))) 235 236(define_predicate "movep_src_register" 237 (and (match_code "reg") 238 (ior (match_test ("IN_RANGE (REGNO (op), 2, 3)")) 239 (match_test ("IN_RANGE (REGNO (op), 16, 20)"))))) 240 241(define_predicate "movep_src_operand" 242 (ior (match_operand 0 "const_0_operand") 243 (match_operand 0 "movep_src_register"))) 244 245(define_predicate "lo_operand" 246 (and (match_code "reg") 247 (match_test "REGNO (op) == LO_REGNUM"))) 248 249(define_predicate "hilo_operand" 250 (and (match_code "reg") 251 (match_test "MD_REG_P (REGNO (op))"))) 252 253(define_predicate "fcc_reload_operand" 254 (and (match_code "reg,subreg") 255 (match_test "ST_REG_P (true_regnum (op))"))) 256 257(define_predicate "muldiv_target_operand" 258 (if_then_else (match_test "TARGET_MIPS16") 259 (match_operand 0 "hilo_operand") 260 (match_operand 0 "register_operand"))) 261 262(define_predicate "const_call_insn_operand" 263 (match_code "const,symbol_ref,label_ref") 264{ 265 enum mips_symbol_type symbol_type; 266 267 if (!mips_symbolic_constant_p (op, SYMBOL_CONTEXT_CALL, &symbol_type)) 268 return false; 269 270 switch (symbol_type) 271 { 272 case SYMBOL_ABSOLUTE: 273 /* We can only use direct calls if we're sure that the target 274 function does not need $25 to be valid on entry. */ 275 if (mips_use_pic_fn_addr_reg_p (op)) 276 return false; 277 278 /* If -mlong-calls or if this function has an explicit long_call 279 attribute, we must use register addressing. The 280 SYMBOL_FLAG_LONG_CALL bit is set by mips_encode_section_info. */ 281 return !(GET_CODE (op) == SYMBOL_REF && SYMBOL_REF_LONG_CALL_P (op)); 282 283 case SYMBOL_GOT_DISP: 284 /* Without explicit relocs, there is no special syntax for 285 loading the address of a call destination into a register. 286 Using "la $25,foo; jal $25" would prevent the lazy binding 287 of "foo", so keep the address of global symbols with the 288 jal macro. */ 289 return !TARGET_EXPLICIT_RELOCS; 290 291 default: 292 return false; 293 } 294}) 295 296(define_predicate "call_insn_operand" 297 (ior (match_operand 0 "const_call_insn_operand") 298 (match_operand 0 "register_operand"))) 299 300;; A legitimate CONST_INT operand that takes more than one instruction 301;; to load. 302(define_predicate "splittable_const_int_operand" 303 (match_code "const_int") 304{ 305 /* When generating mips16 code, TARGET_LEGITIMATE_CONSTANT_P rejects 306 CONST_INTs that can't be loaded using simple insns. */ 307 if (TARGET_MIPS16) 308 return false; 309 310 /* Don't handle multi-word moves this way; we don't want to introduce 311 the individual word-mode moves until after reload. */ 312 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD) 313 return false; 314 315 /* Otherwise check whether the constant can be loaded in a single 316 instruction. */ 317 return !LUI_INT (op) && !SMALL_INT (op) && !SMALL_INT_UNSIGNED (op); 318}) 319 320(define_predicate "move_operand" 321 ;; Allow HI and LO to be used as the source of a MIPS16 move. 322 (ior (match_operand 0 "general_operand") 323 (match_operand 0 "hilo_operand")) 324{ 325 enum mips_symbol_type symbol_type; 326 327 /* The thinking here is as follows: 328 329 (1) The move expanders should split complex load sequences into 330 individual instructions. Those individual instructions can 331 then be optimized by all rtl passes. 332 333 (2) The target of pre-reload load sequences should not be used 334 to store temporary results. If the target register is only 335 assigned one value, reload can rematerialize that value 336 on demand, rather than spill it to the stack. 337 338 (3) If we allowed pre-reload passes like combine and cse to recreate 339 complex load sequences, we would want to be able to split the 340 sequences before reload as well, so that the pre-reload scheduler 341 can see the individual instructions. This falls foul of (2); 342 the splitter would be forced to reuse the target register for 343 intermediate results. 344 345 (4) We want to define complex load splitters for combine. These 346 splitters can request a temporary scratch register, which avoids 347 the problem in (2). They allow things like: 348 349 (set (reg T1) (high SYM)) 350 (set (reg T2) (low (reg T1) SYM)) 351 (set (reg X) (plus (reg T2) (const_int OFFSET))) 352 353 to be combined into: 354 355 (set (reg T3) (high SYM+OFFSET)) 356 (set (reg X) (lo_sum (reg T3) SYM+OFFSET)) 357 358 if T2 is only used this once. */ 359 switch (GET_CODE (op)) 360 { 361 case CONST_INT: 362 return !splittable_const_int_operand (op, mode); 363 364 case CONST: 365 case SYMBOL_REF: 366 case LABEL_REF: 367 if (CONST_GP_P (op)) 368 return true; 369 return (mips_symbolic_constant_p (op, SYMBOL_CONTEXT_LEA, &symbol_type) 370 && !mips_split_p[symbol_type]); 371 372 case HIGH: 373 op = XEXP (op, 0); 374 return (mips_symbolic_constant_p (op, SYMBOL_CONTEXT_LEA, &symbol_type) 375 && !mips_split_hi_p[symbol_type]); 376 377 default: 378 return true; 379 } 380}) 381 382(define_predicate "cprestore_save_slot_operand" 383 (and (match_code "mem") 384 (match_test "mips_cprestore_address_p (XEXP (op, 0), false)"))) 385 386(define_predicate "cprestore_load_slot_operand" 387 (and (match_code "mem") 388 (match_test "mips_cprestore_address_p (XEXP (op, 0), true)"))) 389 390(define_predicate "consttable_operand" 391 (match_test "CONSTANT_P (op)")) 392 393(define_predicate "symbolic_operand" 394 (match_code "const,symbol_ref,label_ref") 395{ 396 enum mips_symbol_type type; 397 return mips_symbolic_constant_p (op, SYMBOL_CONTEXT_LEA, &type); 398}) 399 400(define_predicate "absolute_symbolic_operand" 401 (match_code "const,symbol_ref,label_ref") 402{ 403 enum mips_symbol_type type; 404 return (mips_symbolic_constant_p (op, SYMBOL_CONTEXT_LEA, &type) 405 && type == SYMBOL_ABSOLUTE); 406}) 407 408(define_predicate "symbolic_operand_with_high" 409 (match_code "const,symbol_ref,label_ref") 410{ 411 enum mips_symbol_type type; 412 return (mips_symbolic_constant_p (op, SYMBOL_CONTEXT_LEA, &type) 413 && mips_hi_relocs[(int) type]); 414}) 415 416(define_predicate "force_to_mem_operand" 417 (match_code "const,symbol_ref,label_ref") 418{ 419 enum mips_symbol_type symbol_type; 420 return (mips_symbolic_constant_p (op, SYMBOL_CONTEXT_LEA, &symbol_type) 421 && mips_use_pcrel_pool_p[(int) symbol_type]); 422}) 423 424(define_predicate "got_disp_operand" 425 (match_code "const,symbol_ref,label_ref") 426{ 427 enum mips_symbol_type type; 428 return (mips_symbolic_constant_p (op, SYMBOL_CONTEXT_LEA, &type) 429 && type == SYMBOL_GOT_DISP); 430}) 431 432(define_predicate "got_page_ofst_operand" 433 (match_code "const,symbol_ref,label_ref") 434{ 435 enum mips_symbol_type type; 436 return (mips_symbolic_constant_p (op, SYMBOL_CONTEXT_LEA, &type) 437 && type == SYMBOL_GOT_PAGE_OFST); 438}) 439 440(define_predicate "tls_reloc_operand" 441 (match_code "const,symbol_ref,label_ref") 442{ 443 enum mips_symbol_type type; 444 return (mips_symbolic_constant_p (op, SYMBOL_CONTEXT_LEA, &type) 445 && (type == SYMBOL_DTPREL || type == SYMBOL_TPREL)); 446}) 447 448(define_predicate "symbol_ref_operand" 449 (match_code "symbol_ref")) 450 451(define_predicate "stack_operand" 452 (and (match_code "mem") 453 (match_test "mips_stack_address_p (XEXP (op, 0), GET_MODE (op))"))) 454 455(define_predicate "macc_msac_operand" 456 (ior (and (match_code "plus") (match_test "ISA_HAS_MACC")) 457 (and (match_code "minus") (match_test "ISA_HAS_MSAC"))) 458{ 459 rtx mult = XEXP (op, GET_CODE (op) == PLUS ? 0 : 1); 460 rtx accum = XEXP (op, GET_CODE (op) == PLUS ? 1 : 0); 461 return (GET_CODE (mult) == MULT 462 && REG_P (XEXP (mult, 0)) 463 && REG_P (XEXP (mult, 1)) 464 && REG_P (accum)); 465}) 466 467 468(define_predicate "equality_operator" 469 (match_code "eq,ne")) 470 471(define_predicate "extend_operator" 472 (match_code "zero_extend,sign_extend")) 473 474(define_predicate "trap_comparison_operator" 475 (match_code "eq,ne,lt,ltu,ge,geu")) 476 477(define_predicate "order_operator" 478 (match_code "lt,ltu,le,leu,ge,geu,gt,gtu")) 479 480;; For NE, cstore uses sltu instructions in which the first operand is $0. 481;; This isn't possible in mips16 code. 482 483(define_predicate "mips_cstore_operator" 484 (ior (match_code "eq,gt,gtu,ge,geu,lt,ltu,le,leu") 485 (and (match_code "ne") (not (match_test "TARGET_MIPS16"))))) 486 487(define_predicate "small_data_pattern" 488 (and (match_code "set,parallel,unspec,unspec_volatile,prefetch") 489 (match_test "mips_small_data_pattern_p (op)"))) 490 491(define_predicate "mem_noofs_operand" 492 (and (match_code "mem") 493 (match_code "reg" "0"))) 494 495;; Return 1 if the operand is in non-volatile memory. 496(define_predicate "non_volatile_mem_operand" 497 (and (match_operand 0 "memory_operand") 498 (not (match_test "MEM_VOLATILE_P (op)")))) 499