1;; VR4300 pipeline description. 2;; Copyright (C) 2004-2015 Free Software Foundation, Inc. 3;; 4;; This file is part of GCC. 5 6;; GCC is free software; you can redistribute it and/or modify it 7;; under the terms of the GNU General Public License as published 8;; by the Free Software Foundation; either version 3, or (at your 9;; option) any later version. 10 11;; GCC is distributed in the hope that it will be useful, but WITHOUT 12;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 13;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 14;; License for more details. 15 16;; You should have received a copy of the GNU General Public License 17;; along with GCC; see the file COPYING3. If not see 18;; <http://www.gnu.org/licenses/>. 19 20 21;; This file overrides parts of generic.md. It is derived from the 22;; old define_function_unit description. 23 24(define_insn_reservation "r4300_load" 2 25 (and (eq_attr "cpu" "r4300") 26 (eq_attr "type" "load,fpload,fpidxload,mfc,mtc")) 27 "alu") 28 29(define_insn_reservation "r4300_imul_si" 5 30 (and (eq_attr "cpu" "r4300") 31 (and (eq_attr "type" "imul,imul3,imadd") 32 (eq_attr "mode" "SI"))) 33 "imuldiv*5") 34 35(define_insn_reservation "r4300_imul_di" 8 36 (and (eq_attr "cpu" "r4300") 37 (and (eq_attr "type" "imul,imul3,imadd") 38 (eq_attr "mode" "DI"))) 39 "imuldiv*8") 40 41(define_insn_reservation "r4300_idiv_si" 37 42 (and (eq_attr "cpu" "r4300") 43 (and (eq_attr "type" "idiv") 44 (eq_attr "mode" "SI"))) 45 "imuldiv*37") 46 47(define_insn_reservation "r4300_idiv_di" 69 48 (and (eq_attr "cpu" "r4300") 49 (and (eq_attr "type" "idiv") 50 (eq_attr "mode" "DI"))) 51 "imuldiv*69") 52 53(define_insn_reservation "r4300_fmove" 1 54 (and (eq_attr "cpu" "r4300") 55 (eq_attr "type" "fcmp,fabs,fneg,fmove")) 56 "imuldiv") 57 58(define_insn_reservation "r4300_fadd" 3 59 (and (eq_attr "cpu" "r4300") 60 (eq_attr "type" "fadd")) 61 "imuldiv*3") 62 63(define_insn_reservation "r4300_fmul_single" 5 64 (and (eq_attr "cpu" "r4300") 65 (and (eq_attr "type" "fmul,fmadd") 66 (eq_attr "mode" "SF"))) 67 "imuldiv*5") 68 69(define_insn_reservation "r4300_fmul_double" 8 70 (and (eq_attr "cpu" "r4300") 71 (and (eq_attr "type" "fmul,fmadd") 72 (eq_attr "mode" "DF"))) 73 "imuldiv*8") 74 75(define_insn_reservation "r4300_fdiv_single" 29 76 (and (eq_attr "cpu" "r4300") 77 (and (eq_attr "type" "fdiv,frdiv,fsqrt,frsqrt") 78 (eq_attr "mode" "SF"))) 79 "imuldiv*29") 80 81(define_insn_reservation "r4300_fdiv_double" 58 82 (and (eq_attr "cpu" "r4300") 83 (and (eq_attr "type" "fdiv,frdiv,fsqrt,frsqrt") 84 (eq_attr "mode" "DF"))) 85 "imuldiv*58") 86