1#objdump: -dr --prefix-addresses -mmips:3000 2#name: MIPS ulh-svr4pic 3#as: -32 -mips1 -KPIC -EB 4#source: ulh-pic.s 5 6# Test the unaligned load and store macros with -KPIC. 7 8.*: +file format .*mips.* 9 10Disassembly of section .text: 110+0000 <[^>]*> lw at,0\(gp\) 12[ ]*0: R_MIPS_GOT16 .data 130+0004 <[^>]*> nop 140+0008 <[^>]*> addiu at,at,0 15[ ]*8: R_MIPS_LO16 .data 160+000c <[^>]*> lb a0,0\(at\) 170+0010 <[^>]*> lbu at,1\(at\) 180+0014 <[^>]*> sll a0,a0,0x8 190+0018 <[^>]*> or a0,a0,at 200+001c <[^>]*> lw at,0\(gp\) 21[ ]*1c: R_MIPS_GOT16 big_external_data_label 220+0020 <[^>]*> nop 230+0024 <[^>]*> lbu a0,0\(at\) 240+0028 <[^>]*> lbu at,1\(at\) 250+002c <[^>]*> sll a0,a0,0x8 260+0030 <[^>]*> or a0,a0,at 270+0034 <[^>]*> lw at,0\(gp\) 28[ ]*34: R_MIPS_GOT16 small_external_data_label 290+0038 <[^>]*> nop 300+003c <[^>]*> lwl a0,0\(at\) 310+0040 <[^>]*> lwr a0,3\(at\) 320+0044 <[^>]*> lw at,0\(gp\) 33[ ]*44: R_MIPS_GOT16 big_external_common 340+0048 <[^>]*> nop 350+004c <[^>]*> sb a0,1\(at\) 360+0050 <[^>]*> srl a0,a0,0x8 370+0054 <[^>]*> sb a0,0\(at\) 380+0058 <[^>]*> lbu at,1\(at\) 390+005c <[^>]*> sll a0,a0,0x8 400+0060 <[^>]*> or a0,a0,at 410+0064 <[^>]*> lw at,0\(gp\) 42[ ]*64: R_MIPS_GOT16 small_external_common 430+0068 <[^>]*> nop 440+006c <[^>]*> swl a0,0\(at\) 450+0070 <[^>]*> swr a0,3\(at\) 460+0074 <[^>]*> lw at,0\(gp\) 47[ ]*74: R_MIPS_GOT16 .bss 480+0078 <[^>]*> nop 490+007c <[^>]*> addiu at,at,0 50[ ]*7c: R_MIPS_LO16 .bss 510+0080 <[^>]*> lb a0,0\(at\) 520+0084 <[^>]*> lbu at,1\(at\) 530+0088 <[^>]*> sll a0,a0,0x8 540+008c <[^>]*> or a0,a0,at 550+0090 <[^>]*> lw at,0\(gp\) 56[ ]*90: R_MIPS_GOT16 .bss 570+0094 <[^>]*> nop 580+0098 <[^>]*> addiu at,at,1000 59[ ]*98: R_MIPS_LO16 .bss 600+009c <[^>]*> lbu a0,0\(at\) 610+00a0 <[^>]*> lbu at,1\(at\) 620+00a4 <[^>]*> sll a0,a0,0x8 630+00a8 <[^>]*> or a0,a0,at 640+00ac <[^>]*> lw at,0\(gp\) 65[ ]*ac: R_MIPS_GOT16 .data 660+00b0 <[^>]*> nop 670+00b4 <[^>]*> addiu at,at,0 68[ ]*b4: R_MIPS_LO16 .data 690+00b8 <[^>]*> addiu at,at,1 700+00bc <[^>]*> lwl a0,0\(at\) 710+00c0 <[^>]*> lwr a0,3\(at\) 720+00c4 <[^>]*> lw at,0\(gp\) 73[ ]*c4: R_MIPS_GOT16 big_external_data_label 740+00c8 <[^>]*> nop 750+00cc <[^>]*> addiu at,at,1 760+00d0 <[^>]*> sb a0,1\(at\) 770+00d4 <[^>]*> srl a0,a0,0x8 780+00d8 <[^>]*> sb a0,0\(at\) 790+00dc <[^>]*> lbu at,1\(at\) 800+00e0 <[^>]*> sll a0,a0,0x8 810+00e4 <[^>]*> or a0,a0,at 820+00e8 <[^>]*> lw at,0\(gp\) 83[ ]*e8: R_MIPS_GOT16 small_external_data_label 840+00ec <[^>]*> nop 850+00f0 <[^>]*> addiu at,at,1 860+00f4 <[^>]*> swl a0,0\(at\) 870+00f8 <[^>]*> swr a0,3\(at\) 880+00fc <[^>]*> lw at,0\(gp\) 89[ ]*fc: R_MIPS_GOT16 big_external_common 900+0100 <[^>]*> nop 910+0104 <[^>]*> addiu at,at,1 920+0108 <[^>]*> lb a0,0\(at\) 930+010c <[^>]*> lbu at,1\(at\) 940+0110 <[^>]*> sll a0,a0,0x8 950+0114 <[^>]*> or a0,a0,at 960+0118 <[^>]*> lw at,0\(gp\) 97[ ]*118: R_MIPS_GOT16 small_external_common 980+011c <[^>]*> nop 990+0120 <[^>]*> addiu at,at,1 1000+0124 <[^>]*> lbu a0,0\(at\) 1010+0128 <[^>]*> lbu at,1\(at\) 1020+012c <[^>]*> sll a0,a0,0x8 1030+0130 <[^>]*> or a0,a0,at 1040+0134 <[^>]*> lw at,0\(gp\) 105[ ]*134: R_MIPS_GOT16 .bss 1060+0138 <[^>]*> nop 1070+013c <[^>]*> addiu at,at,0 108[ ]*13c: R_MIPS_LO16 .bss 1090+0140 <[^>]*> addiu at,at,1 1100+0144 <[^>]*> lwl a0,0\(at\) 1110+0148 <[^>]*> lwr a0,3\(at\) 1120+014c <[^>]*> lw at,0\(gp\) 113[ ]*14c: R_MIPS_GOT16 .bss 1140+0150 <[^>]*> nop 1150+0154 <[^>]*> addiu at,at,1000 116[ ]*154: R_MIPS_LO16 .bss 1170+0158 <[^>]*> addiu at,at,1 1180+015c <[^>]*> sb a0,1\(at\) 1190+0160 <[^>]*> srl a0,a0,0x8 1200+0164 <[^>]*> sb a0,0\(at\) 1210+0168 <[^>]*> lbu at,1\(at\) 1220+016c <[^>]*> sll a0,a0,0x8 1230+0170 <[^>]*> or a0,a0,at 124 ... 125