1# source file to test assembly of MIPS DSP ASE Rev2 for MIPS32 instructions
2
3	.set noreorder
4	.set noat
5
6	.text
7text_label:
8
9	absq_s.qb	$0,$1
10	addu.ph		$1,$2,$3
11	addu_s.ph	$2,$3,$4
12	adduh.qb	$3,$4,$5
13	adduh_r.qb	$4,$5,$6
14	append		$5,$6,0
15	append		$5,$6,31
16	balign		$6,$7,0
17	balign		$6,$7,1
18	balign		$6,$7,2
19	balign		$6,$7,3
20	cmpgdu.eq.qb	$6,$7,$8
21	cmpgdu.lt.qb	$7,$8,$9
22	cmpgdu.le.qb	$8,$9,$10
23	dpa.w.ph	$ac0,$9,$10
24	dps.w.ph	$ac1,$10,$11
25	madd		$ac2,$11,$12
26	maddu		$ac3,$12,$13
27	msub		$ac0,$13,$14
28	msubu		$ac1,$14,$15
29	mul.ph		$15,$16,$17
30	mul_s.ph	$16,$17,$18
31	mulq_rs.w	$17,$18,$19
32	mulq_s.ph	$18,$19,$20
33	mulq_s.w	$19,$20,$21
34	mulsa.w.ph	$ac2,$20,$21
35	mult		$ac3,$21,$22
36	multu		$ac0,$22,$23
37	precr.qb.ph	$23,$24,$25
38	precr_sra.ph.w	$24,$25,0
39	precr_sra.ph.w	$24,$25,31
40	precr_sra_r.ph.w	$25,$26,0
41	precr_sra_r.ph.w	$25,$26,31
42	prepend		$26,$27,0
43	prepend		$26,$27,31
44	shra.qb		$27,$28,0
45	shra.qb		$27,$28,7
46	shra_r.qb	$28,$29,0
47	shra_r.qb	$28,$29,7
48	shrav.qb	$29,$30,$31
49	shrav_r.qb	$30,$31,$0
50	shrl.ph		$31,$0,0
51	shrl.ph		$31,$0,15
52	shrlv.ph	$0,$1,$2
53	subu.ph		$1,$2,$3
54	subu_s.ph	$2,$3,$4
55	subuh.qb	$3,$4,$5
56	subuh_r.qb	$4,$5,$6
57	addqh.ph        $5,$6,$7
58	addqh_r.ph      $6,$7,$8
59	addqh.w         $7,$8,$9
60	addqh_r.w       $8,$9,$10
61	subqh.ph        $9,$10,$11
62	subqh_r.ph      $10,$11,$12
63	subqh.w         $11,$12,$13
64	subqh_r.w       $12,$13,$14
65	dpax.w.ph       $ac1,$13,$14
66	dpsx.w.ph       $ac2,$14,$15
67	dpaqx_s.w.ph    $ac3,$15,$16
68	dpaqx_sa.w.ph   $ac0,$16,$17
69	dpsqx_s.w.ph    $ac1,$17,$18
70	dpsqx_sa.w.ph   $ac2,$18,$19
71
72# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
73	.align	2
74	.space	8
75