1@c Copyright (C) 2014-2017 Free Software Foundation, Inc. 2@c This is part of the GAS manual. 3@c For copying conditions, see the file as.texinfo. 4@c man end 5 6@ifset GENERIC 7@page 8@node Visium-Dependent 9@chapter Visium Dependent Features 10@end ifset 11 12@ifclear GENERIC 13@node Machine Dependencies 14@chapter Visium Dependent Features 15@end ifclear 16 17@cindex Visium support 18@menu 19* Visium Options:: Options 20* Visium Syntax:: Syntax 21* Visium Opcodes:: Opcodes 22@end menu 23 24@node Visium Options 25@section Options 26@cindex Visium options 27@cindex options for Visium 28 29The Visium assembler implements one machine-specific option: 30 31@c man begin OPTIONS 32@table @gcctabopt 33@cindex @code{-mtune=@var{arch}} command line option, Visium 34@item -mtune=@var{arch} 35This option specifies the target architecture. If an attempt is made to 36assemble an instruction that will not execute on the target architecture, 37the assembler will issue an error message. 38 39The following names are recognized: 40@code{mcm24} 41@code{mcm} 42@code{gr5} 43@code{gr6} 44@end table 45@c man end 46 47@node Visium Syntax 48@section Syntax 49 50@menu 51* Visium Characters:: Special Characters 52* Visium Registers:: Register Names 53@end menu 54 55@node Visium Characters 56@subsection Special Characters 57 58@cindex line comment character, Visium 59@cindex Visium line comment character 60Line comments are introduced either by the @samp{!} character or by the 61@samp{;} character appearing anywhere on a line. 62 63A hash character (@samp{#}) as the first character on a line also 64marks the start of a line comment, but in this case it could also be a 65logical line number directive (@pxref{Comments}) or a preprocessor 66control command (@pxref{Preprocessing}). 67 68@cindex line separator, Visium 69@cindex statement separator, Visium 70@cindex Visium line separator 71The Visium assembler does not currently support a line separator character. 72 73@node Visium Registers 74@subsection Register Names 75@cindex Visium registers 76@cindex register names, Visium 77Registers can be specified either by using their canonical mnemonic names 78or by using their alias if they have one, for example @samp{sp}. 79 80@node Visium Opcodes 81@section Opcodes 82All the standard opcodes of the architecture are implemented, along with the 83following three pseudo-instructions: @code{cmp}, @code{cmpc}, @code{move}. 84 85In addition, the following two illegal opcodes are implemented and used by the simulation: 86 87@example 88stop 5-bit immediate, SourceA 89trace 5-bit immediate, SourceA 90@end example 91