1// Copyright 2017 The Fuchsia Authors. All rights reserved. 2// Use of this source code is governed by a BSD-style license that can be 3// found in the LICENSE file. 4 5#pragma once 6 7typedef struct { 8 uint32_t ctl0; 9 uint32_t ctl1; 10} aml_tdm_sclk_ctl_t; 11 12typedef enum { 13 MCLK_A, 14 MCLK_B, 15 MCLK_C, 16 MCLK_D, 17 MCLK_E, 18 MCLK_F 19} aml_tdm_mclk_t; 20 21typedef enum { 22 TDM_OUT_A, 23 TDM_OUT_B, 24 TDM_OUT_C 25} aml_tdm_out_t; 26 27typedef enum { 28 TDM_IN_A, 29 TDM_IN_B, 30 TDM_IN_C, 31 TDM_IN_LB 32} aml_tdm_in_t; 33 34typedef struct { 35 uint32_t ctl0; 36 uint32_t ctl1; 37 uint32_t start_addr; 38 uint32_t finish_addr; 39 uint32_t int_addr; 40 uint32_t status1; 41 uint32_t status2; 42 uint32_t start_addr_b; 43 uint32_t finish_addr_b; 44 uint32_t reserved[7]; 45} aml_tdm_toddr_regs_t; 46 47typedef struct { 48 uint32_t ctl0; 49 uint32_t ctl1; 50 uint32_t start_addr; 51 uint32_t finish_addr; 52 uint32_t int_addr; 53 uint32_t status1; 54 uint32_t status2; 55 uint32_t start_addr_b; 56 uint32_t finish_addr_b; 57 uint32_t reserved[7]; 58} aml_tdm_frddr_regs_t; 59 60typedef struct { 61 uint32_t ctl; 62 uint32_t swap; 63 uint32_t mask[4]; 64 uint32_t stat; 65 uint32_t mute_val; 66 uint32_t mute[4]; 67 uint32_t reserved[4]; 68} aml_tdm_tdmin_regs_t; 69 70typedef struct { 71 uint32_t ctl0; 72 uint32_t ctl1; 73 uint32_t swap; 74 uint32_t mask[4]; 75 uint32_t stat; 76 uint32_t gain[2]; 77 uint32_t mute_val; 78 uint32_t mute[4]; 79 uint32_t mask_val; 80} aml_tdm_tdmout_regs_t; 81 82typedef volatile struct aml_tdm_regs { 83 84 uint32_t clk_gate_en; 85 uint32_t mclk_ctl[6]; //mclk control - a,b,c,d,e,f 86 uint32_t reserved0[9]; 87 88 aml_tdm_sclk_ctl_t sclk_ctl[6]; 89 uint32_t reserved1[4]; 90 91 uint32_t clk_tdmin_ctl[4]; //tdm in control - a,b,c,lb 92 uint32_t clk_tdmout_ctl[3]; //tdm out control - a,b,c 93 94 uint32_t clk_spdifin_ctl; 95 uint32_t clk_spdifout_ctl; 96 uint32_t clk_resample_ctl; 97 uint32_t clk_locker_ctl; 98 uint32_t clk_pdmin_ctl0; 99 uint32_t clk_pdmin_ctl1; 100 uint32_t reserved2[19]; 101 102 aml_tdm_toddr_regs_t toddr[3]; 103 aml_tdm_frddr_regs_t frddr[3]; 104 105 uint32_t arb_ctl; 106 uint32_t reserved3[15]; 107 108 uint32_t lb_ctl0; 109 uint32_t lb_ctl1; 110 uint32_t reserved4[14]; 111 112 aml_tdm_tdmin_regs_t tdmin[4]; 113 uint32_t reserved5[64]; 114 aml_tdm_tdmout_regs_t tdmout[3]; 115 116 117//TODO - still more regs, will add as needed 118 119} __PACKED aml_tdm_regs_t; 120