1// Copyright 2018 The Fuchsia Authors. All rights reserved. 2// Use of this source code is governed by a BSD-style license that can be 3// found in the LICENSE file. 4 5#pragma once 6 7/** 8 * Register definitions taken from 9 * 10 * ALC5514 (ALC5514-CG) 11 * Voice Digital Signal Processor For Microphone Application Datasheet 12 * Rev. 1.3 13 * 4 July 2016 14 */ 15 16namespace audio { 17namespace alc5514 { 18 19constexpr uint32_t RESET = 0x18002000; 20constexpr uint32_t PWR_ANA1 = 0x18002004; 21constexpr uint32_t PWR_ANA2 = 0x18002008; 22constexpr uint32_t I2S_CTRL1 = 0x18002010; 23constexpr uint32_t I2S_CTRL2 = 0x18002014; 24constexpr uint32_t DIG_IO_CTRL = 0x18002070; 25constexpr uint32_t PAD_CTRL1 = 0x18002080; 26constexpr uint32_t DMIC_DATA_CTRL = 0x180020A0; 27constexpr uint32_t DIG_SOURCE_CTRL = 0x180020A4; 28constexpr uint32_t SRC_ENABLE = 0x180020AC; 29constexpr uint32_t CLK_CTRL1 = 0x18002104; 30constexpr uint32_t CLK_CTRL2 = 0x18002108; 31constexpr uint32_t ASRC_IN_CTRL = 0x18002180; 32constexpr uint32_t DOWNFILTER0_CTRL1 = 0x18002190; 33constexpr uint32_t DOWNFILTER0_CTRL2 = 0x18002194; 34constexpr uint32_t DOWNFILTER0_CTRL3 = 0x18002198; 35constexpr uint32_t DOWNFILTER1_CTRL1 = 0x180021A0; 36constexpr uint32_t DOWNFILTER1_CTRL2 = 0x180021A4; 37constexpr uint32_t DOWNFILTER1_CTRL3 = 0x180021A8; 38constexpr uint32_t ANA_CTRL_LDO10 = 0x18002200; 39constexpr uint32_t ANA_CTRL_ADCFED = 0x18002224; 40constexpr uint32_t VERSION_ID = 0x18002FF0; 41constexpr uint32_t DEVICE_ID = 0x18002FF4; 42 43// RESET bits 44constexpr uint32_t RESET_VALUE = 0x000010EC; 45 46// PWR_ANA1 bits 47constexpr uint32_t PWR_ANA1_EN_SLEEP_RESET = (1u << 23); 48constexpr uint32_t PWR_ANA1_DMIC_DATA_IN2 = (1u << 15); 49constexpr uint32_t PWR_ANA1_POW_CKDET = (1u << 11); 50constexpr uint32_t PWR_ANA1_POW_PLL = (1u << 7); 51constexpr uint32_t PWR_ANA1_POW_LDO18_IN = (1u << 5); 52constexpr uint32_t PWR_ANA1_POW_LDO18_ADC = (1u << 4); 53constexpr uint32_t PWR_ANA1_POW_LDO21 = (1u << 3); 54constexpr uint32_t PWR_ANA1_POW_BG_LDO18 = (1u << 2); 55constexpr uint32_t PWR_ANA1_POW_BG_LDO21 = (1u << 1); 56 57// PWR_ANA2 bits 58constexpr uint32_t PWR_ANA2_POW_PLL2 = (1u << 22); 59constexpr uint32_t PWR_ANA2_RSTB_PLL2 = (1u << 21); 60constexpr uint32_t PWR_ANA2_POW_PLL2_LDO = (1u << 20); 61constexpr uint32_t PWR_ANA2_POW_PLL1 = (1u << 18); 62constexpr uint32_t PWR_ANA2_RSTB_PLL1 = (1u << 17); 63constexpr uint32_t PWR_ANA2_POW_PLL1_LDO = (1u << 16); 64constexpr uint32_t PWR_ANA2_POW_BG_MBIAS = (1u << 15); 65constexpr uint32_t PWR_ANA2_POW_MBIAS = (1u << 14); 66constexpr uint32_t PWR_ANA2_POW_VREF2 = (1u << 13); 67constexpr uint32_t PWR_ANA2_POW_VREF1 = (1u << 12); 68constexpr uint32_t PWR_ANA2_POWR_LDO16 = (1u << 11); 69constexpr uint32_t PWR_ANA2_POWL_LDO16 = (1u << 10); 70constexpr uint32_t PWR_ANA2_POW_ADC2 = (1u << 9); 71constexpr uint32_t PWR_ANA2_POW_INPUT_BUF = (1u << 8); 72constexpr uint32_t PWR_ANA2_POW_ADC1_R = (1u << 7); 73constexpr uint32_t PWR_ANA2_POW_ADC1_L = (1u << 6); 74constexpr uint32_t PWR_ANA2_POW2_BSTR = (1u << 5); 75constexpr uint32_t PWR_ANA2_POW2_BSTL = (1u << 4); 76constexpr uint32_t PWR_ANA2_POW_BSTR = (1u << 3); 77constexpr uint32_t PWR_ANA2_POW_BSTL = (1u << 2); 78constexpr uint32_t PWR_ANA2_POW_ADCFEDR = (1u << 1); 79constexpr uint32_t PWR_ANA2_POW_ADCFEDL = (1u << 0); 80 81// I2S_CTRL1 bits 82constexpr uint32_t I2S_CTRL1_MODE_SEL_TDM_MODE = (1u << 28); 83constexpr uint32_t I2S_CTRL1_DATA_FORMAT_PCM_B = (3u << 16); 84constexpr uint32_t I2S_CTRL1_TDMSLOT_SEL_RX_8CH = (3u << 10); 85constexpr uint32_t I2S_CTRL1_TDMSLOT_SEL_TX_8CH = (3u << 6); 86 87// I2S_CTRL2 bits 88constexpr uint32_t I2S_CTRL2_DOCKING_MODE_ENABLE = (1u << 31); 89constexpr uint32_t I2S_CTRL2_DOCKING_MODE_4CH = (1u << 29); 90 91// DIG_IO_CTRL bits 92constexpr uint32_t DIG_IO_CTRL_SEL_GPIO4_I2S_MCLK = (1u << 6); 93 94// DIG_SOURCE_CTRL bits 95constexpr uint32_t DIG_SOURCE_CTRL_AD1_INPUT_SEL_DMIC1 = (0 << 1); 96constexpr uint32_t DIG_SOURCE_CTRL_AD1_INPUT_SEL_DMIC2 = (1u << 1); 97constexpr uint32_t DIG_SOURCE_CTRL_AD1_INPUT_SEL_MASK = (1u << 1); 98constexpr uint32_t DIG_SOURCE_CTRL_AD0_INPUT_SEL_DMIC1 = (0 << 0); 99constexpr uint32_t DIG_SOURCE_CTRL_AD0_INPUT_SEL_DMIC2 = (1u << 0); 100constexpr uint32_t DIG_SOURCE_CTRL_AD0_INPUT_SEL_MASK = (1u << 0); 101 102// SRC_ENABLE bits 103constexpr uint32_t SRC_ENABLE_SRCOUT_1_INPUT_SEL_PCM_DATA0_LR = (4u << 28); 104constexpr uint32_t SRC_ENABLE_SRCOUT_1_INPUT_SEL_MASK = (0xF << 28); 105constexpr uint32_t SRC_ENABLE_SRCOUT_2_INPUT_SEL_PCM_DATA1_LR = (4u << 24); 106constexpr uint32_t SRC_ENABLE_SRCOUT_2_INPUT_SEL_MASK = (0xF << 24); 107 108// CLK_CTRL1 bits 109constexpr uint32_t CLK_CTRL1_CLK_AD_ANA1_EN = (1u << 31); 110constexpr uint32_t CLK_CTRL1_CLK_DMIC_OUT2_EN = (1u << 29); 111constexpr uint32_t CLK_CTRL1_CLK_DMIC_OUT1_EN = (1u << 28); 112constexpr uint32_t CLK_CTRL1_CLK_AD1_EN = (1u << 24); 113constexpr uint32_t CLK_CTRL1_CLK_AD0_EN = (1u << 23); 114constexpr uint32_t CLK_CTRL1_CLK_DMIC_OUT_SEL_DIV8 = (3u << 8); 115constexpr uint32_t CLK_CTRL1_CLK_DMIC_OUT_SEL_MASK = (0xF << 8); 116constexpr uint32_t CLK_CTRL1_CLK_AD_ANA1_SEL_DIV3 = (2u << 0); 117constexpr uint32_t CLK_CTRL1_CLK_AD_ANA1_SEL_MASK = (0xF << 0); 118 119// CLK_CTRL2 bits 120constexpr uint32_t CLK_CTRL2_AD1_TRACK = (1u << 17); 121constexpr uint32_t CLK_CTRL2_AD0_TRACK = (1u << 16); 122constexpr uint32_t CLK_CTRL2_CLK_SYS_DIV_OUT_DIV2 = (1u << 8); 123constexpr uint32_t CLK_CTRL2_CLK_SYS_DIV_OUT_MASK = (3u << 8); 124constexpr uint32_t CLK_CTRL2_SEL_ADC_OSR_DIV2 = (1u << 4); 125constexpr uint32_t CLK_CTRL2_SEL_ADC_OSR_MASK = (3u << 4); 126constexpr uint32_t CLK_CTRL2_CLK_SYS_PRE_SEL_I2S_MCLK = (2u << 0); 127 128// DOWNFILTER_CTRL bits 129constexpr uint32_t DOWNFILTER_CTRL_AD_DMIC_MIX_MUTE = (1u << 11); 130constexpr uint32_t DOWNFILTER_CTRL_AD_AD_MIX_MUTE = (1u << 10); 131constexpr uint32_t DOWNFILTER_CTRL_AD_AD_MUTE = (1u << 7); 132constexpr uint32_t DOWNFILTER_CTRL_AD_AD_GAIN_MASK = (0x7F << 0); 133 134// ANA_CTRL_LDO10 bits 135constexpr uint32_t ANA_CTRL_LDO10_DLDO_I_LIMIT_EN = (1u << 16); 136 137// ANA_CTRL_ADCFED bits 138constexpr uint32_t ANA_CTRL_ADCFED_BIAS_CTRL_3UA = (2u << 10); 139 140// DEVICE_ID bits 141constexpr uint32_t DEVICE_ID_ALC5514 = 0x10EC5514; 142 143} // namespace alc5514 144} // namespace audio 145