1/*- 2 * SPDX-License-Identifier: BSD-3-Clause 3 * 4 * Copyright (c) 2003 Peter Wemm. 5 * Copyright (c) 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * William Jolitz. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. Neither the name of the University nor the names of its contributors 20 * may be used to endorse or promote products derived from this software 21 * without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 */ 35 36#ifndef _MACHINE_REG_H_ 37#define _MACHINE_REG_H_ 38 39#include <sys/_types.h> 40 41#ifdef __i386__ 42/* 43 * Indices for registers in `struct trapframe' and `struct regs'. 44 * 45 * This interface is deprecated. In the kernel, it is only used in FPU 46 * emulators to convert from register numbers encoded in instructions to 47 * register values. Everything else just accesses the relevant struct 48 * members. In userland, debuggers tend to abuse this interface since 49 * they don't understand that `struct regs' is a struct. I hope they have 50 * stopped accessing the registers in the trap frame via PT_{READ,WRITE}_U 51 * and we can stop supporting the user area soon. 52 */ 53#define tFS (0) 54#define tES (1) 55#define tDS (2) 56#define tEDI (3) 57#define tESI (4) 58#define tEBP (5) 59#define tISP (6) 60#define tEBX (7) 61#define tEDX (8) 62#define tECX (9) 63#define tEAX (10) 64#define tERR (12) 65#define tEIP (13) 66#define tCS (14) 67#define tEFLAGS (15) 68#define tESP (16) 69#define tSS (17) 70 71/* 72 * Indices for registers in `struct regs' only. 73 * 74 * Some registers live in the pcb and are only in an "array" with the 75 * other registers in application interfaces that copy all the registers 76 * to or from a `struct regs'. 77 */ 78#define tGS (18) 79#endif /* __i386__ */ 80 81/* Rename the structs below depending on the machine architecture. */ 82#ifdef __i386__ 83#define __reg32 reg 84#define __fpreg32 fpreg 85#define __dbreg32 dbreg 86#define __segbasereg32 segbasereg 87#else 88#define __reg32 reg32 89#define __reg64 reg 90#define __fpreg32 fpreg32 91#define __fpreg64 fpreg 92#define __dbreg32 dbreg32 93#define __dbreg64 dbreg 94#define __segbasereg32 segbasereg32 95#define __segbasereg64 segbasereg 96#define __HAVE_REG32 97#endif 98 99/* 100 * Register set accessible via /proc/$pid/regs and PT_{SET,GET}REGS. 101 */ 102struct __reg32 { 103 __uint32_t r_fs; 104 __uint32_t r_es; 105 __uint32_t r_ds; 106 __uint32_t r_edi; 107 __uint32_t r_esi; 108 __uint32_t r_ebp; 109 __uint32_t r_isp; 110 __uint32_t r_ebx; 111 __uint32_t r_edx; 112 __uint32_t r_ecx; 113 __uint32_t r_eax; 114 __uint32_t r_trapno; 115 __uint32_t r_err; 116 __uint32_t r_eip; 117 __uint32_t r_cs; 118 __uint32_t r_eflags; 119 __uint32_t r_esp; 120 __uint32_t r_ss; 121 __uint32_t r_gs; 122}; 123 124struct __reg64 { 125 __int64_t r_r15; 126 __int64_t r_r14; 127 __int64_t r_r13; 128 __int64_t r_r12; 129 __int64_t r_r11; 130 __int64_t r_r10; 131 __int64_t r_r9; 132 __int64_t r_r8; 133 __int64_t r_rdi; 134 __int64_t r_rsi; 135 __int64_t r_rbp; 136 __int64_t r_rbx; 137 __int64_t r_rdx; 138 __int64_t r_rcx; 139 __int64_t r_rax; 140 __uint32_t r_trapno; 141 __uint16_t r_fs; 142 __uint16_t r_gs; 143 __uint32_t r_err; 144 __uint16_t r_es; 145 __uint16_t r_ds; 146 __int64_t r_rip; 147 __int64_t r_cs; 148 __int64_t r_rflags; 149 __int64_t r_rsp; 150 __int64_t r_ss; 151}; 152 153/* 154 * Register set accessible via /proc/$pid/fpregs. 155 * 156 * XXX should get struct from fpu.h. Here we give a slightly 157 * simplified struct. This may be too much detail. Perhaps 158 * an array of unsigned longs is best. 159 */ 160struct __fpreg32 { 161 __uint32_t fpr_env[7]; 162 __uint8_t fpr_acc[8][10]; 163 __uint32_t fpr_ex_sw; 164 __uint8_t fpr_pad[64]; 165}; 166 167struct __fpreg64 { 168 __uint64_t fpr_env[4]; 169 __uint8_t fpr_acc[8][16]; 170 __uint8_t fpr_xacc[16][16]; 171 __uint64_t fpr_spare[12]; 172}; 173 174/* 175 * Register set accessible via PT_GETXMMREGS (i386). 176 */ 177struct xmmreg { 178 /* 179 * XXX should get struct from npx.h. Here we give a slightly 180 * simplified struct. This may be too much detail. Perhaps 181 * an array of unsigned longs is best. 182 */ 183 __uint32_t xmm_env[8]; 184 __uint8_t xmm_acc[8][16]; 185 __uint8_t xmm_reg[8][16]; 186 __uint8_t xmm_pad[224]; 187}; 188 189/* 190 * Register set accessible via /proc/$pid/dbregs. 191 */ 192struct __dbreg32 { 193 __uint32_t dr[8]; /* debug registers */ 194 /* Index 0-3: debug address registers */ 195 /* Index 4-5: reserved */ 196 /* Index 6: debug status */ 197 /* Index 7: debug control */ 198}; 199 200struct __dbreg64 { 201 __uint64_t dr[16]; /* debug registers */ 202 /* Index 0-3: debug address registers */ 203 /* Index 4-5: reserved */ 204 /* Index 6: debug status */ 205 /* Index 7: debug control */ 206 /* Index 8-15: reserved */ 207}; 208 209#define DBREG_DR6_RESERVED1 0xffff0ff0 210#define DBREG_DR6_BMASK 0x000f 211#define DBREG_DR6_B(i) (1 << (i)) 212#define DBREG_DR6_BD 0x2000 213#define DBREG_DR6_BS 0x4000 214#define DBREG_DR6_BT 0x8000 215 216#define DBREG_DR7_RESERVED1 0x0400 217#define DBREG_DR7_LOCAL_ENABLE 0x01 218#define DBREG_DR7_GLOBAL_ENABLE 0x02 219#define DBREG_DR7_LEN_1 0x00 /* 1 byte length */ 220#define DBREG_DR7_LEN_2 0x01 221#define DBREG_DR7_LEN_4 0x03 222#define DBREG_DR7_LEN_8 0x02 223#define DBREG_DR7_EXEC 0x00 /* break on execute */ 224#define DBREG_DR7_WRONLY 0x01 /* break on write */ 225#define DBREG_DR7_RDWR 0x03 /* break on read or write */ 226#define DBREG_DR7_MASK(i) \ 227 ((__u_register_t)(0xf) << ((i) * 4 + 16) | 0x3 << (i) * 2) 228#define DBREG_DR7_SET(i, len, access, enable) \ 229 ((__u_register_t)((len) << 2 | (access)) << ((i) * 4 + 16) | \ 230 (enable) << (i) * 2) 231#define DBREG_DR7_GD 0x2000 232#define DBREG_DR7_ENABLED(d, i) (((d) & 0x3 << (i) * 2) != 0) 233#define DBREG_DR7_ACCESS(d, i) ((d) >> ((i) * 4 + 16) & 0x3) 234#define DBREG_DR7_LEN(d, i) ((d) >> ((i) * 4 + 18) & 0x3) 235 236#define DBREG_DRX(d,x) ((d)->dr[(x)]) /* reference dr0 - dr7 by 237 register number */ 238 239/* 240 * Register set accessible via NT_X86_SEGBASES. 241 */ 242struct __segbasereg32 { 243 __uint32_t r_fsbase; 244 __uint32_t r_gsbase; 245}; 246 247struct __segbasereg64 { 248 __uint64_t r_fsbase; 249 __uint64_t r_gsbase; 250}; 251 252#undef __reg32 253#undef __reg64 254#undef __fpreg32 255#undef __fpreg64 256#undef __dbreg32 257#undef __dbreg64 258#undef __segbasereg32 259#undef __segbasereg64 260 261#ifdef _KERNEL 262/* 263 * XXX these interfaces are MI, so they should be declared in a MI place. 264 */ 265int fill_frame_regs(struct trapframe *, struct reg *); 266#endif 267 268#endif /* !_MACHINE_REG_H_ */ 269