1/*-
2 * SPDX-License-Identifier: BSD-3-Clause
3 *
4 * Copyright (C) 2008 MARVELL INTERNATIONAL LTD.
5 * All rights reserved.
6 *
7 * Developed by Semihalf.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 * 3. Neither the name of MARVELL nor the names of contributors
18 *    may be used to endorse or promote products derived from this software
19 *    without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 */
33
34/*
35 * FDT attachment driver for the USB Enhanced Host Controller.
36 */
37
38#include <sys/cdefs.h>
39#include "opt_bus.h"
40
41#include <sys/stdint.h>
42#include <sys/stddef.h>
43#include <sys/param.h>
44#include <sys/queue.h>
45#include <sys/types.h>
46#include <sys/systm.h>
47#include <sys/kernel.h>
48#include <sys/bus.h>
49#include <sys/module.h>
50#include <sys/lock.h>
51#include <sys/mutex.h>
52#include <sys/condvar.h>
53#include <sys/sysctl.h>
54#include <sys/sx.h>
55#include <sys/unistd.h>
56#include <sys/callout.h>
57#include <sys/malloc.h>
58#include <sys/priv.h>
59
60#include <dev/ofw/ofw_bus.h>
61#include <dev/ofw/ofw_bus_subr.h>
62
63#include <dev/usb/usb.h>
64#include <dev/usb/usbdi.h>
65
66#include <dev/usb/usb_core.h>
67#include <dev/usb/usb_busdma.h>
68#include <dev/usb/usb_process.h>
69#include <dev/usb/usb_util.h>
70
71#include <dev/usb/usb_controller.h>
72#include <dev/usb/usb_bus.h>
73#include <dev/usb/controller/ehci.h>
74#include <dev/usb/controller/ehcireg.h>
75
76#if !defined(__aarch64__)
77#include <arm/mv/mvreg.h>
78#endif
79#include <arm/mv/mvvar.h>
80
81#define	EHCI_VENDORID_MRVL	0x1286
82#define	EHCI_HC_DEVSTR		"Marvell Integrated USB 2.0 controller"
83
84static device_attach_t mv_ehci_attach;
85static device_detach_t mv_ehci_detach;
86
87static int err_intr(void *arg);
88
89static struct resource *irq_err;
90static void *ih_err;
91
92/* EHCI HC regs start at this offset within USB range */
93#define	MV_USB_HOST_OFST	0x0100
94
95#define	USB_BRIDGE_INTR_CAUSE	0x210
96#define	USB_BRIDGE_INTR_MASK	0x214
97#define	USB_BRIDGE_ERR_ADDR	0x21C
98
99#define	MV_USB_ADDR_DECODE_ERR (1 << 0)
100#define	MV_USB_HOST_UNDERFLOW  (1 << 1)
101#define	MV_USB_HOST_OVERFLOW   (1 << 2)
102#define	MV_USB_DEVICE_UNDERFLOW (1 << 3)
103
104enum mv_ehci_hwtype {
105	HWTYPE_NONE = 0,
106	HWTYPE_MV_EHCI_V1,
107	HWTYPE_MV_EHCI_V2,
108};
109
110static struct ofw_compat_data compat_data[] = {
111	{"mrvl,usb-ehci",		HWTYPE_MV_EHCI_V1},
112	{"marvell,orion-ehci",		HWTYPE_MV_EHCI_V2},
113	{"marvell,armada-3700-ehci",	HWTYPE_MV_EHCI_V2},
114	{NULL,				HWTYPE_NONE}
115};
116
117static void
118mv_ehci_post_reset(struct ehci_softc *ehci_softc)
119{
120	uint32_t usbmode;
121
122	/* Force HOST mode */
123	usbmode = EOREAD4(ehci_softc, EHCI_USBMODE_NOLPM);
124	usbmode &= ~EHCI_UM_CM;
125	usbmode |= EHCI_UM_CM_HOST;
126	EOWRITE4(ehci_softc, EHCI_USBMODE_NOLPM, usbmode);
127}
128
129static int
130mv_ehci_probe(device_t self)
131{
132
133	if (!ofw_bus_status_okay(self))
134		return (ENXIO);
135
136	if (!ofw_bus_search_compatible(self, compat_data)->ocd_data)
137		return (ENXIO);
138
139	device_set_desc(self, EHCI_HC_DEVSTR);
140
141	return (BUS_PROBE_DEFAULT);
142}
143
144static int
145mv_ehci_attach(device_t self)
146{
147	ehci_softc_t *sc = device_get_softc(self);
148	enum mv_ehci_hwtype hwtype;
149	bus_space_handle_t bsh;
150	int err;
151	int rid;
152
153	/* initialise some bus fields */
154	sc->sc_bus.parent = self;
155	sc->sc_bus.devices = sc->sc_devices;
156	sc->sc_bus.devices_max = EHCI_MAX_DEVICES;
157	sc->sc_bus.dma_bits = 32;
158
159	hwtype = ofw_bus_search_compatible(self, compat_data)->ocd_data;
160	if (hwtype == HWTYPE_NONE) {
161		device_printf(self, "Wrong HW type flag detected\n");
162		return (ENXIO);
163	}
164
165	/* get all DMA memory */
166	if (usb_bus_mem_alloc_all(&sc->sc_bus,
167	    USB_GET_DMA_TAG(self), &ehci_iterate_hw_softc)) {
168		return (ENOMEM);
169	}
170
171	rid = 0;
172	sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, RF_ACTIVE);
173	if (!sc->sc_io_res) {
174		device_printf(self, "Could not map memory\n");
175		goto error;
176	}
177	sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
178	bsh = rman_get_bushandle(sc->sc_io_res);
179	sc->sc_io_size = rman_get_size(sc->sc_io_res) - MV_USB_HOST_OFST;
180
181	/*
182	 * Marvell EHCI host controller registers start at certain offset
183	 * within the whole USB registers range, so create a subregion for the
184	 * host mode configuration purposes.
185	 */
186
187	if (bus_space_subregion(sc->sc_io_tag, bsh, MV_USB_HOST_OFST,
188	    sc->sc_io_size, &sc->sc_io_hdl) != 0)
189		panic("%s: unable to subregion USB host registers",
190		    device_get_name(self));
191
192	rid = 0;
193	if (hwtype == HWTYPE_MV_EHCI_V1) {
194		irq_err = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
195		    RF_SHAREABLE | RF_ACTIVE);
196		if (irq_err == NULL) {
197			device_printf(self, "Could not allocate error irq\n");
198			mv_ehci_detach(self);
199			return (ENXIO);
200		}
201		rid = 1;
202	}
203
204	/*
205	 * Notice: Marvell EHCI controller has TWO interrupt lines, so make
206	 * sure to use the correct rid for the main one (controller interrupt)
207	 * -- refer to DTS for the right resource number to use here.
208	 */
209	sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
210	    RF_SHAREABLE | RF_ACTIVE);
211	if (sc->sc_irq_res == NULL) {
212		device_printf(self, "Could not allocate irq\n");
213		goto error;
214	}
215
216	sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
217	if (!sc->sc_bus.bdev) {
218		device_printf(self, "Could not add USB device\n");
219		goto error;
220	}
221	device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
222	device_set_desc(sc->sc_bus.bdev, EHCI_HC_DEVSTR);
223
224	sprintf(sc->sc_vendor, "Marvell");
225
226	if (hwtype == HWTYPE_MV_EHCI_V1) {
227		err = bus_setup_intr(self, irq_err, INTR_TYPE_BIO,
228		    err_intr, NULL, sc, &ih_err);
229		if (err) {
230			device_printf(self, "Could not setup error irq, %d\n", err);
231			ih_err = NULL;
232			goto error;
233		}
234	}
235
236	EWRITE4(sc, USB_BRIDGE_INTR_MASK, MV_USB_ADDR_DECODE_ERR |
237	    MV_USB_HOST_UNDERFLOW | MV_USB_HOST_OVERFLOW |
238	    MV_USB_DEVICE_UNDERFLOW);
239
240	err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
241	    NULL, (driver_intr_t *)ehci_interrupt, sc, &sc->sc_intr_hdl);
242	if (err) {
243		device_printf(self, "Could not setup irq, %d\n", err);
244		sc->sc_intr_hdl = NULL;
245		goto error;
246	}
247
248	/*
249	 * Workaround for Marvell integrated EHCI controller: reset of
250	 * the EHCI core clears the USBMODE register, which sets the core in
251	 * an undefined state (neither host nor agent), so it needs to be set
252	 * again for proper operation.
253	 *
254	 * Refer to errata document MV-S500832-00D.pdf (p. 5.24 GL USB-2) for
255	 * details.
256	 */
257	sc->sc_vendor_post_reset = mv_ehci_post_reset;
258	if (bootverbose)
259		device_printf(self, "5.24 GL USB-2 workaround enabled\n");
260
261	/* XXX all MV chips need it? */
262	sc->sc_flags |= EHCI_SCFLG_TT | EHCI_SCFLG_NORESTERM;
263	sc->sc_vendor_get_port_speed = ehci_get_port_speed_portsc;
264	err = ehci_init(sc);
265	if (!err) {
266		err = device_probe_and_attach(sc->sc_bus.bdev);
267	}
268	if (err) {
269		device_printf(self, "USB init failed err=%d\n", err);
270		goto error;
271	}
272	return (0);
273
274error:
275	mv_ehci_detach(self);
276	return (ENXIO);
277}
278
279static int
280mv_ehci_detach(device_t self)
281{
282	ehci_softc_t *sc = device_get_softc(self);
283	int err;
284
285	/* during module unload there are lots of children leftover */
286	device_delete_children(self);
287
288	/*
289	 * disable interrupts that might have been switched on in mv_ehci_attach
290	 */
291	if (sc->sc_io_res) {
292		EWRITE4(sc, USB_BRIDGE_INTR_MASK, 0);
293	}
294	if (sc->sc_irq_res && sc->sc_intr_hdl) {
295		/*
296		 * only call ehci_detach() after ehci_init()
297		 */
298		ehci_detach(sc);
299
300		err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
301
302		if (err)
303			/* XXX or should we panic? */
304			device_printf(self, "Could not tear down irq, %d\n",
305			    err);
306		sc->sc_intr_hdl = NULL;
307	}
308	if (irq_err && ih_err) {
309		err = bus_teardown_intr(self, irq_err, ih_err);
310
311		if (err)
312			device_printf(self, "Could not tear down irq, %d\n",
313			    err);
314		ih_err = NULL;
315	}
316	if (irq_err) {
317		bus_release_resource(self, SYS_RES_IRQ, 0, irq_err);
318		irq_err = NULL;
319	}
320	if (sc->sc_irq_res) {
321		bus_release_resource(self, SYS_RES_IRQ, 1, sc->sc_irq_res);
322		sc->sc_irq_res = NULL;
323	}
324	if (sc->sc_io_res) {
325		bus_release_resource(self, SYS_RES_MEMORY, 0,
326		    sc->sc_io_res);
327		sc->sc_io_res = NULL;
328	}
329	usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc);
330
331	return (0);
332}
333
334static int
335err_intr(void *arg)
336{
337	ehci_softc_t *sc = arg;
338	unsigned cause;
339
340	cause = EREAD4(sc, USB_BRIDGE_INTR_CAUSE);
341	if (cause) {
342		printf("USB error: ");
343		if (cause & MV_USB_ADDR_DECODE_ERR) {
344			uint32_t addr;
345
346			addr = EREAD4(sc, USB_BRIDGE_ERR_ADDR);
347			printf("address decoding error (addr=%#x)\n", addr);
348		}
349		if (cause & MV_USB_HOST_UNDERFLOW)
350			printf("host underflow\n");
351		if (cause & MV_USB_HOST_OVERFLOW)
352			printf("host overflow\n");
353		if (cause & MV_USB_DEVICE_UNDERFLOW)
354			printf("device underflow\n");
355		if (cause & ~(MV_USB_ADDR_DECODE_ERR | MV_USB_HOST_UNDERFLOW |
356		    MV_USB_HOST_OVERFLOW | MV_USB_DEVICE_UNDERFLOW))
357			printf("unknown cause (cause=%#x)\n", cause);
358
359		EWRITE4(sc, USB_BRIDGE_INTR_CAUSE, 0);
360	}
361	return (FILTER_HANDLED);
362}
363
364static device_method_t ehci_methods[] = {
365	/* Device interface */
366	DEVMETHOD(device_probe, mv_ehci_probe),
367	DEVMETHOD(device_attach, mv_ehci_attach),
368	DEVMETHOD(device_detach, mv_ehci_detach),
369	DEVMETHOD(device_suspend, bus_generic_suspend),
370	DEVMETHOD(device_resume, bus_generic_resume),
371	DEVMETHOD(device_shutdown, bus_generic_shutdown),
372
373	DEVMETHOD_END
374};
375
376static driver_t ehci_driver = {
377	"ehci",
378	ehci_methods,
379	sizeof(ehci_softc_t),
380};
381
382DRIVER_MODULE(ehci_mv, simplebus, ehci_driver, 0, 0);
383MODULE_DEPEND(ehci_mv, usb, 1, 1, 1);
384