1/*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 1999 Cameron Grant <cg@freebsd.org> 5 * Copyright (c) 2003-2007 Yuriy Tsibizov <yuriy.tsibizov@gfk.ru> 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30#include <sys/param.h> 31#include <sys/types.h> 32#include <sys/bus.h> 33#include <machine/bus.h> 34#include <sys/rman.h> 35#include <sys/systm.h> 36#include <sys/sbuf.h> 37#include <sys/queue.h> 38#include <sys/lock.h> 39#include <sys/mutex.h> 40#include <sys/sysctl.h> 41#include <sys/kdb.h> 42 43#include <dev/pci/pcireg.h> 44#include <dev/pci/pcivar.h> 45 46#include <machine/clock.h> /* for DELAY */ 47 48#ifdef HAVE_KERNEL_OPTION_HEADERS 49#include "opt_snd.h" 50#endif 51 52#include <dev/sound/pcm/sound.h> 53#include <dev/sound/pcm/ac97.h> 54 55#include <dev/sound/pci/emuxkireg.h> 56#include <dev/sound/pci/emu10kx.h> 57 58/* hw flags */ 59#define HAS_51 0x0001 60#define HAS_71 0x0002 61#define HAS_AC97 0x0004 62 63#define IS_EMU10K1 0x0008 64#define IS_EMU10K2 0x0010 65#define IS_CA0102 0x0020 66#define IS_CA0108 0x0040 67#define IS_UNKNOWN 0x0080 68 69#define BROKEN_DIGITAL 0x0100 70#define DIGITAL_ONLY 0x0200 71 72#define IS_CARDBUS 0x0400 73 74#define MODE_ANALOG 1 75#define MODE_DIGITAL 2 76#define SPDIF_MODE_PCM 1 77#define SPDIF_MODE_AC3 2 78 79#define MACS 0x0 80#define MACS1 0x1 81#define MACW 0x2 82#define MACW1 0x3 83#define MACINTS 0x4 84#define MACINTW 0x5 85#define ACC3 0x6 86#define MACMV 0x7 87#define ANDXOR 0x8 88#define TSTNEG 0x9 89#define LIMIT 0xA 90#define LIMIT1 0xB 91#define LOG 0xC 92#define EXP 0xD 93#define INTERP 0xE 94#define SKIP 0xF 95 96#define GPR(i) (sc->gpr_base+(i)) 97#define INP(i) (sc->input_base+(i)) 98#define OUTP(i) (sc->output_base+(i)) 99#define FX(i) (i) 100#define FX2(i) (sc->efxc_base+(i)) 101#define DSP_CONST(i) (sc->dsp_zero+(i)) 102 103#define COND_NORMALIZED DSP_CONST(0x1) 104#define COND_BORROW DSP_CONST(0x2) 105#define COND_MINUS DSP_CONST(0x3) 106#define COND_LESS_ZERO DSP_CONST(0x4) 107#define COND_EQ_ZERO DSP_CONST(0x5) 108#define COND_SATURATION DSP_CONST(0x6) 109#define COND_NEQ_ZERO DSP_CONST(0x8) 110 111#define DSP_ACCUM DSP_CONST(0x16) 112#define DSP_CCR DSP_CONST(0x17) 113 114/* Live! Inputs */ 115#define IN_AC97_L 0x00 116#define IN_AC97_R 0x01 117#define IN_AC97 IN_AC97_L 118#define IN_SPDIF_CD_L 0x02 119#define IN_SPDIF_CD_R 0x03 120#define IN_SPDIF_CD IN_SPDIF_CD_L 121#define IN_ZOOM_L 0x04 122#define IN_ZOOM_R 0x05 123#define IN_ZOOM IN_ZOOM_L 124#define IN_TOSLINK_L 0x06 125#define IN_TOSLINK_R 0x07 126#define IN_TOSLINK IN_TOSLINK_L 127#define IN_LINE1_L 0x08 128#define IN_LINE1_R 0x09 129#define IN_LINE1 IN_LINE1_L 130#define IN_COAX_SPDIF_L 0x0a 131#define IN_COAX_SPDIF_R 0x0b 132#define IN_COAX_SPDIF IN_COAX_SPDIF_L 133#define IN_LINE2_L 0x0c 134#define IN_LINE2_R 0x0d 135#define IN_LINE2 IN_LINE2_L 136#define IN_0E 0x0e 137#define IN_0F 0x0f 138 139/* Outputs */ 140#define OUT_AC97_L 0x00 141#define OUT_AC97_R 0x01 142#define OUT_AC97 OUT_AC97_L 143#define OUT_A_FRONT OUT_AC97 144#define OUT_TOSLINK_L 0x02 145#define OUT_TOSLINK_R 0x03 146#define OUT_TOSLINK OUT_TOSLINK_L 147#define OUT_D_CENTER 0x04 148#define OUT_D_SUB 0x05 149#define OUT_HEADPHONE_L 0x06 150#define OUT_HEADPHONE_R 0x07 151#define OUT_HEADPHONE OUT_HEADPHONE_L 152#define OUT_REAR_L 0x08 153#define OUT_REAR_R 0x09 154#define OUT_REAR OUT_REAR_L 155#define OUT_ADC_REC_L 0x0a 156#define OUT_ADC_REC_R 0x0b 157#define OUT_ADC_REC OUT_ADC_REC_L 158#define OUT_MIC_CAP 0x0c 159 160/* Live! 5.1 Digital, non-standard 5.1 (center & sub) outputs */ 161#define OUT_A_CENTER 0x11 162#define OUT_A_SUB 0x12 163 164/* Audigy Inputs */ 165#define A_IN_AC97_L 0x00 166#define A_IN_AC97_R 0x01 167#define A_IN_AC97 A_IN_AC97_L 168#define A_IN_SPDIF_CD_L 0x02 169#define A_IN_SPDIF_CD_R 0x03 170#define A_IN_SPDIF_CD A_IN_SPDIF_CD_L 171#define A_IN_O_SPDIF_L 0x04 172#define A_IN_O_SPDIF_R 0x05 173#define A_IN_O_SPDIF A_IN_O_SPDIF_L 174#define A_IN_LINE2_L 0x08 175#define A_IN_LINE2_R 0x09 176#define A_IN_LINE2 A_IN_LINE2_L 177#define A_IN_R_SPDIF_L 0x0a 178#define A_IN_R_SPDIF_R 0x0b 179#define A_IN_R_SPDIF A_IN_R_SPDIF_L 180#define A_IN_AUX2_L 0x0c 181#define A_IN_AUX2_R 0x0d 182#define A_IN_AUX2 A_IN_AUX2_L 183 184/* Audigy Outputs */ 185#define A_OUT_D_FRONT_L 0x00 186#define A_OUT_D_FRONT_R 0x01 187#define A_OUT_D_FRONT A_OUT_D_FRONT_L 188#define A_OUT_D_CENTER 0x02 189#define A_OUT_D_SUB 0x03 190#define A_OUT_D_SIDE_L 0x04 191#define A_OUT_D_SIDE_R 0x05 192#define A_OUT_D_SIDE A_OUT_D_SIDE_L 193#define A_OUT_D_REAR_L 0x06 194#define A_OUT_D_REAR_R 0x07 195#define A_OUT_D_REAR A_OUT_D_REAR_L 196 197/* on Audigy Platinum only */ 198#define A_OUT_HPHONE_L 0x04 199#define A_OUT_HPHONE_R 0x05 200#define A_OUT_HPHONE A_OUT_HPHONE_L 201 202#define A_OUT_A_FRONT_L 0x08 203#define A_OUT_A_FRONT_R 0x09 204#define A_OUT_A_FRONT A_OUT_A_FRONT_L 205#define A_OUT_A_CENTER 0x0a 206#define A_OUT_A_SUB 0x0b 207#define A_OUT_A_SIDE_L 0x0c 208#define A_OUT_A_SIDE_R 0x0d 209#define A_OUT_A_SIDE A_OUT_A_SIDE_L 210#define A_OUT_A_REAR_L 0x0e 211#define A_OUT_A_REAR_R 0x0f 212#define A_OUT_A_REAR A_OUT_A_REAR_L 213#define A_OUT_AC97_L 0x10 214#define A_OUT_AC97_R 0x11 215#define A_OUT_AC97 A_OUT_AC97_L 216#define A_OUT_ADC_REC_L 0x16 217#define A_OUT_ADC_REC_R 0x17 218#define A_OUT_ADC_REC A_OUT_ADC_REC_L 219 220#define EMU_DATA2 0x24 221#define EMU_IPR2 0x28 222#define EMU_INTE2 0x2c 223#define EMU_IPR3 0x38 224#define EMU_INTE3 0x3c 225 226#define EMU_A2_SRCSel 0x60 227#define EMU_A2_SRCMULTI_ENABLE 0x6e 228 229#define EMU_A_I2S_CAPTURE_96000 0x00000400 230 231#define EMU_A2_MIXER_I2S_ENABLE 0x7B 232#define EMU_A2_MIXER_SPDIF_ENABLE 0x7A 233 234#define C_FRONT_L 0 235#define C_FRONT_R 1 236#define C_REC_L 2 237#define C_REC_R 3 238#define C_REAR_L 4 239#define C_REAR_R 5 240#define C_CENTER 6 241#define C_SUB 7 242#define C_SIDE_L 8 243#define C_SIDE_R 9 244#define NUM_CACHES 10 245 246#define CDSPDIFMUTE 0 247#define ANALOGMUTE 1 248#define NUM_MUTE 2 249 250#define EMU_MAX_GPR 512 251#define EMU_MAX_IRQ_CONSUMERS 32 252 253struct emu_voice { 254 int vnum; 255 unsigned int b16:1, stereo:1, busy:1, running:1, ismaster:1; 256 int speed; 257 int start; 258 int end; 259 int vol; 260 uint32_t buf; 261 void *vbuf; 262 struct emu_voice *slave; 263 uint32_t sa; 264 uint32_t ea; 265 uint32_t routing[8]; 266 uint32_t amounts[8]; 267}; 268 269struct emu_memblk { 270 SLIST_ENTRY(emu_memblk) link; 271 void *buf; 272 char owner[16]; 273 bus_addr_t buf_addr; 274 uint32_t pte_start, pte_size; 275 bus_dmamap_t buf_map; 276}; 277 278struct emu_mem { 279 uint8_t bmap[EMU_MAXPAGES / 8]; 280 uint32_t *ptb_pages; 281 void *silent_page; 282 bus_addr_t ptb_pages_addr; 283 bus_addr_t silent_page_addr; 284 bus_dmamap_t ptb_map; 285 bus_dmamap_t silent_map; 286 bus_dma_tag_t dmat; 287 struct emu_sc_info *card; 288 SLIST_HEAD(, emu_memblk) blocks; 289}; 290 291/* rm */ 292struct emu_rm { 293 struct emu_sc_info *card; 294 struct mtx gpr_lock; 295 signed int allocmap[EMU_MAX_GPR]; 296 int num_gprs; 297 int last_free_gpr; 298 int num_used; 299}; 300 301struct emu_intr_handler { 302 void* softc; 303 uint32_t intr_mask; 304 uint32_t inte_mask; 305 uint32_t(*irq_func) (void *softc, uint32_t irq); 306}; 307 308struct emu_sc_info { 309 struct mtx lock; 310 struct mtx rw; /* Hardware exclusive access lock */ 311 312 /* Hardware and subdevices */ 313 device_t dev; 314 device_t pcm[RT_COUNT]; 315 device_t midi[2]; 316 uint32_t type; 317 uint32_t rev; 318 319 bus_space_tag_t st; 320 bus_space_handle_t sh; 321 322 struct cdev *cdev; /* /dev/emu10k character device */ 323 struct mtx emu10kx_lock; 324 int emu10kx_isopen; 325 struct sbuf emu10kx_sbuf; 326 int emu10kx_bufptr; 327 328 /* Resources */ 329 struct resource *reg; 330 struct resource *irq; 331 void *ih; 332 333 /* IRQ handlers */ 334 struct emu_intr_handler ihandler[EMU_MAX_IRQ_CONSUMERS]; 335 336 /* Card HW configuration */ 337 unsigned int mode; /* analog / digital */ 338 unsigned int mchannel_fx; 339 unsigned int dsp_zero; 340 unsigned int code_base; 341 unsigned int code_size; 342 unsigned int gpr_base; 343 unsigned int num_gprs; 344 unsigned int input_base; 345 unsigned int output_base; 346 unsigned int efxc_base; 347 unsigned int opcode_shift; 348 unsigned int high_operand_shift; 349 unsigned int address_mask; 350 uint32_t is_emu10k1:1, is_emu10k2, is_ca0102, is_ca0108:1, 351 has_ac97:1, has_51:1, has_71:1, 352 enable_ir:1, 353 broken_digital:1, is_cardbus:1; 354 355 signed int mch_disabled, mch_rec, dbg_level; 356 signed int num_inputs; 357 unsigned int num_outputs; 358 unsigned int num_fxbuses; 359 unsigned int routing_code_start; 360 unsigned int routing_code_end; 361 362 /* HW resources */ 363 struct emu_voice voice[NUM_G]; /* Hardware voices */ 364 uint32_t irq_mask[EMU_MAX_IRQ_CONSUMERS]; /* IRQ manager data */ 365 int timer[EMU_MAX_IRQ_CONSUMERS]; /* timer */ 366 int timerinterval; 367 struct emu_rm *rm; 368 struct emu_mem mem; /* memory */ 369 370 /* Mixer */ 371 int mixer_gpr[NUM_MIXERS]; 372 int mixer_volcache[NUM_MIXERS]; 373 int cache_gpr[NUM_CACHES]; 374 int dummy_gpr; 375 int mute_gpr[NUM_MUTE]; 376 struct sysctl_ctx_list *ctx; 377 struct sysctl_oid *root; 378}; 379 380static void emu_setmap(void *arg, bus_dma_segment_t * segs, int nseg, int error); 381static void* emu_malloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr, bus_dmamap_t *map); 382static void emu_free(struct emu_mem *mem, void *dmabuf, bus_dmamap_t map); 383static void* emu_memalloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr, const char * owner); 384static int emu_memfree(struct emu_mem *mem, void *membuf); 385static int emu_memstart(struct emu_mem *mem, void *membuf); 386 387/* /dev */ 388static int emu10kx_dev_init(struct emu_sc_info *sc); 389static int emu10kx_dev_uninit(struct emu_sc_info *sc); 390static int emu10kx_prepare(struct emu_sc_info *sc, struct sbuf *s); 391 392static void emumix_set_mode(struct emu_sc_info *sc, int mode); 393static void emumix_set_spdif_mode(struct emu_sc_info *sc, int mode); 394static void emumix_set_fxvol(struct emu_sc_info *sc, unsigned gpr, int32_t vol); 395static void emumix_set_gpr(struct emu_sc_info *sc, unsigned gpr, int32_t val); 396static int sysctl_emu_mixer_control(SYSCTL_HANDLER_ARGS); 397 398static int emu_rm_init(struct emu_sc_info *sc); 399static int emu_rm_uninit(struct emu_sc_info *sc); 400static int emu_rm_gpr_alloc(struct emu_rm *rm, int count); 401 402static unsigned int emu_getcard(device_t dev); 403static uint32_t emu_rd_nolock(struct emu_sc_info *sc, unsigned int regno, unsigned int size); 404static void emu_wr_nolock(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size); 405static void emu_wr_cbptr(struct emu_sc_info *sc, uint32_t data); 406 407static void emu_vstop(struct emu_sc_info *sc, char channel, int enable); 408 409static void emu_intr(void *p); 410static void emu_wrefx(struct emu_sc_info *sc, unsigned int pc, unsigned int data); 411static void emu_addefxop(struct emu_sc_info *sc, unsigned int op, unsigned int z, unsigned int w, unsigned int x, unsigned int y, uint32_t * pc); 412static void emu_initefx(struct emu_sc_info *sc); 413 414static int emu_cardbus_init(struct emu_sc_info *sc); 415static int emu_init(struct emu_sc_info *sc); 416static int emu_uninit(struct emu_sc_info *sc); 417 418static int emu_read_ivar(device_t bus __unused, device_t dev, int ivar_index, uintptr_t * result); 419static int emu_write_ivar(device_t bus __unused, device_t dev __unused, 420 int ivar_index, uintptr_t value __unused); 421 422static int emu_pci_probe(device_t dev); 423static int emu_pci_attach(device_t dev); 424static int emu_pci_detach(device_t dev); 425static int emu_modevent(module_t mod __unused, int cmd, void *data __unused); 426 427#ifdef SND_EMU10KX_DEBUG 428 429#define EMU_MTX_DEBUG() do { \ 430 if (mtx_owned(&sc->rw)) { \ 431 printf("RW owned in %s line %d for %s\n", __func__, \ 432 __LINE__ , device_get_nameunit(sc->dev)); \ 433 printf("rw lock owned: %d\n", mtx_owned(&sc->rw)); \ 434 printf("rw lock: value %x thread %x\n", \ 435 ((&sc->rw)->mtx_lock & ~MTX_FLAGMASK), \ 436 (uintptr_t)curthread); \ 437 printf("rw lock: recursed %d\n", mtx_recursed(&sc->rw));\ 438 db_show_mtx(&sc->rw); \ 439 } \ 440 } while (0) 441#else 442#define EMU_MTX_DEBUG() do { \ 443 } while (0) 444#endif 445 446#define EMU_RWLOCK() do { \ 447 EMU_MTX_DEBUG(); \ 448 mtx_lock(&(sc->rw)); \ 449 } while (0) 450 451#define EMU_RWUNLOCK() do { \ 452 mtx_unlock(&(sc->rw)); \ 453 EMU_MTX_DEBUG(); \ 454 } while (0) 455 456/* Supported cards */ 457struct emu_hwinfo { 458 uint16_t vendor; 459 uint16_t device; 460 uint16_t subvendor; 461 uint16_t subdevice; 462 char SBcode[8]; 463 char desc[32]; 464 int flags; 465}; 466 467static struct emu_hwinfo emu_cards[] = { 468 {0xffff, 0xffff, 0xffff, 0xffff, "BADCRD", "Not a compatible card", 0}, 469 /* 0x0020..0x002f 4.0 EMU10K1 cards */ 470 {0x1102, 0x0002, 0x1102, 0x0020, "CT4850", "SBLive! Value", HAS_AC97 | IS_EMU10K1}, 471 {0x1102, 0x0002, 0x1102, 0x0021, "CT4620", "SBLive!", HAS_AC97 | IS_EMU10K1}, 472 {0x1102, 0x0002, 0x1102, 0x002f, "CT????", "SBLive! mainboard implementation", HAS_AC97 | IS_EMU10K1}, 473 474 /* (range unknown) 5.1 EMU10K1 cards */ 475 {0x1102, 0x0002, 0x1102, 0x100a, "CT????", "SBLive! 5.1", HAS_AC97 | HAS_51 | IS_EMU10K1}, 476 477 /* 0x80??..0x805? 4.0 EMU10K1 cards */ 478 {0x1102, 0x0002, 0x1102, 0x8022, "CT4780", "SBLive! Value", HAS_AC97 | IS_EMU10K1}, 479 {0x1102, 0x0002, 0x1102, 0x8023, "CT4790", "SB PCI512", HAS_AC97 | IS_EMU10K1}, 480 {0x1102, 0x0002, 0x1102, 0x8024, "CT4760", "SBLive!", HAS_AC97 | IS_EMU10K1}, 481 {0x1102, 0x0002, 0x1102, 0x8025, "CT????", "SBLive! Mainboard Implementation", HAS_AC97 | IS_EMU10K1}, 482 {0x1102, 0x0002, 0x1102, 0x8026, "CT4830", "SBLive! Value", HAS_AC97 | IS_EMU10K1}, 483 {0x1102, 0x0002, 0x1102, 0x8027, "CT4832", "SBLive! Value", HAS_AC97 | IS_EMU10K1}, 484 {0x1102, 0x0002, 0x1102, 0x8028, "CT4760", "SBLive! OEM version", HAS_AC97 | IS_EMU10K1}, 485 {0x1102, 0x0002, 0x1102, 0x8031, "CT4831", "SBLive! Value", HAS_AC97 | IS_EMU10K1}, 486 {0x1102, 0x0002, 0x1102, 0x8040, "CT4760", "SBLive!", HAS_AC97 | IS_EMU10K1}, 487 {0x1102, 0x0002, 0x1102, 0x8051, "CT4850", "SBLive! Value", HAS_AC97 | IS_EMU10K1}, 488 489 /* 0x8061..0x???? 5.1 EMU10K1 cards */ 490 {0x1102, 0x0002, 0x1102, 0x8061, "SB????", "SBLive! Player 5.1", HAS_AC97 | HAS_51 | IS_EMU10K1}, 491 {0x1102, 0x0002, 0x1102, 0x8062, "CT4830", "SBLive! 1024", HAS_AC97 | HAS_51 | IS_EMU10K1}, 492 {0x1102, 0x0002, 0x1102, 0x8064, "SB????", "SBLive! 5.1", HAS_AC97 | HAS_51 | IS_EMU10K1}, 493 {0x1102, 0x0002, 0x1102, 0x8065, "SB0220", "SBLive! 5.1 Digital", HAS_AC97 | HAS_51 | IS_EMU10K1}, 494 {0x1102, 0x0002, 0x1102, 0x8066, "CT4780", "SBLive! 5.1 Digital", HAS_AC97 | HAS_51 | IS_EMU10K1}, 495 {0x1102, 0x0002, 0x1102, 0x8067, "SB????", "SBLive!", HAS_AC97 | HAS_51 | IS_EMU10K1}, 496 497 /* Generic SB Live! */ 498 {0x1102, 0x0002, 0x1102, 0x0000, "SB????", "SBLive! (Unknown model)", HAS_AC97 | IS_EMU10K1}, 499 500 /* 0x0041..0x0043 EMU10K2 (some kind of Audigy) cards */ 501 502 /* 0x0051..0x0051 5.1 CA0100-IAF cards */ 503 {0x1102, 0x0004, 0x1102, 0x0051, "SB0090", "Audigy", HAS_AC97 | HAS_51 | IS_EMU10K2}, 504 /* ES is CA0100-IDF chip that don't work in digital mode */ 505 {0x1102, 0x0004, 0x1102, 0x0052, "SB0160", "Audigy ES", HAS_AC97 | HAS_71 | IS_EMU10K2 | BROKEN_DIGITAL}, 506 /* 0x0053..0x005C 5.1 CA0101-NAF cards */ 507 {0x1102, 0x0004, 0x1102, 0x0053, "SB0090", "Audigy Player/OEM", HAS_AC97 | HAS_51 | IS_EMU10K2}, 508 {0x1102, 0x0004, 0x1102, 0x0058, "SB0090", "Audigy Player/OEM", HAS_AC97 | HAS_51 | IS_EMU10K2}, 509 510 /* 0x1002..0x1009 5.1 CA0102-IAT cards */ 511 {0x1102, 0x0004, 0x1102, 0x1002, "SB????", "Audigy 2 Platinum", HAS_51 | IS_CA0102}, 512 {0x1102, 0x0004, 0x1102, 0x1005, "SB????", "Audigy 2 Platinum EX", HAS_51 | IS_CA0102}, 513 {0x1102, 0x0004, 0x1102, 0x1007, "SB0240", "Audigy 2", HAS_AC97 | HAS_51 | IS_CA0102}, 514 515 /* 0x2001..0x2003 7.1 CA0102-ICT cards */ 516 {0x1102, 0x0004, 0x1102, 0x2001, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102}, 517 {0x1102, 0x0004, 0x1102, 0x2002, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102}, 518 /* XXX No reports about 0x2003 & 0x2004 cards */ 519 {0x1102, 0x0004, 0x1102, 0x2003, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102}, 520 {0x1102, 0x0004, 0x1102, 0x2004, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102}, 521 {0x1102, 0x0004, 0x1102, 0x2005, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102}, 522 523 /* (range unknown) 7.1 CA0102-xxx Audigy 4 cards */ 524 {0x1102, 0x0004, 0x1102, 0x2007, "SB0380", "Audigy 4 Pro", HAS_AC97 | HAS_71 | IS_CA0102}, 525 526 /* Generic Audigy or Audigy 2 */ 527 {0x1102, 0x0004, 0x1102, 0x0000, "SB????", "Audigy (Unknown model)", HAS_AC97 | HAS_51 | IS_EMU10K2}, 528 529 /* We don't support CA0103-DAT (Audigy LS) cards */ 530 /* There is NO CA0104-xxx cards */ 531 /* There is NO CA0105-xxx cards */ 532 /* We don't support CA0106-DAT (SB Live! 24 bit) cards */ 533 /* There is NO CA0107-xxx cards */ 534 535 /* 0x1000..0x1001 7.1 CA0108-IAT cards */ 536 {0x1102, 0x0008, 0x1102, 0x1000, "SB????", "Audigy 2 LS", HAS_AC97 | HAS_51 | IS_CA0108 | DIGITAL_ONLY}, 537 {0x1102, 0x0008, 0x1102, 0x1001, "SB0400", "Audigy 2 Value", HAS_AC97 | HAS_71 | IS_CA0108 | DIGITAL_ONLY}, 538 {0x1102, 0x0008, 0x1102, 0x1021, "SB0610", "Audigy 4", HAS_AC97 | HAS_71 | IS_CA0108 | DIGITAL_ONLY}, 539 540 {0x1102, 0x0008, 0x1102, 0x2001, "SB0530", "Audigy 2 ZS CardBus", HAS_AC97 | HAS_71 | IS_CA0108 | IS_CARDBUS}, 541 542 {0x1102, 0x0008, 0x0000, 0x0000, "SB????", "Audigy 2 Value (Unknown model)", HAS_AC97 | HAS_51 | IS_CA0108}, 543}; 544/* Unsupported cards */ 545 546static struct emu_hwinfo emu_bad_cards[] = { 547 /* APS cards should be possible to support */ 548 {0x1102, 0x0002, 0x1102, 0x4001, "EMUAPS", "E-mu APS", 0}, 549 {0x1102, 0x0002, 0x1102, 0x4002, "EMUAPS", "E-mu APS", 0}, 550 {0x1102, 0x0004, 0x1102, 0x4001, "EMU???", "E-mu 1212m [4001]", 0}, 551 /* Similar-named ("Live!" or "Audigy") cards on different chipsets */ 552 {0x1102, 0x8064, 0x0000, 0x0000, "SB0100", "SBLive! 5.1 OEM", 0}, 553 {0x1102, 0x0006, 0x0000, 0x0000, "SB0200", "DELL OEM SBLive! Value", 0}, 554 {0x1102, 0x0007, 0x0000, 0x0000, "SB0310", "Audigy LS", 0}, 555}; 556 557/* 558 * Get best known information about device. 559 */ 560static unsigned int 561emu_getcard(device_t dev) 562{ 563 uint16_t device; 564 uint16_t subdevice; 565 unsigned int thiscard; 566 int i; 567 568 device = pci_read_config(dev, PCIR_DEVICE, /* bytes */ 2); 569 subdevice = pci_read_config(dev, PCIR_SUBDEV_0, /* bytes */ 2); 570 571 thiscard = 0; 572 for (i = 1; i < nitems(emu_cards); i++) { 573 if (device == emu_cards[i].device) { 574 if (subdevice == emu_cards[i].subdevice) { 575 thiscard = i; 576 break; 577 } 578 if (0x0000 == emu_cards[i].subdevice) { 579 thiscard = i; 580 /* 581 * don't break, we can get more specific card 582 * later in the list. 583 */ 584 } 585 } 586 } 587 588 for (i = 0; i < nitems(emu_bad_cards); i++) { 589 if (device == emu_bad_cards[i].device) { 590 if (subdevice == emu_bad_cards[i].subdevice) { 591 thiscard = 0; 592 break; 593 } 594 if (0x0000 == emu_bad_cards[i].subdevice) { 595 thiscard = 0; 596 break; /* we avoid all this cards */ 597 } 598 } 599 } 600 return (thiscard); 601} 602 603/* 604 * Base hardware interface are 32 (Audigy) or 64 (Audigy2) registers. 605 * Some of them are used directly, some of them provide pointer / data pairs. 606 */ 607static uint32_t 608emu_rd_nolock(struct emu_sc_info *sc, unsigned int regno, unsigned int size) 609{ 610 611 KASSERT(sc != NULL, ("emu_rd: NULL sc")); 612 switch (size) { 613 case 1: 614 return (bus_space_read_1(sc->st, sc->sh, regno)); 615 case 2: 616 return (bus_space_read_2(sc->st, sc->sh, regno)); 617 case 4: 618 return (bus_space_read_4(sc->st, sc->sh, regno)); 619 } 620 return (0xffffffff); 621} 622 623static void 624emu_wr_nolock(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size) 625{ 626 627 KASSERT(sc != NULL, ("emu_rd: NULL sc")); 628 switch (size) { 629 case 1: 630 bus_space_write_1(sc->st, sc->sh, regno, data); 631 break; 632 case 2: 633 bus_space_write_2(sc->st, sc->sh, regno, data); 634 break; 635 case 4: 636 bus_space_write_4(sc->st, sc->sh, regno, data); 637 break; 638 } 639} 640/* 641 * EMU_PTR / EMU_DATA interface. Access to EMU10Kx is made 642 * via (channel, register) pair. Some registers are channel-specific, 643 * some not. 644 */ 645uint32_t 646emu_rdptr(struct emu_sc_info *sc, unsigned int chn, unsigned int reg) 647{ 648 uint32_t ptr, val, mask, size, offset; 649 650 ptr = ((reg << 16) & sc->address_mask) | (chn & EMU_PTR_CHNO_MASK); 651 652 EMU_RWLOCK(); 653 emu_wr_nolock(sc, EMU_PTR, ptr, 4); 654 val = emu_rd_nolock(sc, EMU_DATA, 4); 655 EMU_RWUNLOCK(); 656 657 /* 658 * XXX Some register numbers has data size and offset encoded in 659 * it to get only part of 32bit register. This use is not described 660 * in register name, be careful! 661 */ 662 if (reg & 0xff000000) { 663 size = (reg >> 24) & 0x3f; 664 offset = (reg >> 16) & 0x1f; 665 mask = ((1 << size) - 1) << offset; 666 val &= mask; 667 val >>= offset; 668 } 669 return (val); 670} 671 672void 673emu_wrptr(struct emu_sc_info *sc, unsigned int chn, unsigned int reg, uint32_t data) 674{ 675 uint32_t ptr, mask, size, offset; 676 677 ptr = ((reg << 16) & sc->address_mask) | (chn & EMU_PTR_CHNO_MASK); 678 679 EMU_RWLOCK(); 680 emu_wr_nolock(sc, EMU_PTR, ptr, 4); 681 /* 682 * XXX Another kind of magic encoding in register number. This can 683 * give you side effect - it will read previous data from register 684 * and change only required bits. 685 */ 686 if (reg & 0xff000000) { 687 size = (reg >> 24) & 0x3f; 688 offset = (reg >> 16) & 0x1f; 689 mask = ((1 << size) - 1) << offset; 690 data <<= offset; 691 data &= mask; 692 data |= emu_rd_nolock(sc, EMU_DATA, 4) & ~mask; 693 } 694 emu_wr_nolock(sc, EMU_DATA, data, 4); 695 EMU_RWUNLOCK(); 696} 697/* 698 * EMU_A2_PTR / EMU_DATA2 interface. Access to P16v is made 699 * via (channel, register) pair. Some registers are channel-specific, 700 * some not. This interface is supported by CA0102 and CA0108 chips only. 701 */ 702uint32_t 703emu_rd_p16vptr(struct emu_sc_info *sc, uint16_t chn, uint16_t reg) 704{ 705 uint32_t val; 706 707 /* XXX separate lock? */ 708 EMU_RWLOCK(); 709 emu_wr_nolock(sc, EMU_A2_PTR, (reg << 16) | chn, 4); 710 val = emu_rd_nolock(sc, EMU_DATA2, 4); 711 712 EMU_RWUNLOCK(); 713 714 return (val); 715} 716 717void 718emu_wr_p16vptr(struct emu_sc_info *sc, uint16_t chn, uint16_t reg, uint32_t data) 719{ 720 721 EMU_RWLOCK(); 722 emu_wr_nolock(sc, EMU_A2_PTR, (reg << 16) | chn, 4); 723 emu_wr_nolock(sc, EMU_DATA2, data, 4); 724 EMU_RWUNLOCK(); 725} 726/* 727 * XXX CardBus interface. Not tested on any real hardware. 728 */ 729static void 730emu_wr_cbptr(struct emu_sc_info *sc, uint32_t data) 731{ 732 733 /* 734 * 0x38 is IPE3 (CD S/PDIF interrupt pending register) on CA0102. Seems 735 * to be some reg/value accessible kind of config register on CardBus 736 * CA0108, with value(?) in top 16 bit, address(?) in low 16 737 */ 738 739 emu_rd_nolock(sc, 0x38, 4); 740 emu_wr_nolock(sc, 0x38, data, 4); 741 emu_rd_nolock(sc, 0x38, 4); 742 743} 744 745/* 746 * Direct hardware register access 747 * Assume that it is never used to access EMU_PTR-based registers and can run unlocked. 748 */ 749void 750emu_wr(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size) 751{ 752 KASSERT(regno != EMU_PTR, ("emu_wr: attempt to write to EMU_PTR")); 753 KASSERT(regno != EMU_A2_PTR, ("emu_wr: attempt to write to EMU_A2_PTR")); 754 755 emu_wr_nolock(sc, regno, data, size); 756} 757 758uint32_t 759emu_rd(struct emu_sc_info *sc, unsigned int regno, unsigned int size) 760{ 761 uint32_t rd; 762 763 KASSERT(regno != EMU_DATA, ("emu_rd: attempt to read DATA")); 764 KASSERT(regno != EMU_DATA2, ("emu_rd: attempt to read DATA2")); 765 766 rd = emu_rd_nolock(sc, regno, size); 767 return (rd); 768} 769 770/* 771 * Enabling IR MIDI messages is another kind of black magic. It just 772 * has to be made this way. It really do it. 773 */ 774void 775emu_enable_ir(struct emu_sc_info *sc) 776{ 777 uint32_t iocfg; 778 779 if (sc->is_emu10k2 || sc->is_ca0102) { 780 iocfg = emu_rd_nolock(sc, EMU_A_IOCFG, 2); 781 emu_wr_nolock(sc, EMU_A_IOCFG, iocfg | EMU_A_IOCFG_GPOUT2, 2); 782 DELAY(500); 783 emu_wr_nolock(sc, EMU_A_IOCFG, iocfg | EMU_A_IOCFG_GPOUT1 | EMU_A_IOCFG_GPOUT2, 2); 784 DELAY(500); 785 emu_wr_nolock(sc, EMU_A_IOCFG, iocfg | EMU_A_IOCFG_GPOUT1, 2); 786 DELAY(100); 787 emu_wr_nolock(sc, EMU_A_IOCFG, iocfg, 2); 788 device_printf(sc->dev, "Audigy IR MIDI events enabled.\n"); 789 sc->enable_ir = 1; 790 } 791 if (sc->is_emu10k1) { 792 iocfg = emu_rd_nolock(sc, EMU_HCFG, 4); 793 emu_wr_nolock(sc, EMU_HCFG, iocfg | EMU_HCFG_GPOUT2, 4); 794 DELAY(500); 795 emu_wr_nolock(sc, EMU_HCFG, iocfg | EMU_HCFG_GPOUT1 | EMU_HCFG_GPOUT2, 4); 796 DELAY(100); 797 emu_wr_nolock(sc, EMU_HCFG, iocfg, 4); 798 device_printf(sc->dev, "SB Live! IR MIDI events enabled.\n"); 799 sc->enable_ir = 1; 800 } 801} 802 803/* 804 * emu_timer_ - HW timer management 805 */ 806int 807emu_timer_create(struct emu_sc_info *sc) 808{ 809 int i, timer; 810 811 timer = -1; 812 813 mtx_lock(&sc->lock); 814 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) 815 if (sc->timer[i] == 0) { 816 sc->timer[i] = -1; /* disable it */ 817 timer = i; 818 mtx_unlock(&sc->lock); 819 return (timer); 820 } 821 mtx_unlock(&sc->lock); 822 823 return (-1); 824} 825 826int 827emu_timer_set(struct emu_sc_info *sc, int timer, int delay) 828{ 829 int i; 830 831 if (timer < 0) 832 return (-1); 833 834 RANGE(delay, 16, 1024); 835 RANGE(timer, 0, EMU_MAX_IRQ_CONSUMERS-1); 836 837 mtx_lock(&sc->lock); 838 sc->timer[timer] = delay; 839 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) 840 if (sc->timerinterval > sc->timer[i]) 841 sc->timerinterval = sc->timer[i]; 842 843 /* XXX */ 844 emu_wr(sc, EMU_TIMER, sc->timerinterval & 0x03ff, 2); 845 mtx_unlock(&sc->lock); 846 847 return (timer); 848} 849 850int 851emu_timer_enable(struct emu_sc_info *sc, int timer, int go) 852{ 853 uint32_t x; 854 int ena_int; 855 int i; 856 857 if (timer < 0) 858 return (-1); 859 860 RANGE(timer, 0, EMU_MAX_IRQ_CONSUMERS-1); 861 862 mtx_lock(&sc->lock); 863 864 if ((go == 1) && (sc->timer[timer] < 0)) 865 sc->timer[timer] = -sc->timer[timer]; 866 if ((go == 0) && (sc->timer[timer] > 0)) 867 sc->timer[timer] = -sc->timer[timer]; 868 869 ena_int = 0; 870 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) { 871 if (sc->timerinterval > sc->timer[i]) 872 sc->timerinterval = sc->timer[i]; 873 if (sc->timer[i] > 0) 874 ena_int = 1; 875 } 876 877 emu_wr(sc, EMU_TIMER, sc->timerinterval & 0x03ff, 2); 878 879 if (ena_int == 1) { 880 x = emu_rd(sc, EMU_INTE, 4); 881 x |= EMU_INTE_INTERTIMERENB; 882 emu_wr(sc, EMU_INTE, x, 4); 883 } else { 884 x = emu_rd(sc, EMU_INTE, 4); 885 x &= ~EMU_INTE_INTERTIMERENB; 886 emu_wr(sc, EMU_INTE, x, 4); 887 } 888 mtx_unlock(&sc->lock); 889 return (0); 890} 891 892int 893emu_timer_clear(struct emu_sc_info *sc, int timer) 894{ 895 if (timer < 0) 896 return (-1); 897 898 RANGE(timer, 0, EMU_MAX_IRQ_CONSUMERS-1); 899 900 emu_timer_enable(sc, timer, 0); 901 902 mtx_lock(&sc->lock); 903 if (sc->timer[timer] != 0) 904 sc->timer[timer] = 0; 905 mtx_unlock(&sc->lock); 906 907 return (timer); 908} 909 910/* 911 * emu_intr_ - HW interrupt handler management 912 */ 913int 914emu_intr_register(struct emu_sc_info *sc, uint32_t inte_mask, uint32_t intr_mask, uint32_t(*func) (void *softc, uint32_t irq), void *isc) 915{ 916 int i; 917 uint32_t x; 918 919 mtx_lock(&sc->lock); 920 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) 921 if (sc->ihandler[i].inte_mask == 0) { 922 sc->ihandler[i].inte_mask = inte_mask; 923 sc->ihandler[i].intr_mask = intr_mask; 924 sc->ihandler[i].softc = isc; 925 sc->ihandler[i].irq_func = func; 926 x = emu_rd(sc, EMU_INTE, 4); 927 x |= inte_mask; 928 emu_wr(sc, EMU_INTE, x, 4); 929 mtx_unlock(&sc->lock); 930 if (sc->dbg_level > 1) 931 device_printf(sc->dev, "ihandle %d registered\n", i); 932 933 return (i); 934 } 935 mtx_unlock(&sc->lock); 936 if (sc->dbg_level > 1) 937 device_printf(sc->dev, "ihandle not registered\n"); 938 939 return (-1); 940} 941 942int 943emu_intr_unregister(struct emu_sc_info *sc, int hnumber) 944{ 945 uint32_t x; 946 int i; 947 948 mtx_lock(&sc->lock); 949 950 if (sc->ihandler[hnumber].inte_mask == 0) { 951 mtx_unlock(&sc->lock); 952 return (-1); 953 } 954 955 x = emu_rd(sc, EMU_INTE, 4); 956 x &= ~sc->ihandler[hnumber].inte_mask; 957 958 sc->ihandler[hnumber].inte_mask = 0; 959 sc->ihandler[hnumber].intr_mask = 0; 960 sc->ihandler[hnumber].softc = NULL; 961 sc->ihandler[hnumber].irq_func = NULL; 962 963 /* other interrupt handlers may use this EMU_INTE value */ 964 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) 965 if (sc->ihandler[i].inte_mask != 0) 966 x |= sc->ihandler[i].inte_mask; 967 968 emu_wr(sc, EMU_INTE, x, 4); 969 970 mtx_unlock(&sc->lock); 971 return (hnumber); 972} 973 974static void 975emu_intr(void *p) 976{ 977 struct emu_sc_info *sc = (struct emu_sc_info *)p; 978 uint32_t stat, ack; 979 int i; 980 981 for (;;) { 982 stat = emu_rd(sc, EMU_IPR, 4); 983 ack = 0; 984 if (stat == 0) 985 break; 986 emu_wr(sc, EMU_IPR, stat, 4); 987 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) { 988 if ((((sc->ihandler[i].intr_mask) & stat) != 0) && 989 (((void *)sc->ihandler[i].irq_func) != NULL)) { 990 ack |= sc->ihandler[i].irq_func(sc->ihandler[i].softc, 991 (sc->ihandler[i].intr_mask) & stat); 992 } 993 } 994 if (sc->dbg_level > 1) 995 if (stat & (~ack)) 996 device_printf(sc->dev, "Unhandled interrupt: %08x\n", stat & (~ack)); 997 } 998 999 if ((sc->is_ca0102) || (sc->is_ca0108)) 1000 for (;;) { 1001 stat = emu_rd(sc, EMU_IPR2, 4); 1002 ack = 0; 1003 if (stat == 0) 1004 break; 1005 emu_wr(sc, EMU_IPR2, stat, 4); 1006 if (sc->dbg_level > 1) 1007 device_printf(sc->dev, "EMU_IPR2: %08x\n", stat); 1008 1009 break; /* to avoid infinite loop. should be removed 1010 * after completion of P16V interface. */ 1011 } 1012 1013 if (sc->is_ca0102) 1014 for (;;) { 1015 stat = emu_rd(sc, EMU_IPR3, 4); 1016 ack = 0; 1017 if (stat == 0) 1018 break; 1019 emu_wr(sc, EMU_IPR3, stat, 4); 1020 if (sc->dbg_level > 1) 1021 device_printf(sc->dev, "EMU_IPR3: %08x\n", stat); 1022 1023 break; /* to avoid infinite loop. should be removed 1024 * after completion of S/PDIF interface */ 1025 } 1026} 1027 1028/* 1029 * Get data from private emu10kx structure for PCM buffer allocation. 1030 * Used by PCM code only. 1031 */ 1032bus_dma_tag_t 1033emu_gettag(struct emu_sc_info *sc) 1034{ 1035 return (sc->mem.dmat); 1036} 1037 1038static void 1039emu_setmap(void *arg, bus_dma_segment_t * segs, int nseg, int error) 1040{ 1041 bus_addr_t *phys = (bus_addr_t *) arg; 1042 1043 *phys = error ? 0 : (bus_addr_t) segs->ds_addr; 1044 1045 if (bootverbose) { 1046 printf("emu10kx: setmap (%lx, %lx), nseg=%d, error=%d\n", 1047 (unsigned long)segs->ds_addr, (unsigned long)segs->ds_len, 1048 nseg, error); 1049 } 1050} 1051 1052static void * 1053emu_malloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr, 1054 bus_dmamap_t *map) 1055{ 1056 void *dmabuf; 1057 int error; 1058 1059 *addr = 0; 1060 if ((error = bus_dmamem_alloc(mem->dmat, &dmabuf, BUS_DMA_NOWAIT, map))) { 1061 if (mem->card->dbg_level > 2) 1062 device_printf(mem->card->dev, "emu_malloc: failed to alloc DMA map: %d\n", error); 1063 return (NULL); 1064 } 1065 if ((error = bus_dmamap_load(mem->dmat, *map, dmabuf, sz, emu_setmap, addr, 0)) || !*addr) { 1066 if (mem->card->dbg_level > 2) 1067 device_printf(mem->card->dev, "emu_malloc: failed to load DMA memory: %d\n", error); 1068 bus_dmamem_free(mem->dmat, dmabuf, *map); 1069 return (NULL); 1070 } 1071 return (dmabuf); 1072} 1073 1074static void 1075emu_free(struct emu_mem *mem, void *dmabuf, bus_dmamap_t map) 1076{ 1077 bus_dmamap_unload(mem->dmat, map); 1078 bus_dmamem_free(mem->dmat, dmabuf, map); 1079} 1080 1081static void * 1082emu_memalloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr, const char *owner) 1083{ 1084 uint32_t blksz, start, idx, ofs, tmp, found; 1085 struct emu_memblk *blk; 1086 void *membuf; 1087 1088 blksz = sz / EMUPAGESIZE; 1089 if (sz > (blksz * EMUPAGESIZE)) 1090 blksz++; 1091 if (blksz > EMU_MAX_BUFSZ / EMUPAGESIZE) { 1092 if (mem->card->dbg_level > 2) 1093 device_printf(mem->card->dev, "emu_memalloc: memory request tool large\n"); 1094 return (NULL); 1095 } 1096 /* find a free block in the bitmap */ 1097 found = 0; 1098 start = 1; 1099 while (!found && start + blksz < EMU_MAXPAGES) { 1100 found = 1; 1101 for (idx = start; idx < start + blksz; idx++) 1102 if (mem->bmap[idx >> 3] & (1 << (idx & 7))) 1103 found = 0; 1104 if (!found) 1105 start++; 1106 } 1107 if (!found) { 1108 if (mem->card->dbg_level > 2) 1109 device_printf(mem->card->dev, "emu_memalloc: no free space in bitmap\n"); 1110 return (NULL); 1111 } 1112 blk = malloc(sizeof(*blk), M_DEVBUF, M_NOWAIT); 1113 if (blk == NULL) { 1114 if (mem->card->dbg_level > 2) 1115 device_printf(mem->card->dev, "emu_memalloc: buffer allocation failed\n"); 1116 return (NULL); 1117 } 1118 bzero(blk, sizeof(*blk)); 1119 membuf = emu_malloc(mem, sz, &blk->buf_addr, &blk->buf_map); 1120 *addr = blk->buf_addr; 1121 if (membuf == NULL) { 1122 if (mem->card->dbg_level > 2) 1123 device_printf(mem->card->dev, "emu_memalloc: can't setup HW memory\n"); 1124 free(blk, M_DEVBUF); 1125 return (NULL); 1126 } 1127 blk->buf = membuf; 1128 blk->pte_start = start; 1129 blk->pte_size = blksz; 1130 strncpy(blk->owner, owner, 15); 1131 blk->owner[15] = '\0'; 1132 ofs = 0; 1133 for (idx = start; idx < start + blksz; idx++) { 1134 mem->bmap[idx >> 3] |= 1 << (idx & 7); 1135 tmp = (uint32_t) (blk->buf_addr + ofs); 1136 mem->ptb_pages[idx] = (tmp << 1) | idx; 1137 ofs += EMUPAGESIZE; 1138 } 1139 SLIST_INSERT_HEAD(&mem->blocks, blk, link); 1140 return (membuf); 1141} 1142 1143static int 1144emu_memfree(struct emu_mem *mem, void *membuf) 1145{ 1146 uint32_t idx, tmp; 1147 struct emu_memblk *blk, *i; 1148 1149 blk = NULL; 1150 SLIST_FOREACH(i, &mem->blocks, link) { 1151 if (i->buf == membuf) 1152 blk = i; 1153 } 1154 if (blk == NULL) 1155 return (EINVAL); 1156 SLIST_REMOVE(&mem->blocks, blk, emu_memblk, link); 1157 emu_free(mem, membuf, blk->buf_map); 1158 tmp = (uint32_t) (mem->silent_page_addr) << 1; 1159 for (idx = blk->pte_start; idx < blk->pte_start + blk->pte_size; idx++) { 1160 mem->bmap[idx >> 3] &= ~(1 << (idx & 7)); 1161 mem->ptb_pages[idx] = tmp | idx; 1162 } 1163 free(blk, M_DEVBUF); 1164 return (0); 1165} 1166 1167static int 1168emu_memstart(struct emu_mem *mem, void *membuf) 1169{ 1170 struct emu_memblk *blk, *i; 1171 1172 blk = NULL; 1173 SLIST_FOREACH(i, &mem->blocks, link) { 1174 if (i->buf == membuf) 1175 blk = i; 1176 } 1177 if (blk == NULL) 1178 return (-1); 1179 return (blk->pte_start); 1180} 1181 1182static uint32_t 1183emu_rate_to_pitch(uint32_t rate) 1184{ 1185 static uint32_t logMagTable[128] = { 1186 0x00000, 0x02dfc, 0x05b9e, 0x088e6, 0x0b5d6, 0x0e26f, 0x10eb3, 0x13aa2, 1187 0x1663f, 0x1918a, 0x1bc84, 0x1e72e, 0x2118b, 0x23b9a, 0x2655d, 0x28ed5, 1188 0x2b803, 0x2e0e8, 0x30985, 0x331db, 0x359eb, 0x381b6, 0x3a93d, 0x3d081, 1189 0x3f782, 0x41e42, 0x444c1, 0x46b01, 0x49101, 0x4b6c4, 0x4dc49, 0x50191, 1190 0x5269e, 0x54b6f, 0x57006, 0x59463, 0x5b888, 0x5dc74, 0x60029, 0x623a7, 1191 0x646ee, 0x66a00, 0x68cdd, 0x6af86, 0x6d1fa, 0x6f43c, 0x7164b, 0x73829, 1192 0x759d4, 0x77b4f, 0x79c9a, 0x7bdb5, 0x7dea1, 0x7ff5e, 0x81fed, 0x8404e, 1193 0x86082, 0x88089, 0x8a064, 0x8c014, 0x8df98, 0x8fef1, 0x91e20, 0x93d26, 1194 0x95c01, 0x97ab4, 0x9993e, 0x9b79f, 0x9d5d9, 0x9f3ec, 0xa11d8, 0xa2f9d, 1195 0xa4d3c, 0xa6ab5, 0xa8808, 0xaa537, 0xac241, 0xadf26, 0xafbe7, 0xb1885, 1196 0xb3500, 0xb5157, 0xb6d8c, 0xb899f, 0xba58f, 0xbc15e, 0xbdd0c, 0xbf899, 1197 0xc1404, 0xc2f50, 0xc4a7b, 0xc6587, 0xc8073, 0xc9b3f, 0xcb5ed, 0xcd07c, 1198 0xceaec, 0xd053f, 0xd1f73, 0xd398a, 0xd5384, 0xd6d60, 0xd8720, 0xda0c3, 1199 0xdba4a, 0xdd3b4, 0xded03, 0xe0636, 0xe1f4e, 0xe384a, 0xe512c, 0xe69f3, 1200 0xe829f, 0xe9b31, 0xeb3a9, 0xecc08, 0xee44c, 0xefc78, 0xf148a, 0xf2c83, 1201 0xf4463, 0xf5c2a, 0xf73da, 0xf8b71, 0xfa2f0, 0xfba57, 0xfd1a7, 0xfe8df 1202 }; 1203 static char logSlopeTable[128] = { 1204 0x5c, 0x5c, 0x5b, 0x5a, 0x5a, 0x59, 0x58, 0x58, 1205 0x57, 0x56, 0x56, 0x55, 0x55, 0x54, 0x53, 0x53, 1206 0x52, 0x52, 0x51, 0x51, 0x50, 0x50, 0x4f, 0x4f, 1207 0x4e, 0x4d, 0x4d, 0x4d, 0x4c, 0x4c, 0x4b, 0x4b, 1208 0x4a, 0x4a, 0x49, 0x49, 0x48, 0x48, 0x47, 0x47, 1209 0x47, 0x46, 0x46, 0x45, 0x45, 0x45, 0x44, 0x44, 1210 0x43, 0x43, 0x43, 0x42, 0x42, 0x42, 0x41, 0x41, 1211 0x41, 0x40, 0x40, 0x40, 0x3f, 0x3f, 0x3f, 0x3e, 1212 0x3e, 0x3e, 0x3d, 0x3d, 0x3d, 0x3c, 0x3c, 0x3c, 1213 0x3b, 0x3b, 0x3b, 0x3b, 0x3a, 0x3a, 0x3a, 0x39, 1214 0x39, 0x39, 0x39, 0x38, 0x38, 0x38, 0x38, 0x37, 1215 0x37, 0x37, 0x37, 0x36, 0x36, 0x36, 0x36, 0x35, 1216 0x35, 0x35, 0x35, 0x34, 0x34, 0x34, 0x34, 0x34, 1217 0x33, 0x33, 0x33, 0x33, 0x32, 0x32, 0x32, 0x32, 1218 0x32, 0x31, 0x31, 0x31, 0x31, 0x31, 0x30, 0x30, 1219 0x30, 0x30, 0x30, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f 1220 }; 1221 int i; 1222 1223 if (rate == 0) 1224 return (0); 1225 rate *= 11185; /* Scale 48000 to 0x20002380 */ 1226 for (i = 31; i > 0; i--) { 1227 if (rate & 0x80000000) { /* Detect leading "1" */ 1228 return (((uint32_t) (i - 15) << 20) + 1229 logMagTable[0x7f & (rate >> 24)] + 1230 (0x7f & (rate >> 17)) * 1231 logSlopeTable[0x7f & (rate >> 24)]); 1232 } 1233 rate <<= 1; 1234 } 1235 /* NOTREACHED */ 1236 return (0); 1237} 1238 1239static uint32_t 1240emu_rate_to_linearpitch(uint32_t rate) 1241{ 1242 rate = (rate << 8) / 375; 1243 return ((rate >> 1) + (rate & 1)); 1244} 1245 1246struct emu_voice * 1247emu_valloc(struct emu_sc_info *sc) 1248{ 1249 struct emu_voice *v; 1250 int i; 1251 1252 v = NULL; 1253 mtx_lock(&sc->lock); 1254 for (i = 0; i < NUM_G && sc->voice[i].busy; i++); 1255 if (i < NUM_G) { 1256 v = &sc->voice[i]; 1257 v->busy = 1; 1258 } 1259 mtx_unlock(&sc->lock); 1260 return (v); 1261} 1262 1263void 1264emu_vfree(struct emu_sc_info *sc, struct emu_voice *v) 1265{ 1266 1267 mtx_lock(&sc->lock); 1268 for (int i = 0; i < NUM_G; i++) { 1269 if (v == &sc->voice[i] && sc->voice[i].busy) { 1270 v->busy = 0; 1271 /* 1272 * XXX What we should do with mono channels? 1273 * See -pcm.c emupchan_init for other side of 1274 * this problem 1275 */ 1276 if (v->slave != NULL) 1277 emu_memfree(&sc->mem, v->vbuf); 1278 } 1279 } 1280 mtx_unlock(&sc->lock); 1281} 1282 1283int 1284emu_vinit(struct emu_sc_info *sc, struct emu_voice *m, struct emu_voice *s, 1285 uint32_t sz, struct snd_dbuf *b) 1286{ 1287 void *vbuf; 1288 bus_addr_t tmp_addr; 1289 1290 vbuf = emu_memalloc(&sc->mem, sz, &tmp_addr, "vinit"); 1291 if (vbuf == NULL) { 1292 if(sc->dbg_level > 2) 1293 device_printf(sc->dev, "emu_memalloc returns NULL in enu_vinit\n"); 1294 return (ENOMEM); 1295 } 1296 if (b != NULL) 1297 sndbuf_setup(b, vbuf, sz); 1298 m->start = emu_memstart(&sc->mem, vbuf) * EMUPAGESIZE; 1299 if (m->start < 0) { 1300 if(sc->dbg_level > 2) 1301 device_printf(sc->dev, "emu_memstart returns (-1) in enu_vinit\n"); 1302 emu_memfree(&sc->mem, vbuf); 1303 return (ENOMEM); 1304 } 1305 m->end = m->start + sz; 1306 m->speed = 0; 1307 m->b16 = 0; 1308 m->stereo = 0; 1309 m->running = 0; 1310 m->ismaster = 1; 1311 m->vol = 0xff; 1312 m->buf = tmp_addr; 1313 m->vbuf = vbuf; 1314 m->slave = s; 1315 if (s != NULL) { 1316 s->start = m->start; 1317 s->end = m->end; 1318 s->speed = 0; 1319 s->b16 = 0; 1320 s->stereo = 0; 1321 s->running = 0; 1322 s->ismaster = 0; 1323 s->vol = m->vol; 1324 s->buf = m->buf; 1325 s->vbuf = NULL; 1326 s->slave = NULL; 1327 } 1328 return (0); 1329} 1330 1331void 1332emu_vsetup(struct emu_voice *v, int fmt, int spd) 1333{ 1334 if (fmt) { 1335 v->b16 = (fmt & AFMT_16BIT) ? 1 : 0; 1336 v->stereo = (AFMT_CHANNEL(fmt) > 1) ? 1 : 0; 1337 if (v->slave != NULL) { 1338 v->slave->b16 = v->b16; 1339 v->slave->stereo = v->stereo; 1340 } 1341 } 1342 if (spd) { 1343 v->speed = spd; 1344 if (v->slave != NULL) 1345 v->slave->speed = v->speed; 1346 } 1347} 1348 1349void 1350emu_vroute(struct emu_sc_info *sc, struct emu_route *rt, struct emu_voice *v) 1351{ 1352 int i; 1353 1354 for (i = 0; i < 8; i++) { 1355 v->routing[i] = rt->routing_left[i]; 1356 v->amounts[i] = rt->amounts_left[i]; 1357 } 1358 if ((v->stereo) && (v->ismaster == 0)) 1359 for (i = 0; i < 8; i++) { 1360 v->routing[i] = rt->routing_right[i]; 1361 v->amounts[i] = rt->amounts_right[i]; 1362 } 1363 1364 if ((v->stereo) && (v->slave != NULL)) 1365 emu_vroute(sc, rt, v->slave); 1366} 1367 1368void 1369emu_vwrite(struct emu_sc_info *sc, struct emu_voice *v) 1370{ 1371 int s; 1372 uint32_t start, val, silent_page; 1373 1374 s = (v->stereo ? 1 : 0) + (v->b16 ? 1 : 0); 1375 1376 v->sa = v->start >> s; 1377 v->ea = v->end >> s; 1378 1379 if (v->stereo) { 1380 emu_wrptr(sc, v->vnum, EMU_CHAN_CPF, EMU_CHAN_CPF_STEREO_MASK); 1381 } else { 1382 emu_wrptr(sc, v->vnum, EMU_CHAN_CPF, 0); 1383 } 1384 val = v->stereo ? 28 : 30; 1385 val *= v->b16 ? 1 : 2; 1386 start = v->sa + val; 1387 1388 if (sc->is_emu10k1) { 1389 emu_wrptr(sc, v->vnum, EMU_CHAN_FXRT, ((v->routing[3] << 12) | 1390 (v->routing[2] << 8) | 1391 (v->routing[1] << 4) | 1392 (v->routing[0] << 0)) << 16); 1393 } else { 1394 emu_wrptr(sc, v->vnum, EMU_A_CHAN_FXRT1, (v->routing[3] << 24) | 1395 (v->routing[2] << 16) | 1396 (v->routing[1] << 8) | 1397 (v->routing[0] << 0)); 1398 emu_wrptr(sc, v->vnum, EMU_A_CHAN_FXRT2, (v->routing[7] << 24) | 1399 (v->routing[6] << 16) | 1400 (v->routing[5] << 8) | 1401 (v->routing[4] << 0)); 1402 emu_wrptr(sc, v->vnum, EMU_A_CHAN_SENDAMOUNTS, (v->amounts[7] << 24) | 1403 (v->amounts[6] << 26) | 1404 (v->amounts[5] << 8) | 1405 (v->amounts[4] << 0)); 1406 } 1407 emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX, (v->amounts[0] << 8) | (v->amounts[1] << 0)); 1408 emu_wrptr(sc, v->vnum, EMU_CHAN_DSL, v->ea | (v->amounts[3] << 24)); 1409 emu_wrptr(sc, v->vnum, EMU_CHAN_PSST, v->sa | (v->amounts[2] << 24)); 1410 1411 emu_wrptr(sc, v->vnum, EMU_CHAN_CCCA, start | (v->b16 ? 0 : EMU_CHAN_CCCA_8BITSELECT)); 1412 emu_wrptr(sc, v->vnum, EMU_CHAN_Z1, 0); 1413 emu_wrptr(sc, v->vnum, EMU_CHAN_Z2, 0); 1414 1415 silent_page = ((uint32_t) (sc->mem.silent_page_addr) << 1) | EMU_CHAN_MAP_PTI_MASK; 1416 emu_wrptr(sc, v->vnum, EMU_CHAN_MAPA, silent_page); 1417 emu_wrptr(sc, v->vnum, EMU_CHAN_MAPB, silent_page); 1418 1419 emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, EMU_CHAN_CVCF_CURRFILTER_MASK); 1420 emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, EMU_CHAN_VTFT_FILTERTARGET_MASK); 1421 emu_wrptr(sc, v->vnum, EMU_CHAN_ATKHLDM, 0); 1422 emu_wrptr(sc, v->vnum, EMU_CHAN_DCYSUSM, EMU_CHAN_DCYSUSM_DECAYTIME_MASK); 1423 emu_wrptr(sc, v->vnum, EMU_CHAN_LFOVAL1, 0x8000); 1424 emu_wrptr(sc, v->vnum, EMU_CHAN_LFOVAL2, 0x8000); 1425 emu_wrptr(sc, v->vnum, EMU_CHAN_FMMOD, 0); 1426 emu_wrptr(sc, v->vnum, EMU_CHAN_TREMFRQ, 0); 1427 emu_wrptr(sc, v->vnum, EMU_CHAN_FM2FRQ2, 0); 1428 emu_wrptr(sc, v->vnum, EMU_CHAN_ENVVAL, 0x8000); 1429 1430 emu_wrptr(sc, v->vnum, EMU_CHAN_ATKHLDV, EMU_CHAN_ATKHLDV_HOLDTIME_MASK | EMU_CHAN_ATKHLDV_ATTACKTIME_MASK); 1431 emu_wrptr(sc, v->vnum, EMU_CHAN_ENVVOL, 0x8000); 1432 1433 emu_wrptr(sc, v->vnum, EMU_CHAN_PEFE_FILTERAMOUNT, 0x7f); 1434 emu_wrptr(sc, v->vnum, EMU_CHAN_PEFE_PITCHAMOUNT, 0); 1435 if ((v->stereo) && (v->slave != NULL)) 1436 emu_vwrite(sc, v->slave); 1437} 1438 1439static void 1440emu_vstop(struct emu_sc_info *sc, char channel, int enable) 1441{ 1442 int reg; 1443 1444 reg = (channel & 0x20) ? EMU_SOLEH : EMU_SOLEL; 1445 channel &= 0x1f; 1446 reg |= 1 << 24; 1447 reg |= channel << 16; 1448 emu_wrptr(sc, 0, reg, enable); 1449} 1450 1451void 1452emu_vtrigger(struct emu_sc_info *sc, struct emu_voice *v, int go) 1453{ 1454 uint32_t pitch_target, initial_pitch; 1455 uint32_t cra, cs, ccis; 1456 uint32_t sample, i; 1457 1458 if (go) { 1459 cra = 64; 1460 cs = v->stereo ? 4 : 2; 1461 ccis = v->stereo ? 28 : 30; 1462 ccis *= v->b16 ? 1 : 2; 1463 sample = v->b16 ? 0x00000000 : 0x80808080; 1464 for (i = 0; i < cs; i++) 1465 emu_wrptr(sc, v->vnum, EMU_CHAN_CD0 + i, sample); 1466 emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_CACHEINVALIDSIZE, 0); 1467 emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_READADDRESS, cra); 1468 emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_CACHEINVALIDSIZE, ccis); 1469 1470 emu_wrptr(sc, v->vnum, EMU_CHAN_IFATN, 0xff00); 1471 emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, 0xffffffff); 1472 emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, 0xffffffff); 1473 emu_wrptr(sc, v->vnum, EMU_CHAN_DCYSUSV, 0x00007f7f); 1474 emu_vstop(sc, v->vnum, 0); 1475 1476 pitch_target = emu_rate_to_linearpitch(v->speed); 1477 initial_pitch = emu_rate_to_pitch(v->speed) >> 8; 1478 emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX_PITCHTARGET, pitch_target); 1479 emu_wrptr(sc, v->vnum, EMU_CHAN_CPF_PITCH, pitch_target); 1480 emu_wrptr(sc, v->vnum, EMU_CHAN_IP, initial_pitch); 1481 } else { 1482 emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX_PITCHTARGET, 0); 1483 emu_wrptr(sc, v->vnum, EMU_CHAN_CPF_PITCH, 0); 1484 emu_wrptr(sc, v->vnum, EMU_CHAN_IFATN, 0xffff); 1485 emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, 0x0000ffff); 1486 emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, 0x0000ffff); 1487 emu_wrptr(sc, v->vnum, EMU_CHAN_IP, 0); 1488 emu_vstop(sc, v->vnum, 1); 1489 } 1490 if ((v->stereo) && (v->slave != NULL)) 1491 emu_vtrigger(sc, v->slave, go); 1492} 1493 1494int 1495emu_vpos(struct emu_sc_info *sc, struct emu_voice *v) 1496{ 1497 int s, ptr; 1498 1499 s = (v->b16 ? 1 : 0) + (v->stereo ? 1 : 0); 1500 ptr = (emu_rdptr(sc, v->vnum, EMU_CHAN_CCCA_CURRADDR) - (v->start >> s)) << s; 1501 return (ptr & ~0x0000001f); 1502} 1503 1504/* fx */ 1505static void 1506emu_wrefx(struct emu_sc_info *sc, unsigned int pc, unsigned int data) 1507{ 1508 emu_wrptr(sc, 0, sc->code_base + pc, data); 1509} 1510 1511static void 1512emu_addefxop(struct emu_sc_info *sc, unsigned int op, unsigned int z, unsigned int w, unsigned int x, unsigned int y, uint32_t * pc) 1513{ 1514 if ((*pc) + 1 > sc->code_size) { 1515 device_printf(sc->dev, "DSP CODE OVERRUN: attept to write past code_size (pc=%d)\n", (*pc)); 1516 return; 1517 } 1518 emu_wrefx(sc, (*pc) * 2, (x << sc->high_operand_shift) | y); 1519 emu_wrefx(sc, (*pc) * 2 + 1, (op << sc->opcode_shift) | (z << sc->high_operand_shift) | w); 1520 (*pc)++; 1521} 1522 1523static int 1524sysctl_emu_mixer_control(SYSCTL_HANDLER_ARGS) 1525{ 1526 struct emu_sc_info *sc; 1527 int mixer_id; 1528 int new_vol; 1529 int err; 1530 1531 sc = arg1; 1532 mixer_id = arg2; 1533 1534 new_vol = emumix_get_volume(sc, mixer_id); 1535 err = sysctl_handle_int(oidp, &new_vol, 0, req); 1536 1537 if (err || req->newptr == NULL) 1538 return (err); 1539 if (new_vol < 0 || new_vol > 100) 1540 return (EINVAL); 1541 emumix_set_volume(sc, mixer_id, new_vol); 1542 1543 return (0); 1544} 1545 1546static int 1547emu_addefxmixer(struct emu_sc_info *sc, const char *mix_name, const int mix_id, uint32_t defvolume) 1548{ 1549 int volgpr; 1550 char sysctl_name[32]; 1551 1552 volgpr = emu_rm_gpr_alloc(sc->rm, 1); 1553 emumix_set_fxvol(sc, volgpr, defvolume); 1554 /* 1555 * Mixer controls with NULL mix_name are handled 1556 * by AC97 emulation code or PCM mixer. 1557 */ 1558 if (mix_name != NULL) { 1559 /* 1560 * Temporary sysctls should start with underscore, 1561 * see freebsd-current mailing list, emu10kx driver 1562 * discussion around 2006-05-24. 1563 */ 1564 snprintf(sysctl_name, 32, "_%s", mix_name); 1565 SYSCTL_ADD_PROC(sc->ctx, 1566 SYSCTL_CHILDREN(sc->root), OID_AUTO, sysctl_name, 1567 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, sc, mix_id, 1568 sysctl_emu_mixer_control, "I", ""); 1569 } 1570 1571 return (volgpr); 1572} 1573 1574static int 1575sysctl_emu_digitalswitch_control(SYSCTL_HANDLER_ARGS) 1576{ 1577 struct emu_sc_info *sc; 1578 int new_val; 1579 int err; 1580 1581 sc = arg1; 1582 1583 new_val = (sc->mode == MODE_DIGITAL) ? 1 : 0; 1584 err = sysctl_handle_int(oidp, &new_val, 0, req); 1585 1586 if (err || req->newptr == NULL) 1587 return (err); 1588 if (new_val < 0 || new_val > 1) 1589 return (EINVAL); 1590 1591 switch (new_val) { 1592 case 0: 1593 emumix_set_mode(sc, MODE_ANALOG); 1594 break; 1595 case 1: 1596 emumix_set_mode(sc, MODE_DIGITAL); 1597 break; 1598 } 1599 return (0); 1600} 1601 1602static void 1603emu_digitalswitch(struct emu_sc_info *sc) 1604{ 1605 /* XXX temporary? */ 1606 SYSCTL_ADD_PROC(sc->ctx, SYSCTL_CHILDREN(sc->root), OID_AUTO, 1607 "_digital", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, 1608 sc, 0, sysctl_emu_digitalswitch_control, "I", 1609 "Enable digital output"); 1610 1611 return; 1612} 1613 1614/* 1615 * Allocate cache GPRs that will hold mixed output channels 1616 * and clear it on every DSP run. 1617 */ 1618#define EFX_CACHE(CACHE_IDX) do { \ 1619 sc->cache_gpr[CACHE_IDX] = emu_rm_gpr_alloc(sc->rm, 1); \ 1620 emu_addefxop(sc, ACC3, \ 1621 GPR(sc->cache_gpr[CACHE_IDX]), \ 1622 DSP_CONST(0), \ 1623 DSP_CONST(0), \ 1624 DSP_CONST(0), \ 1625 &pc); \ 1626} while (0) 1627 1628/* Allocate GPR for volume control and route sound: OUT = OUT + IN * VOL */ 1629#define EFX_ROUTE(TITLE, INP_NR, IN_GPR_IDX, OUT_CACHE_IDX, DEF) do { \ 1630 sc->mixer_gpr[IN_GPR_IDX] = emu_addefxmixer(sc, TITLE, IN_GPR_IDX, DEF); \ 1631 sc->mixer_volcache[IN_GPR_IDX] = DEF; \ 1632 emu_addefxop(sc, MACS, \ 1633 GPR(sc->cache_gpr[OUT_CACHE_IDX]), \ 1634 GPR(sc->cache_gpr[OUT_CACHE_IDX]), \ 1635 INP_NR, \ 1636 GPR(sc->mixer_gpr[IN_GPR_IDX]), \ 1637 &pc); \ 1638} while (0) 1639 1640/* allocate GPR, OUT = IN * VOL */ 1641#define EFX_OUTPUT(TITLE, OUT_CACHE_IDX, OUT_GPR_IDX, OUTP_NR, DEF) do { \ 1642 sc->mixer_gpr[OUT_GPR_IDX] = emu_addefxmixer(sc, TITLE, OUT_GPR_IDX, DEF); \ 1643 sc->mixer_volcache[OUT_GPR_IDX] = DEF; \ 1644 emu_addefxop(sc, MACS, \ 1645 OUTP(OUTP_NR), \ 1646 DSP_CONST(0), \ 1647 GPR(sc->cache_gpr[OUT_CACHE_IDX]), \ 1648 GPR(sc->mixer_gpr[OUT_GPR_IDX]), \ 1649 &pc); \ 1650} while (0) 1651 1652/* like EFX_OUTPUT, but don't allocate mixer gpr */ 1653#define EFX_OUTPUTD(OUT_CACHE_IDX, OUT_GPR_IDX, OUTP_NR) do { \ 1654 emu_addefxop(sc, MACS, \ 1655 OUTP(OUTP_NR), \ 1656 DSP_CONST(0), \ 1657 GPR(sc->cache_gpr[OUT_CACHE_IDX]), \ 1658 GPR(sc->mixer_gpr[OUT_GPR_IDX]), \ 1659 &pc); \ 1660} while (0) 1661 1662/* skip next OPCOUNT instructions if FLAG != 0 */ 1663#define EFX_SKIP(OPCOUNT, FLAG_GPR) do { \ 1664 emu_addefxop(sc, MACS, \ 1665 DSP_CONST(0), \ 1666 GPR(sc->mute_gpr[FLAG_GPR]), \ 1667 DSP_CONST(0), \ 1668 DSP_CONST(0), \ 1669 &pc); \ 1670 emu_addefxop(sc, SKIP, \ 1671 DSP_CCR, \ 1672 DSP_CCR, \ 1673 COND_NEQ_ZERO, \ 1674 OPCOUNT, \ 1675 &pc); \ 1676} while (0) 1677 1678#define EFX_COPY(TO, FROM) do { \ 1679 emu_addefxop(sc, ACC3, \ 1680 TO, \ 1681 DSP_CONST(0), \ 1682 DSP_CONST(0), \ 1683 FROM, \ 1684 &pc); \ 1685} while (0) 1686 1687static void 1688emu_initefx(struct emu_sc_info *sc) 1689{ 1690 unsigned int i; 1691 uint32_t pc; 1692 1693 /* stop DSP */ 1694 if (sc->is_emu10k1) { 1695 emu_wrptr(sc, 0, EMU_DBG, EMU_DBG_SINGLE_STEP); 1696 } else { 1697 emu_wrptr(sc, 0, EMU_A_DBG, EMU_A_DBG_SINGLE_STEP); 1698 } 1699 1700 /* code size is in instructions */ 1701 pc = 0; 1702 for (i = 0; i < sc->code_size; i++) { 1703 if (sc->is_emu10k1) { 1704 emu_addefxop(sc, ACC3, DSP_CONST(0x0), DSP_CONST(0x0), DSP_CONST(0x0), DSP_CONST(0x0), &pc); 1705 } else { 1706 emu_addefxop(sc, SKIP, DSP_CONST(0x0), DSP_CONST(0x0), DSP_CONST(0xf), DSP_CONST(0x0), &pc); 1707 } 1708 } 1709 1710 /* allocate GPRs for mute switches (EFX_SKIP). Mute by default */ 1711 for (i = 0; i < NUM_MUTE; i++) { 1712 sc->mute_gpr[i] = emu_rm_gpr_alloc(sc->rm, 1); 1713 emumix_set_gpr(sc, sc->mute_gpr[i], 1); 1714 } 1715 emu_digitalswitch(sc); 1716 1717 pc = 0; 1718 1719 /* 1720 * DSP code below is not good, because: 1721 * 1. It can be written smaller, if it can use DSP accumulator register 1722 * instead of cache_gpr[]. 1723 * 2. It can be more careful when volume is 100%, because in DSP 1724 * x*0x7fffffff may not be equal to x ! 1725 */ 1726 1727 /* clean outputs */ 1728 for (i = 0; i < 16 ; i++) { 1729 emu_addefxop(sc, ACC3, OUTP(i), DSP_CONST(0), DSP_CONST(0), DSP_CONST(0), &pc); 1730 } 1731 1732 if (sc->is_emu10k1) { 1733 EFX_CACHE(C_FRONT_L); 1734 EFX_CACHE(C_FRONT_R); 1735 EFX_CACHE(C_REC_L); 1736 EFX_CACHE(C_REC_R); 1737 1738 /* fx0 to front/record, 100%/muted by default */ 1739 EFX_ROUTE("pcm_front_l", FX(0), M_FX0_FRONT_L, C_FRONT_L, 100); 1740 EFX_ROUTE("pcm_front_r", FX(1), M_FX1_FRONT_R, C_FRONT_R, 100); 1741 EFX_ROUTE(NULL, FX(0), M_FX0_REC_L, C_REC_L, 0); 1742 EFX_ROUTE(NULL, FX(1), M_FX1_REC_R, C_REC_R, 0); 1743 1744 /* in0, from AC97 codec output */ 1745 EFX_ROUTE("ac97_front_l", INP(IN_AC97_L), M_IN0_FRONT_L, C_FRONT_L, 0); 1746 EFX_ROUTE("ac97_front_r", INP(IN_AC97_R), M_IN0_FRONT_R, C_FRONT_R, 0); 1747 EFX_ROUTE("ac97_rec_l", INP(IN_AC97_L), M_IN0_REC_L, C_REC_L, 0); 1748 EFX_ROUTE("ac97_rec_r", INP(IN_AC97_R), M_IN0_REC_R, C_REC_R, 0); 1749 1750 /* in1, from CD S/PDIF */ 1751 /* XXX EFX_SKIP 4 assumes that each EFX_ROUTE is one DSP op */ 1752 EFX_SKIP(4, CDSPDIFMUTE); 1753 EFX_ROUTE(NULL, INP(IN_SPDIF_CD_L), M_IN1_FRONT_L, C_FRONT_L, 0); 1754 EFX_ROUTE(NULL, INP(IN_SPDIF_CD_R), M_IN1_FRONT_R, C_FRONT_R, 0); 1755 EFX_ROUTE(NULL, INP(IN_SPDIF_CD_L), M_IN1_REC_L, C_REC_L, 0); 1756 EFX_ROUTE(NULL, INP(IN_SPDIF_CD_R), M_IN1_REC_R, C_REC_R, 0); 1757 1758 if (sc->dbg_level > 0) { 1759 /* in2, ZoomVide (???) */ 1760 EFX_ROUTE("zoom_front_l", INP(IN_ZOOM_L), M_IN2_FRONT_L, C_FRONT_L, 0); 1761 EFX_ROUTE("zoom_front_r", INP(IN_ZOOM_R), M_IN2_FRONT_R, C_FRONT_R, 0); 1762 EFX_ROUTE("zoom_rec_l", INP(IN_ZOOM_L), M_IN2_REC_L, C_REC_L, 0); 1763 EFX_ROUTE("zoom_rec_r", INP(IN_ZOOM_R), M_IN2_REC_R, C_REC_R, 0); 1764 } 1765 1766 /* in3, TOSLink */ 1767 EFX_ROUTE(NULL, INP(IN_TOSLINK_L), M_IN3_FRONT_L, C_FRONT_L, 0); 1768 EFX_ROUTE(NULL, INP(IN_TOSLINK_R), M_IN3_FRONT_R, C_FRONT_R, 0); 1769 EFX_ROUTE(NULL, INP(IN_TOSLINK_L), M_IN3_REC_L, C_REC_L, 0); 1770 EFX_ROUTE(NULL, INP(IN_TOSLINK_R), M_IN3_REC_R, C_REC_R, 0); 1771 /* in4, LineIn */ 1772 EFX_ROUTE(NULL, INP(IN_LINE1_L), M_IN4_FRONT_L, C_FRONT_L, 0); 1773 EFX_ROUTE(NULL, INP(IN_LINE1_R), M_IN4_FRONT_R, C_FRONT_R, 0); 1774 EFX_ROUTE(NULL, INP(IN_LINE1_L), M_IN4_REC_L, C_REC_L, 0); 1775 EFX_ROUTE(NULL, INP(IN_LINE1_R), M_IN4_REC_R, C_REC_R, 0); 1776 1777 /* in5, on-card S/PDIF */ 1778 EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_L), M_IN5_FRONT_L, C_FRONT_L, 0); 1779 EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_R), M_IN5_FRONT_R, C_FRONT_R, 0); 1780 EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_L), M_IN5_REC_L, C_REC_L, 0); 1781 EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_R), M_IN5_REC_R, C_REC_R, 0); 1782 1783 /* in6, Line2 on Live!Drive */ 1784 EFX_ROUTE(NULL, INP(IN_LINE2_L), M_IN6_FRONT_L, C_FRONT_L, 0); 1785 EFX_ROUTE(NULL, INP(IN_LINE2_R), M_IN6_FRONT_R, C_FRONT_R, 0); 1786 EFX_ROUTE(NULL, INP(IN_LINE2_L), M_IN6_REC_L, C_REC_L, 0); 1787 EFX_ROUTE(NULL, INP(IN_LINE2_R), M_IN6_REC_R, C_REC_R, 0); 1788 1789 if (sc->dbg_level > 0) { 1790 /* in7, unknown */ 1791 EFX_ROUTE("in7_front_l", INP(0xE), M_IN7_FRONT_L, C_FRONT_L, 0); 1792 EFX_ROUTE("in7_front_r", INP(0xF), M_IN7_FRONT_R, C_FRONT_R, 0); 1793 EFX_ROUTE("in7_rec_l", INP(0xE), M_IN7_REC_L, C_REC_L, 0); 1794 EFX_ROUTE("in7_rec_r", INP(0xF), M_IN7_REC_R, C_REC_R, 0); 1795 } 1796 1797 /* analog and digital */ 1798 EFX_OUTPUT("master_front_l", C_FRONT_L, M_MASTER_FRONT_L, OUT_AC97_L, 100); 1799 EFX_OUTPUT("master_front_r", C_FRONT_R, M_MASTER_FRONT_R, OUT_AC97_R, 100); 1800 /* S/PDIF */ 1801 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, OUT_TOSLINK_L); 1802 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, OUT_TOSLINK_R); 1803 /* Headphones */ 1804 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, OUT_HEADPHONE_L); 1805 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, OUT_HEADPHONE_R); 1806 1807 /* rec output to "ADC" */ 1808 EFX_OUTPUT("master_rec_l", C_REC_L, M_MASTER_REC_L, OUT_ADC_REC_L, 100); 1809 EFX_OUTPUT("master_rec_r", C_REC_R, M_MASTER_REC_R, OUT_ADC_REC_R, 100); 1810 1811 if (!(sc->mch_disabled)) { 1812 /* 1813 * Additional channel volume is controlled by mixer in 1814 * emu_dspmixer_set() in -pcm.c 1815 */ 1816 1817 /* fx2/3 (pcm1) to rear */ 1818 EFX_CACHE(C_REAR_L); 1819 EFX_CACHE(C_REAR_R); 1820 EFX_ROUTE(NULL, FX(2), M_FX2_REAR_L, C_REAR_L, 100); 1821 EFX_ROUTE(NULL, FX(3), M_FX3_REAR_R, C_REAR_R, 100); 1822 1823 EFX_OUTPUT(NULL, C_REAR_L, M_MASTER_REAR_L, OUT_REAR_L, 100); 1824 EFX_OUTPUT(NULL, C_REAR_R, M_MASTER_REAR_R, OUT_REAR_R, 100); 1825 if (sc->has_51) { 1826 /* fx4 (pcm2) to center */ 1827 EFX_CACHE(C_CENTER); 1828 EFX_ROUTE(NULL, FX(4), M_FX4_CENTER, C_CENTER, 100); 1829 EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, OUT_D_CENTER, 100); 1830 1831 /* XXX in digital mode (default) this should be muted because 1832 this output is shared with digital out */ 1833 EFX_SKIP(1, ANALOGMUTE); 1834 EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, OUT_A_CENTER); 1835 1836 /* fx5 (pcm3) to sub */ 1837 EFX_CACHE(C_SUB); 1838 EFX_ROUTE(NULL, FX(5), M_FX5_SUBWOOFER, C_SUB, 100); 1839 EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, OUT_D_SUB, 100); 1840 1841 /* XXX in digital mode (default) this should be muted because 1842 this output is shared with digital out */ 1843 EFX_SKIP(1, ANALOGMUTE); 1844 EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, OUT_A_SUB); 1845 } 1846 } else { 1847 /* SND_EMU10KX_MULTICHANNEL_DISABLED */ 1848 EFX_OUTPUT(NULL, C_FRONT_L, M_MASTER_REAR_L, OUT_REAR_L, 57); /* 75%*75% */ 1849 EFX_OUTPUT(NULL, C_FRONT_R, M_MASTER_REAR_R, OUT_REAR_R, 57); /* 75%*75% */ 1850 1851#if 0 1852 /* XXX 5.1 does not work */ 1853 1854 if (sc->has_51) { 1855 /* (fx0+fx1)/2 to center */ 1856 EFX_CACHE(C_CENTER); 1857 emu_addefxop(sc, MACS, 1858 GPR(sc->cache_gpr[C_CENTER]), 1859 GPR(sc->cache_gpr[C_CENTER]), 1860 DSP_CONST(0xd), /* = 1/2 */ 1861 GPR(sc->cache_gpr[C_FRONT_L]), 1862 &pc); 1863 emu_addefxop(sc, MACS, 1864 GPR(sc->cache_gpr[C_CENTER]), 1865 GPR(sc->cache_gpr[C_CENTER]), 1866 DSP_CONST(0xd), /* = 1/2 */ 1867 GPR(sc->cache_gpr[C_FRONT_R]), 1868 &pc); 1869 EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, OUT_D_CENTER, 100); 1870 1871 /* XXX in digital mode (default) this should be muted because 1872 this output is shared with digital out */ 1873 EFX_SKIP(1, ANALOGMUTE); 1874 EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, OUT_A_CENTER); 1875 1876 /* (fx0+fx1)/2 to sub */ 1877 EFX_CACHE(C_SUB); 1878 emu_addefxop(sc, MACS, 1879 GPR(sc->cache_gpr[C_CENTER]), 1880 GPR(sc->cache_gpr[C_CENTER]), 1881 DSP_CONST(0xd), /* = 1/2 */ 1882 GPR(sc->cache_gpr[C_FRONT_L]), 1883 &pc); 1884 emu_addefxop(sc, MACS, 1885 GPR(sc->cache_gpr[C_CENTER]), 1886 GPR(sc->cache_gpr[C_CENTER]), 1887 DSP_CONST(0xd), /* = 1/2 */ 1888 GPR(sc->cache_gpr[C_FRONT_R]), 1889 &pc); 1890 /* XXX add lowpass filter here */ 1891 1892 EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, OUT_D_SUB, 100); 1893 1894 /* XXX in digital mode (default) this should be muted because 1895 this output is shared with digital out */ 1896 EFX_SKIP(1, ANALOGMUTE); 1897 EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, OUT_A_SUB); 1898 } 1899#endif 1900 } /* !mch_disabled */ 1901 if (sc->mch_rec) { 1902 /* 1903 * MCH RECORDING , hight 16 slots. On 5.1 cards first 4 slots 1904 * are used as outputs and already filled with data 1905 */ 1906 /* 1907 * XXX On Live! cards stream does not begin at zero offset. 1908 * It can be HW, driver or sound buffering problem. 1909 * Use sync substream (offset 0x3E) to let userland find 1910 * correct data. 1911 */ 1912 1913 /* 1914 * Substream map (in byte offsets, each substream is 2 bytes): 1915 * 0x00..0x1E - outputs 1916 * 0x20..0x3E - FX, inputs and sync stream 1917 */ 1918 1919 /* First 2 channels (offset 0x20,0x22) are empty */ 1920 for(i = (sc->has_51 ? 2 : 0); i < 2; i++) 1921 EFX_COPY(FX2(i), DSP_CONST(0)); 1922 1923 /* PCM Playback monitoring, offset 0x24..0x2A */ 1924 for(i = 0; i < 4; i++) 1925 EFX_COPY(FX2(i+2), FX(i)); 1926 1927 /* Copy of some inputs, offset 0x2C..0x3C */ 1928 for(i = 0; i < 9; i++) 1929 EFX_COPY(FX2(i+8), INP(i)); 1930 1931 /* sync data (0xc0de, offset 0x3E) */ 1932 sc->dummy_gpr = emu_rm_gpr_alloc(sc->rm, 1); 1933 emumix_set_gpr(sc, sc->dummy_gpr, 0xc0de0000); 1934 1935 EFX_COPY(FX2(15), GPR(sc->dummy_gpr)); 1936 } /* mch_rec */ 1937 } else /* emu10k2 and later */ { 1938 EFX_CACHE(C_FRONT_L); 1939 EFX_CACHE(C_FRONT_R); 1940 EFX_CACHE(C_REC_L); 1941 EFX_CACHE(C_REC_R); 1942 1943 /* fx0 to front/record, 100%/muted by default */ 1944 /* 1945 * FRONT_[L|R] is controlled by AC97 emulation in 1946 * emu_ac97_[read|write]_emulation in -pcm.c 1947 */ 1948 EFX_ROUTE(NULL, FX(0), M_FX0_FRONT_L, C_FRONT_L, 100); 1949 EFX_ROUTE(NULL, FX(1), M_FX1_FRONT_R, C_FRONT_R, 100); 1950 EFX_ROUTE(NULL, FX(0), M_FX0_REC_L, C_REC_L, 0); 1951 EFX_ROUTE(NULL, FX(1), M_FX1_REC_R, C_REC_R, 0); 1952 1953 /* in0, from AC97 codec output */ 1954 EFX_ROUTE(NULL, INP(A_IN_AC97_L), M_IN0_FRONT_L, C_FRONT_L, 100); 1955 EFX_ROUTE(NULL, INP(A_IN_AC97_R), M_IN0_FRONT_R, C_FRONT_R, 100); 1956 EFX_ROUTE(NULL, INP(A_IN_AC97_L), M_IN0_REC_L, C_REC_L, 0); 1957 EFX_ROUTE(NULL, INP(A_IN_AC97_R), M_IN0_REC_R, C_REC_R, 0); 1958 1959 /* in1, from CD S/PDIF */ 1960 EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_L), M_IN1_FRONT_L, C_FRONT_L, 0); 1961 EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_R), M_IN1_FRONT_R, C_FRONT_R, 0); 1962 EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_L), M_IN1_REC_L, C_REC_L, 0); 1963 EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_R), M_IN1_REC_R, C_REC_R, 0); 1964 1965 /* in2, optical & coax S/PDIF on AudigyDrive*/ 1966 /* XXX Should be muted when GPRSCS valid stream == 0 */ 1967 EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_L), M_IN2_FRONT_L, C_FRONT_L, 0); 1968 EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_R), M_IN2_FRONT_R, C_FRONT_R, 0); 1969 EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_L), M_IN2_REC_L, C_REC_L, 0); 1970 EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_R), M_IN2_REC_R, C_REC_R, 0); 1971 1972 if (sc->dbg_level > 0) { 1973 /* in3, unknown */ 1974 EFX_ROUTE("in3_front_l", INP(0x6), M_IN3_FRONT_L, C_FRONT_L, 0); 1975 EFX_ROUTE("in3_front_r", INP(0x7), M_IN3_FRONT_R, C_FRONT_R, 0); 1976 EFX_ROUTE("in3_rec_l", INP(0x6), M_IN3_REC_L, C_REC_L, 0); 1977 EFX_ROUTE("in3_rec_r", INP(0x7), M_IN3_REC_R, C_REC_R, 0); 1978 } 1979 1980 /* in4, LineIn 2 on AudigyDrive */ 1981 EFX_ROUTE(NULL, INP(A_IN_LINE2_L), M_IN4_FRONT_L, C_FRONT_L, 0); 1982 EFX_ROUTE(NULL, INP(A_IN_LINE2_R), M_IN4_FRONT_R, C_FRONT_R, 0); 1983 EFX_ROUTE(NULL, INP(A_IN_LINE2_L), M_IN4_REC_L, C_REC_L, 0); 1984 EFX_ROUTE(NULL, INP(A_IN_LINE2_R), M_IN4_REC_R, C_REC_R, 0); 1985 1986 /* in5, on-card S/PDIF */ 1987 EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_L), M_IN5_FRONT_L, C_FRONT_L, 0); 1988 EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_R), M_IN5_FRONT_R, C_FRONT_R, 0); 1989 EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_L), M_IN5_REC_L, C_REC_L, 0); 1990 EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_R), M_IN5_REC_R, C_REC_R, 0); 1991 1992 /* in6, AUX2 on AudigyDrive */ 1993 EFX_ROUTE(NULL, INP(A_IN_AUX2_L), M_IN6_FRONT_L, C_FRONT_L, 0); 1994 EFX_ROUTE(NULL, INP(A_IN_AUX2_R), M_IN6_FRONT_R, C_FRONT_R, 0); 1995 EFX_ROUTE(NULL, INP(A_IN_AUX2_L), M_IN6_REC_L, C_REC_L, 0); 1996 EFX_ROUTE(NULL, INP(A_IN_AUX2_R), M_IN6_REC_R, C_REC_R, 0); 1997 1998 if (sc->dbg_level > 0) { 1999 /* in7, unknown */ 2000 EFX_ROUTE("in7_front_l", INP(0xE), M_IN7_FRONT_L, C_FRONT_L, 0); 2001 EFX_ROUTE("in7_front_r", INP(0xF), M_IN7_FRONT_R, C_FRONT_R, 0); 2002 EFX_ROUTE("in7_rec_l", INP(0xE), M_IN7_REC_L, C_REC_L, 0); 2003 EFX_ROUTE("in7_rec_r", INP(0xF), M_IN7_REC_R, C_REC_R, 0); 2004 } 2005 2006 /* front output to headphones and alog and digital *front */ 2007 /* volume controlled by AC97 emulation */ 2008 EFX_OUTPUT(NULL, C_FRONT_L, M_MASTER_FRONT_L, A_OUT_A_FRONT_L, 100); 2009 EFX_OUTPUT(NULL, C_FRONT_R, M_MASTER_FRONT_R, A_OUT_A_FRONT_R, 100); 2010 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_D_FRONT_L); 2011 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_D_FRONT_R); 2012 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_HPHONE_L); 2013 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_HPHONE_R); 2014 2015 /* rec output to "ADC" */ 2016 /* volume controlled by AC97 emulation */ 2017 EFX_OUTPUT(NULL, C_REC_L, M_MASTER_REC_L, A_OUT_ADC_REC_L, 100); 2018 EFX_OUTPUT(NULL, C_REC_R, M_MASTER_REC_R, A_OUT_ADC_REC_R, 100); 2019 2020 if (!(sc->mch_disabled)) { 2021 /* 2022 * Additional channel volume is controlled by mixer in 2023 * emu_dspmixer_set() in -pcm.c 2024 */ 2025 2026 /* fx2/3 (pcm1) to rear */ 2027 EFX_CACHE(C_REAR_L); 2028 EFX_CACHE(C_REAR_R); 2029 EFX_ROUTE(NULL, FX(2), M_FX2_REAR_L, C_REAR_L, 100); 2030 EFX_ROUTE(NULL, FX(3), M_FX3_REAR_R, C_REAR_R, 100); 2031 2032 EFX_OUTPUT(NULL, C_REAR_L, M_MASTER_REAR_L, A_OUT_A_REAR_L, 100); 2033 EFX_OUTPUT(NULL, C_REAR_R, M_MASTER_REAR_R, A_OUT_A_REAR_R, 100); 2034 EFX_OUTPUTD(C_REAR_L, M_MASTER_REAR_L, A_OUT_D_REAR_L); 2035 EFX_OUTPUTD(C_REAR_R, M_MASTER_REAR_R, A_OUT_D_REAR_R); 2036 2037 /* fx4 (pcm2) to center */ 2038 EFX_CACHE(C_CENTER); 2039 EFX_ROUTE(NULL, FX(4), M_FX4_CENTER, C_CENTER, 100); 2040 EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, A_OUT_D_CENTER, 100); 2041#if 0 2042 /* 2043 * XXX in digital mode (default) this should be muted 2044 * because this output is shared with digital out 2045 */ 2046 EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, A_OUT_A_CENTER); 2047#endif 2048 /* fx5 (pcm3) to sub */ 2049 EFX_CACHE(C_SUB); 2050 EFX_ROUTE(NULL, FX(5), M_FX5_SUBWOOFER, C_SUB, 100); 2051 EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, A_OUT_D_SUB, 100); 2052#if 0 2053 /* 2054 * XXX in digital mode (default) this should be muted 2055 * because this output is shared with digital out 2056 */ 2057 EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, A_OUT_A_SUB); 2058#endif 2059 if (sc->has_71) { 2060 /* XXX this will broke headphones on AudigyDrive */ 2061 /* fx6/7 (pcm4) to side */ 2062 EFX_CACHE(C_SIDE_L); 2063 EFX_CACHE(C_SIDE_R); 2064 EFX_ROUTE(NULL, FX(6), M_FX6_SIDE_L, C_SIDE_L, 100); 2065 EFX_ROUTE(NULL, FX(7), M_FX7_SIDE_R, C_SIDE_R, 100); 2066 EFX_OUTPUT(NULL, C_SIDE_L, M_MASTER_SIDE_L, A_OUT_A_SIDE_L, 100); 2067 EFX_OUTPUT(NULL, C_SIDE_R, M_MASTER_SIDE_R, A_OUT_A_SIDE_R, 100); 2068 EFX_OUTPUTD(C_SIDE_L, M_MASTER_SIDE_L, A_OUT_D_SIDE_L); 2069 EFX_OUTPUTD(C_SIDE_R, M_MASTER_SIDE_R, A_OUT_D_SIDE_R); 2070 } 2071 } else { /* mch_disabled */ 2072 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_A_REAR_L); 2073 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_A_REAR_R); 2074 2075 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_D_REAR_L); 2076 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_D_REAR_R); 2077 2078 if (sc->has_51) { 2079 /* (fx0+fx1)/2 to center */ 2080 EFX_CACHE(C_CENTER); 2081 emu_addefxop(sc, MACS, 2082 GPR(sc->cache_gpr[C_CENTER]), 2083 GPR(sc->cache_gpr[C_CENTER]), 2084 DSP_CONST(0xd), /* = 1/2 */ 2085 GPR(sc->cache_gpr[C_FRONT_L]), 2086 &pc); 2087 emu_addefxop(sc, MACS, 2088 GPR(sc->cache_gpr[C_CENTER]), 2089 GPR(sc->cache_gpr[C_CENTER]), 2090 DSP_CONST(0xd), /* = 1/2 */ 2091 GPR(sc->cache_gpr[C_FRONT_R]), 2092 &pc); 2093 EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, A_OUT_D_CENTER, 100); 2094 2095 /* XXX in digital mode (default) this should be muted because 2096 this output is shared with digital out */ 2097 EFX_SKIP(1, ANALOGMUTE); 2098 EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, A_OUT_A_CENTER); 2099 2100 /* (fx0+fx1)/2 to sub */ 2101 EFX_CACHE(C_SUB); 2102 emu_addefxop(sc, MACS, 2103 GPR(sc->cache_gpr[C_SUB]), 2104 GPR(sc->cache_gpr[C_SUB]), 2105 DSP_CONST(0xd), /* = 1/2 */ 2106 GPR(sc->cache_gpr[C_FRONT_L]), 2107 &pc); 2108 emu_addefxop(sc, MACS, 2109 GPR(sc->cache_gpr[C_SUB]), 2110 GPR(sc->cache_gpr[C_SUB]), 2111 DSP_CONST(0xd), /* = 1/2 */ 2112 GPR(sc->cache_gpr[C_FRONT_R]), 2113 &pc); 2114 /* XXX add lowpass filter here */ 2115 2116 EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, A_OUT_D_SUB, 100); 2117 2118 /* XXX in digital mode (default) this should be muted because 2119 this output is shared with digital out */ 2120 EFX_SKIP(1, ANALOGMUTE); 2121 EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, A_OUT_A_SUB); 2122 } 2123 } /* mch_disabled */ 2124 if (sc->mch_rec) { 2125 /* MCH RECORDING, high 32 slots */ 2126 2127 /* 2128 * Stream map (in byte offsets): 2129 * 0x00..0x3E - outputs 2130 * 0x40..0x7E - FX, inputs 2131 * each substream is 2 bytes. 2132 */ 2133 /* 2134 * XXX Audigy 2 Value cards (and, possibly, 2135 * Audigy 4) write some unknown data in place of 2136 * some outputs (offsets 0x20..0x3F) and one 2137 * input (offset 0x7E). 2138 */ 2139 2140 /* PCM Playback monitoring, offsets 0x40..0x5E */ 2141 for(i = 0; i < 16; i++) 2142 EFX_COPY(FX2(i), FX(i)); 2143 2144 /* Copy of all inputs, offsets 0x60..0x7E */ 2145 for(i = 0; i < 16; i++) 2146 EFX_COPY(FX2(i+16), INP(i)); 2147#if 0 2148 /* XXX Audigy seems to work correct and does not need this */ 2149 /* sync data (0xc0de), offset 0x7E */ 2150 sc->dummy_gpr = emu_rm_gpr_alloc(sc->rm, 1); 2151 emumix_set_gpr(sc, sc->dummy_gpr, 0xc0de0000); 2152 EFX_COPY(FX2(31), GPR(sc->dummy_gpr)); 2153#endif 2154 } /* mch_rec */ 2155 } 2156 2157 sc->routing_code_end = pc; 2158 2159 /* start DSP */ 2160 if (sc->is_emu10k1) { 2161 emu_wrptr(sc, 0, EMU_DBG, 0); 2162 } else { 2163 emu_wrptr(sc, 0, EMU_A_DBG, 0); 2164 } 2165} 2166 2167/* /dev/em10kx */ 2168static d_open_t emu10kx_open; 2169static d_close_t emu10kx_close; 2170static d_read_t emu10kx_read; 2171 2172static struct cdevsw emu10kx_cdevsw = { 2173 .d_open = emu10kx_open, 2174 .d_close = emu10kx_close, 2175 .d_read = emu10kx_read, 2176 .d_name = "emu10kx", 2177 .d_version = D_VERSION, 2178}; 2179 2180static int 2181emu10kx_open(struct cdev *i_dev, int flags __unused, int mode __unused, struct thread *td __unused) 2182{ 2183 int error; 2184 struct emu_sc_info *sc; 2185 2186 sc = i_dev->si_drv1; 2187 mtx_lock(&sc->emu10kx_lock); 2188 if (sc->emu10kx_isopen) { 2189 mtx_unlock(&sc->emu10kx_lock); 2190 return (EBUSY); 2191 } 2192 sc->emu10kx_isopen = 1; 2193 mtx_unlock(&sc->emu10kx_lock); 2194 if (sbuf_new(&sc->emu10kx_sbuf, NULL, 4096, 0) == NULL) { 2195 error = ENXIO; 2196 goto out; 2197 } 2198 sc->emu10kx_bufptr = 0; 2199 error = (emu10kx_prepare(sc, &sc->emu10kx_sbuf) > 0) ? 0 : ENOMEM; 2200out: 2201 if (error) { 2202 mtx_lock(&sc->emu10kx_lock); 2203 sc->emu10kx_isopen = 0; 2204 mtx_unlock(&sc->emu10kx_lock); 2205 } 2206 return (error); 2207} 2208 2209static int 2210emu10kx_close(struct cdev *i_dev, int flags __unused, int mode __unused, struct thread *td __unused) 2211{ 2212 struct emu_sc_info *sc; 2213 2214 sc = i_dev->si_drv1; 2215 2216 mtx_lock(&sc->emu10kx_lock); 2217 if (!(sc->emu10kx_isopen)) { 2218 mtx_unlock(&sc->emu10kx_lock); 2219 return (EBADF); 2220 } 2221 sbuf_delete(&sc->emu10kx_sbuf); 2222 sc->emu10kx_isopen = 0; 2223 mtx_unlock(&sc->emu10kx_lock); 2224 2225 return (0); 2226} 2227 2228static int 2229emu10kx_read(struct cdev *i_dev, struct uio *buf, int flag __unused) 2230{ 2231 int l, err; 2232 struct emu_sc_info *sc; 2233 2234 sc = i_dev->si_drv1; 2235 mtx_lock(&sc->emu10kx_lock); 2236 if (!(sc->emu10kx_isopen)) { 2237 mtx_unlock(&sc->emu10kx_lock); 2238 return (EBADF); 2239 } 2240 mtx_unlock(&sc->emu10kx_lock); 2241 2242 l = min(buf->uio_resid, sbuf_len(&sc->emu10kx_sbuf) - sc->emu10kx_bufptr); 2243 err = (l > 0) ? uiomove(sbuf_data(&sc->emu10kx_sbuf) + sc->emu10kx_bufptr, l, buf) : 0; 2244 sc->emu10kx_bufptr += l; 2245 2246 return (err); 2247} 2248 2249static int 2250emu10kx_prepare(struct emu_sc_info *sc, struct sbuf *s) 2251{ 2252 int i; 2253 2254 sbuf_printf(s, "FreeBSD EMU10Kx Audio Driver\n"); 2255 sbuf_printf(s, "\nHardware resource usage:\n"); 2256 sbuf_printf(s, "DSP General Purpose Registers: %d used, %d total\n", sc->rm->num_used, sc->rm->num_gprs); 2257 sbuf_printf(s, "DSP Instruction Registers: %d used, %d total\n", sc->routing_code_end, sc->code_size); 2258 sbuf_printf(s, "Card supports"); 2259 if (sc->has_ac97) { 2260 sbuf_printf(s, " AC97 codec"); 2261 } else { 2262 sbuf_printf(s, " NO AC97 codec"); 2263 } 2264 if (sc->has_51) { 2265 if (sc->has_71) 2266 sbuf_printf(s, " and 7.1 output"); 2267 else 2268 sbuf_printf(s, " and 5.1 output"); 2269 } 2270 if (sc->is_emu10k1) 2271 sbuf_printf(s, ", SBLive! DSP code"); 2272 if (sc->is_emu10k2) 2273 sbuf_printf(s, ", Audigy DSP code"); 2274 if (sc->is_ca0102) 2275 sbuf_printf(s, ", Audigy DSP code with Audigy2 hacks"); 2276 if (sc->is_ca0108) 2277 sbuf_printf(s, ", Audigy DSP code with Audigy2Value hacks"); 2278 sbuf_printf(s, "\n"); 2279 if (sc->broken_digital) 2280 sbuf_printf(s, "Digital mode unsupported\n"); 2281 sbuf_printf(s, "\nInstalled devices:\n"); 2282 for (i = 0; i < RT_COUNT; i++) 2283 if (sc->pcm[i] != NULL) 2284 if (device_is_attached(sc->pcm[i])) { 2285 sbuf_printf(s, "%s on %s\n", device_get_desc(sc->pcm[i]), device_get_nameunit(sc->pcm[i])); 2286 } 2287 if (sc->midi[0] != NULL) 2288 if (device_is_attached(sc->midi[0])) { 2289 sbuf_printf(s, "EMU10Kx MIDI Interface\n"); 2290 sbuf_printf(s, "\tOn-card connector on %s\n", device_get_nameunit(sc->midi[0])); 2291 } 2292 if (sc->midi[1] != NULL) 2293 if (device_is_attached(sc->midi[1])) { 2294 sbuf_printf(s, "\tOn-Drive connector on %s\n", device_get_nameunit(sc->midi[1])); 2295 } 2296 if (sc->midi[0] != NULL) 2297 if (device_is_attached(sc->midi[0])) { 2298 sbuf_printf(s, "\tIR receiver MIDI events %s\n", sc->enable_ir ? "enabled" : "disabled"); 2299 } 2300 sbuf_printf(s, "Card is in %s mode\n", (sc->mode == MODE_ANALOG) ? "analog" : "digital"); 2301 2302 sbuf_finish(s); 2303 return (sbuf_len(s)); 2304} 2305 2306/* INIT & UNINIT */ 2307static int 2308emu10kx_dev_init(struct emu_sc_info *sc) 2309{ 2310 int unit; 2311 2312 mtx_init(&sc->emu10kx_lock, device_get_nameunit(sc->dev), "kxdevlock", 0); 2313 unit = device_get_unit(sc->dev); 2314 2315 sc->cdev = make_dev(&emu10kx_cdevsw, unit, UID_ROOT, GID_WHEEL, 0640, "emu10kx%d", unit); 2316 if (sc->cdev != NULL) { 2317 sc->cdev->si_drv1 = sc; 2318 return (0); 2319 } 2320 return (ENXIO); 2321} 2322 2323static int 2324emu10kx_dev_uninit(struct emu_sc_info *sc) 2325{ 2326 mtx_lock(&sc->emu10kx_lock); 2327 if (sc->emu10kx_isopen) { 2328 mtx_unlock(&sc->emu10kx_lock); 2329 return (EBUSY); 2330 } 2331 if (sc->cdev) 2332 destroy_dev(sc->cdev); 2333 sc->cdev = NULL; 2334 2335 mtx_destroy(&sc->emu10kx_lock); 2336 return (0); 2337} 2338 2339/* resource manager */ 2340int 2341emu_rm_init(struct emu_sc_info *sc) 2342{ 2343 int i; 2344 int maxcount; 2345 struct emu_rm *rm; 2346 2347 rm = malloc(sizeof(struct emu_rm), M_DEVBUF, M_NOWAIT | M_ZERO); 2348 if (rm == NULL) { 2349 return (ENOMEM); 2350 } 2351 sc->rm = rm; 2352 rm->card = sc; 2353 maxcount = sc->num_gprs; 2354 rm->num_used = 0; 2355 mtx_init(&(rm->gpr_lock), device_get_nameunit(sc->dev), "gpr alloc", MTX_DEF); 2356 rm->num_gprs = (maxcount < EMU_MAX_GPR ? maxcount : EMU_MAX_GPR); 2357 for (i = 0; i < rm->num_gprs; i++) 2358 rm->allocmap[i] = 0; 2359 /* pre-allocate gpr[0] */ 2360 rm->allocmap[0] = 1; 2361 rm->last_free_gpr = 1; 2362 2363 return (0); 2364} 2365 2366int 2367emu_rm_uninit(struct emu_sc_info *sc) 2368{ 2369 int i; 2370 2371 if (sc->dbg_level > 1) { 2372 mtx_lock(&(sc->rm->gpr_lock)); 2373 for (i = 1; i < sc->rm->last_free_gpr; i++) 2374 if (sc->rm->allocmap[i] > 0) 2375 device_printf(sc->dev, "rm: gpr %d not free before uninit\n", i); 2376 mtx_unlock(&(sc->rm->gpr_lock)); 2377 } 2378 2379 mtx_destroy(&(sc->rm->gpr_lock)); 2380 free(sc->rm, M_DEVBUF); 2381 return (0); 2382} 2383 2384static int 2385emu_rm_gpr_alloc(struct emu_rm *rm, int count) 2386{ 2387 int i, j; 2388 int allocated_gpr; 2389 2390 allocated_gpr = rm->num_gprs; 2391 /* try fast way first */ 2392 mtx_lock(&(rm->gpr_lock)); 2393 if (rm->last_free_gpr + count <= rm->num_gprs) { 2394 allocated_gpr = rm->last_free_gpr; 2395 rm->last_free_gpr += count; 2396 rm->allocmap[allocated_gpr] = count; 2397 for (i = 1; i < count; i++) 2398 rm->allocmap[allocated_gpr + i] = -(count - i); 2399 } else { 2400 /* longer */ 2401 i = 0; 2402 allocated_gpr = rm->num_gprs; 2403 while (i < rm->last_free_gpr - count) { 2404 if (rm->allocmap[i] > 0) { 2405 i += rm->allocmap[i]; 2406 } else { 2407 allocated_gpr = i; 2408 for (j = 1; j < count; j++) { 2409 if (rm->allocmap[i + j] != 0) 2410 allocated_gpr = rm->num_gprs; 2411 } 2412 if (allocated_gpr == i) 2413 break; 2414 } 2415 } 2416 if (allocated_gpr + count < rm->last_free_gpr) { 2417 rm->allocmap[allocated_gpr] = count; 2418 for (i = 1; i < count; i++) 2419 rm->allocmap[allocated_gpr + i] = -(count - i); 2420 } 2421 } 2422 if (allocated_gpr == rm->num_gprs) 2423 allocated_gpr = (-1); 2424 if (allocated_gpr >= 0) 2425 rm->num_used += count; 2426 mtx_unlock(&(rm->gpr_lock)); 2427 return (allocated_gpr); 2428} 2429 2430/* mixer */ 2431void 2432emumix_set_mode(struct emu_sc_info *sc, int mode) 2433{ 2434 uint32_t a_iocfg; 2435 uint32_t hcfg; 2436 uint32_t tmp; 2437 2438 switch (mode) { 2439 case MODE_DIGITAL: 2440 /* FALLTHROUGH */ 2441 case MODE_ANALOG: 2442 break; 2443 default: 2444 return; 2445 } 2446 2447 hcfg = EMU_HCFG_AUDIOENABLE | EMU_HCFG_AUTOMUTE; 2448 a_iocfg = 0; 2449 2450 if (sc->rev >= 6) 2451 hcfg |= EMU_HCFG_JOYENABLE; 2452 2453 if (sc->is_emu10k1) 2454 hcfg |= EMU_HCFG_LOCKTANKCACHE_MASK; 2455 else 2456 hcfg |= EMU_HCFG_CODECFMT_I2S | EMU_HCFG_JOYENABLE; 2457 2458 if (mode == MODE_DIGITAL) { 2459 if (sc->broken_digital) { 2460 device_printf(sc->dev, "Digital mode is reported as broken on this card.\n"); 2461 } 2462 a_iocfg |= EMU_A_IOCFG_GPOUT1; 2463 hcfg |= EMU_HCFG_GPOUT0; 2464 } 2465 2466 if (mode == MODE_ANALOG) 2467 emumix_set_spdif_mode(sc, SPDIF_MODE_PCM); 2468 2469 if (sc->is_emu10k2) 2470 a_iocfg |= 0x80; /* XXX */ 2471 2472 if ((sc->is_ca0102) || (sc->is_ca0108)) 2473 /* 2474 * Setting EMU_A_IOCFG_DISABLE_ANALOG will do opposite things 2475 * on diffrerent cards. 2476 * "don't disable analog outs" on Audigy 2 (ca0102/ca0108) 2477 * "disable analog outs" on Audigy (emu10k2) 2478 */ 2479 a_iocfg |= EMU_A_IOCFG_DISABLE_ANALOG; 2480 2481 if (sc->is_ca0108) 2482 a_iocfg |= 0x20; /* XXX */ 2483 2484 /* Mute analog center & subwoofer before mode change */ 2485 if (mode == MODE_DIGITAL) 2486 emumix_set_gpr(sc, sc->mute_gpr[ANALOGMUTE], 1); 2487 2488 emu_wr(sc, EMU_HCFG, hcfg, 4); 2489 2490 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) { 2491 tmp = emu_rd(sc, EMU_A_IOCFG, 2); 2492 tmp = a_iocfg; 2493 emu_wr(sc, EMU_A_IOCFG, tmp, 2); 2494 } 2495 2496 /* Unmute if we have changed mode to analog. */ 2497 2498 if (mode == MODE_ANALOG) 2499 emumix_set_gpr(sc, sc->mute_gpr[ANALOGMUTE], 0); 2500 2501 sc->mode = mode; 2502} 2503 2504void 2505emumix_set_spdif_mode(struct emu_sc_info *sc, int mode) 2506{ 2507 uint32_t spcs; 2508 2509 switch (mode) { 2510 case SPDIF_MODE_PCM: 2511 break; 2512 case SPDIF_MODE_AC3: 2513 device_printf(sc->dev, "AC3 mode does not work and disabled\n"); 2514 return; 2515 default: 2516 return; 2517 } 2518 2519 spcs = EMU_SPCS_CLKACCY_1000PPM | EMU_SPCS_SAMPLERATE_48 | 2520 EMU_SPCS_CHANNELNUM_LEFT | EMU_SPCS_SOURCENUM_UNSPEC | 2521 EMU_SPCS_GENERATIONSTATUS | 0x00001200 | 0x00000000 | 2522 EMU_SPCS_EMPHASIS_NONE | EMU_SPCS_COPYRIGHT; 2523 2524 mode = SPDIF_MODE_PCM; 2525 2526 emu_wrptr(sc, 0, EMU_SPCS0, spcs); 2527 emu_wrptr(sc, 0, EMU_SPCS1, spcs); 2528 emu_wrptr(sc, 0, EMU_SPCS2, spcs); 2529} 2530 2531#define L2L_POINTS 10 2532 2533static int l2l_df[L2L_POINTS] = { 2534 0x572C5CA, /* 100..90 */ 2535 0x3211625, /* 90..80 */ 2536 0x1CC1A76, /* 80..70 */ 2537 0x108428F, /* 70..60 */ 2538 0x097C70A, /* 60..50 */ 2539 0x0572C5C, /* 50..40 */ 2540 0x0321162, /* 40..30 */ 2541 0x01CC1A7, /* 30..20 */ 2542 0x0108428, /* 20..10 */ 2543 0x016493D /* 10..0 */ 2544}; 2545 2546static int l2l_f[L2L_POINTS] = { 2547 0x4984461A, /* 90 */ 2548 0x2A3968A7, /* 80 */ 2549 0x18406003, /* 70 */ 2550 0x0DEDC66D, /* 60 */ 2551 0x07FFFFFF, /* 50 */ 2552 0x04984461, /* 40 */ 2553 0x02A3968A, /* 30 */ 2554 0x01840600, /* 20 */ 2555 0x00DEDC66, /* 10 */ 2556 0x00000000 /* 0 */ 2557}; 2558 2559static int 2560log2lin(int log_t) 2561{ 2562 int lin_t; 2563 int idx, lin; 2564 2565 if (log_t <= 0) { 2566 lin_t = 0x00000000; 2567 return (lin_t); 2568 } 2569 2570 if (log_t >= 100) { 2571 lin_t = 0x7fffffff; 2572 return (lin_t); 2573 } 2574 2575 idx = (L2L_POINTS - 1) - log_t / (L2L_POINTS); 2576 lin = log_t % (L2L_POINTS); 2577 lin_t = l2l_df[idx] * lin + l2l_f[idx]; 2578 return (lin_t); 2579} 2580 2581void 2582emumix_set_fxvol(struct emu_sc_info *sc, unsigned gpr, int32_t vol) 2583{ 2584 2585 vol = log2lin(vol); 2586 emumix_set_gpr(sc, gpr, vol); 2587} 2588 2589void 2590emumix_set_gpr(struct emu_sc_info *sc, unsigned gpr, int32_t val) 2591{ 2592 if (sc->dbg_level > 1) 2593 if (gpr == 0) { 2594 device_printf(sc->dev, "Zero gpr write access\n"); 2595#ifdef KDB 2596 kdb_backtrace(); 2597#endif 2598 return; 2599 } 2600 2601 emu_wrptr(sc, 0, GPR(gpr), val); 2602} 2603 2604void 2605emumix_set_volume(struct emu_sc_info *sc, int mixer_idx, int volume) 2606{ 2607 2608 RANGE(volume, 0, 100); 2609 if (mixer_idx < NUM_MIXERS) { 2610 sc->mixer_volcache[mixer_idx] = volume; 2611 emumix_set_fxvol(sc, sc->mixer_gpr[mixer_idx], volume); 2612 } 2613} 2614 2615int 2616emumix_get_volume(struct emu_sc_info *sc, int mixer_idx) 2617{ 2618 if ((mixer_idx < NUM_MIXERS) && (mixer_idx >= 0)) 2619 return (sc->mixer_volcache[mixer_idx]); 2620 return (-1); 2621} 2622 2623/* Init CardBus part */ 2624static int 2625emu_cardbus_init(struct emu_sc_info *sc) 2626{ 2627 2628 /* 2629 * XXX May not need this if we have EMU_IPR3 handler. 2630 * Is it a real init calls, or EMU_IPR3 interrupt acknowledgments? 2631 * Looks much like "(data << 16) | register". 2632 */ 2633 emu_wr_cbptr(sc, (0x00d0 << 16) | 0x0000); 2634 emu_wr_cbptr(sc, (0x00d0 << 16) | 0x0001); 2635 emu_wr_cbptr(sc, (0x00d0 << 16) | 0x005f); 2636 emu_wr_cbptr(sc, (0x00d0 << 16) | 0x007f); 2637 2638 emu_wr_cbptr(sc, (0x0090 << 16) | 0x007f); 2639 2640 return (0); 2641} 2642 2643/* Probe and attach the card */ 2644static int 2645emu_init(struct emu_sc_info *sc) 2646{ 2647 uint32_t ch, tmp; 2648 uint32_t spdif_sr; 2649 uint32_t ac97slot; 2650 int def_mode; 2651 int i; 2652 2653 /* disable audio and lock cache */ 2654 emu_wr(sc, EMU_HCFG, EMU_HCFG_LOCKSOUNDCACHE | EMU_HCFG_LOCKTANKCACHE_MASK | EMU_HCFG_MUTEBUTTONENABLE, 4); 2655 2656 /* reset recording buffers */ 2657 emu_wrptr(sc, 0, EMU_MICBS, EMU_RECBS_BUFSIZE_NONE); 2658 emu_wrptr(sc, 0, EMU_MICBA, 0); 2659 emu_wrptr(sc, 0, EMU_FXBS, EMU_RECBS_BUFSIZE_NONE); 2660 emu_wrptr(sc, 0, EMU_FXBA, 0); 2661 emu_wrptr(sc, 0, EMU_ADCBS, EMU_RECBS_BUFSIZE_NONE); 2662 emu_wrptr(sc, 0, EMU_ADCBA, 0); 2663 2664 /* disable channel interrupt */ 2665 emu_wr(sc, EMU_INTE, EMU_INTE_INTERTIMERENB | EMU_INTE_SAMPLERATER | EMU_INTE_PCIERRENABLE, 4); 2666 emu_wrptr(sc, 0, EMU_CLIEL, 0); 2667 emu_wrptr(sc, 0, EMU_CLIEH, 0); 2668 emu_wrptr(sc, 0, EMU_SOLEL, 0); 2669 emu_wrptr(sc, 0, EMU_SOLEH, 0); 2670 2671 /* disable P16V and S/PDIF interrupts */ 2672 if ((sc->is_ca0102) || (sc->is_ca0108)) 2673 emu_wr(sc, EMU_INTE2, 0, 4); 2674 2675 if (sc->is_ca0102) 2676 emu_wr(sc, EMU_INTE3, 0, 4); 2677 2678 /* init phys inputs and outputs */ 2679 ac97slot = 0; 2680 if (sc->has_51) 2681 ac97slot = EMU_AC97SLOT_CENTER | EMU_AC97SLOT_LFE; 2682 if (sc->has_71) 2683 ac97slot = EMU_AC97SLOT_CENTER | EMU_AC97SLOT_LFE | EMU_AC97SLOT_REAR_LEFT | EMU_AC97SLOT_REAR_RIGHT; 2684 if (sc->is_emu10k2) 2685 ac97slot |= 0x40; 2686 emu_wrptr(sc, 0, EMU_AC97SLOT, ac97slot); 2687 2688 if (sc->is_emu10k2) /* XXX for later cards? */ 2689 emu_wrptr(sc, 0, EMU_SPBYPASS, 0xf00); /* What will happen if 2690 * we write 1 here? */ 2691 2692 if (bus_dma_tag_create( /* parent */ bus_get_dma_tag(sc->dev), 2693 /* alignment */ 2, /* boundary */ 0, 2694 /* lowaddr */ (1U << 31) - 1, /* can only access 0-2gb */ 2695 /* highaddr */ BUS_SPACE_MAXADDR, 2696 /* filter */ NULL, /* filterarg */ NULL, 2697 /* maxsize */ EMU_MAX_BUFSZ, /* nsegments */ 1, /* maxsegz */ 0x3ffff, 2698 /* flags */ 0, /* lockfunc */NULL, /* lockarg */NULL, 2699 &sc->mem.dmat) != 0) { 2700 device_printf(sc->dev, "unable to create dma tag\n"); 2701 bus_dma_tag_destroy(sc->mem.dmat); 2702 return (ENOMEM); 2703 } 2704 2705 sc->mem.card = sc; 2706 SLIST_INIT(&sc->mem.blocks); 2707 sc->mem.ptb_pages = emu_malloc(&sc->mem, EMU_MAXPAGES * sizeof(uint32_t), &sc->mem.ptb_pages_addr, &sc->mem.ptb_map); 2708 if (sc->mem.ptb_pages == NULL) 2709 return (ENOMEM); 2710 2711 sc->mem.silent_page = emu_malloc(&sc->mem, EMUPAGESIZE, &sc->mem.silent_page_addr, &sc->mem.silent_map); 2712 if (sc->mem.silent_page == NULL) { 2713 emu_free(&sc->mem, sc->mem.ptb_pages, sc->mem.ptb_map); 2714 return (ENOMEM); 2715 } 2716 /* Clear page with silence & setup all pointers to this page */ 2717 bzero(sc->mem.silent_page, EMUPAGESIZE); 2718 tmp = (uint32_t) (sc->mem.silent_page_addr) << 1; 2719 for (i = 0; i < EMU_MAXPAGES; i++) 2720 sc->mem.ptb_pages[i] = tmp | i; 2721 2722 for (ch = 0; ch < NUM_G; ch++) { 2723 emu_wrptr(sc, ch, EMU_CHAN_MAPA, tmp | EMU_CHAN_MAP_PTI_MASK); 2724 emu_wrptr(sc, ch, EMU_CHAN_MAPB, tmp | EMU_CHAN_MAP_PTI_MASK); 2725 } 2726 emu_wrptr(sc, 0, EMU_PTB, (sc->mem.ptb_pages_addr)); 2727 emu_wrptr(sc, 0, EMU_TCB, 0); /* taken from original driver */ 2728 emu_wrptr(sc, 0, EMU_TCBS, 0); /* taken from original driver */ 2729 2730 /* init envelope engine */ 2731 for (ch = 0; ch < NUM_G; ch++) { 2732 emu_wrptr(sc, ch, EMU_CHAN_DCYSUSV, 0); 2733 emu_wrptr(sc, ch, EMU_CHAN_IP, 0); 2734 emu_wrptr(sc, ch, EMU_CHAN_VTFT, 0xffff); 2735 emu_wrptr(sc, ch, EMU_CHAN_CVCF, 0xffff); 2736 emu_wrptr(sc, ch, EMU_CHAN_PTRX, 0); 2737 emu_wrptr(sc, ch, EMU_CHAN_CPF, 0); 2738 emu_wrptr(sc, ch, EMU_CHAN_CCR, 0); 2739 2740 emu_wrptr(sc, ch, EMU_CHAN_PSST, 0); 2741 emu_wrptr(sc, ch, EMU_CHAN_DSL, 0x10); 2742 emu_wrptr(sc, ch, EMU_CHAN_CCCA, 0); 2743 emu_wrptr(sc, ch, EMU_CHAN_Z1, 0); 2744 emu_wrptr(sc, ch, EMU_CHAN_Z2, 0); 2745 emu_wrptr(sc, ch, EMU_CHAN_FXRT, 0xd01c0000); 2746 2747 emu_wrptr(sc, ch, EMU_CHAN_ATKHLDM, 0); 2748 emu_wrptr(sc, ch, EMU_CHAN_DCYSUSM, 0); 2749 emu_wrptr(sc, ch, EMU_CHAN_IFATN, 0xffff); 2750 emu_wrptr(sc, ch, EMU_CHAN_PEFE, 0); 2751 emu_wrptr(sc, ch, EMU_CHAN_FMMOD, 0); 2752 emu_wrptr(sc, ch, EMU_CHAN_TREMFRQ, 24); /* 1 Hz */ 2753 emu_wrptr(sc, ch, EMU_CHAN_FM2FRQ2, 24); /* 1 Hz */ 2754 emu_wrptr(sc, ch, EMU_CHAN_TEMPENV, 0); 2755 2756 /*** these are last so OFF prevents writing ***/ 2757 emu_wrptr(sc, ch, EMU_CHAN_LFOVAL2, 0); 2758 emu_wrptr(sc, ch, EMU_CHAN_LFOVAL1, 0); 2759 emu_wrptr(sc, ch, EMU_CHAN_ATKHLDV, 0); 2760 emu_wrptr(sc, ch, EMU_CHAN_ENVVOL, 0); 2761 emu_wrptr(sc, ch, EMU_CHAN_ENVVAL, 0); 2762 2763 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) { 2764 emu_wrptr(sc, ch, 0x4c, 0x0); 2765 emu_wrptr(sc, ch, 0x4d, 0x0); 2766 emu_wrptr(sc, ch, 0x4e, 0x0); 2767 emu_wrptr(sc, ch, 0x4f, 0x0); 2768 emu_wrptr(sc, ch, EMU_A_CHAN_FXRT1, 0x3f3f3f3f); 2769 emu_wrptr(sc, ch, EMU_A_CHAN_FXRT2, 0x3f3f3f3f); 2770 emu_wrptr(sc, ch, EMU_A_CHAN_SENDAMOUNTS, 0x0); 2771 } 2772 } 2773 2774 emumix_set_spdif_mode(sc, SPDIF_MODE_PCM); 2775 2776 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) 2777 emu_wrptr(sc, 0, EMU_A_SPDIF_SAMPLERATE, EMU_A_SPDIF_48000); 2778 2779 /* 2780 * CAxxxx cards needs additional setup: 2781 * 1. Set I2S capture sample rate to 96000 2782 * 2. Disable P16v / P17v proceesing 2783 * 3. Allow EMU10K DSP inputs 2784 */ 2785 if ((sc->is_ca0102) || (sc->is_ca0108)) { 2786 spdif_sr = emu_rdptr(sc, 0, EMU_A_SPDIF_SAMPLERATE); 2787 spdif_sr &= 0xfffff1ff; 2788 spdif_sr |= EMU_A_I2S_CAPTURE_96000; 2789 emu_wrptr(sc, 0, EMU_A_SPDIF_SAMPLERATE, spdif_sr); 2790 2791 /* Disable P16v processing */ 2792 emu_wr_p16vptr(sc, 0, EMU_A2_SRCSel, 0x14); 2793 2794 /* Setup P16v/P17v sound routing */ 2795 if (sc->is_ca0102) 2796 emu_wr_p16vptr(sc, 0, EMU_A2_SRCMULTI_ENABLE, 0xFF00FF00); 2797 else { 2798 emu_wr_p16vptr(sc, 0, EMU_A2_MIXER_I2S_ENABLE, 0xFF000000); 2799 emu_wr_p16vptr(sc, 0, EMU_A2_MIXER_SPDIF_ENABLE, 0xFF000000); 2800 2801 tmp = emu_rd(sc, EMU_A_IOCFG, 2); 2802 emu_wr(sc, EMU_A_IOCFG, tmp & ~0x8, 2); 2803 } 2804 } 2805 emu_initefx(sc); 2806 2807 def_mode = MODE_ANALOG; 2808 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) 2809 def_mode = MODE_DIGITAL; 2810 if (((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) && (sc->broken_digital)) { 2811 device_printf(sc->dev, "Audigy card initialized in analog mode.\n"); 2812 def_mode = MODE_ANALOG; 2813 } 2814 emumix_set_mode(sc, def_mode); 2815 2816 if (bootverbose) { 2817 tmp = emu_rd(sc, EMU_HCFG, 4); 2818 device_printf(sc->dev, "Card Configuration ( 0x%08x )\n", tmp); 2819 device_printf(sc->dev, "Card Configuration ( & 0xff000000 ) : %s%s%s%s%s%s%s%s\n", 2820 (tmp & 0x80000000 ? "[Legacy MPIC] " : ""), 2821 (tmp & 0x40000000 ? "[0x40] " : ""), 2822 (tmp & 0x20000000 ? "[0x20] " : ""), 2823 (tmp & 0x10000000 ? "[0x10] " : ""), 2824 (tmp & 0x08000000 ? "[0x08] " : ""), 2825 (tmp & 0x04000000 ? "[0x04] " : ""), 2826 (tmp & 0x02000000 ? "[0x02] " : ""), 2827 (tmp & 0x01000000 ? "[0x01]" : " ")); 2828 device_printf(sc->dev, "Card Configuration ( & 0x00ff0000 ) : %s%s%s%s%s%s%s%s\n", 2829 (tmp & 0x00800000 ? "[0x80] " : ""), 2830 (tmp & 0x00400000 ? "[0x40] " : ""), 2831 (tmp & 0x00200000 ? "[Legacy INT] " : ""), 2832 (tmp & 0x00100000 ? "[0x10] " : ""), 2833 (tmp & 0x00080000 ? "[0x08] " : ""), 2834 (tmp & 0x00040000 ? "[Codec4] " : ""), 2835 (tmp & 0x00020000 ? "[Codec2] " : ""), 2836 (tmp & 0x00010000 ? "[I2S Codec]" : " ")); 2837 device_printf(sc->dev, "Card Configuration ( & 0x0000ff00 ) : %s%s%s%s%s%s%s%s\n", 2838 (tmp & 0x00008000 ? "[0x80] " : ""), 2839 (tmp & 0x00004000 ? "[GPINPUT0] " : ""), 2840 (tmp & 0x00002000 ? "[GPINPUT1] " : ""), 2841 (tmp & 0x00001000 ? "[GPOUT0] " : ""), 2842 (tmp & 0x00000800 ? "[GPOUT1] " : ""), 2843 (tmp & 0x00000400 ? "[GPOUT2] " : ""), 2844 (tmp & 0x00000200 ? "[Joystick] " : ""), 2845 (tmp & 0x00000100 ? "[0x01]" : " ")); 2846 device_printf(sc->dev, "Card Configuration ( & 0x000000ff ) : %s%s%s%s%s%s%s%s\n", 2847 (tmp & 0x00000080 ? "[0x80] " : ""), 2848 (tmp & 0x00000040 ? "[0x40] " : ""), 2849 (tmp & 0x00000020 ? "[0x20] " : ""), 2850 (tmp & 0x00000010 ? "[AUTOMUTE] " : ""), 2851 (tmp & 0x00000008 ? "[LOCKSOUNDCACHE] " : ""), 2852 (tmp & 0x00000004 ? "[LOCKTANKCACHE] " : ""), 2853 (tmp & 0x00000002 ? "[MUTEBUTTONENABLE] " : ""), 2854 (tmp & 0x00000001 ? "[AUDIOENABLE]" : " ")); 2855 2856 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) { 2857 tmp = emu_rd(sc, EMU_A_IOCFG, 2); 2858 device_printf(sc->dev, "Audigy Card Configuration ( 0x%04x )\n", tmp); 2859 device_printf(sc->dev, "Audigy Card Configuration ( & 0xff00 )"); 2860 printf(" : %s%s%s%s%s%s%s%s\n", 2861 (tmp & 0x8000 ? "[Rear Speakers] " : ""), 2862 (tmp & 0x4000 ? "[Front Speakers] " : ""), 2863 (tmp & 0x2000 ? "[0x20] " : ""), 2864 (tmp & 0x1000 ? "[0x10] " : ""), 2865 (tmp & 0x0800 ? "[0x08] " : ""), 2866 (tmp & 0x0400 ? "[0x04] " : ""), 2867 (tmp & 0x0200 ? "[0x02] " : ""), 2868 (tmp & 0x0100 ? "[AudigyDrive Phones]" : " ")); 2869 device_printf(sc->dev, "Audigy Card Configuration ( & 0x00ff )"); 2870 printf(" : %s%s%s%s%s%s%s%s\n", 2871 (tmp & 0x0080 ? "[0x80] " : ""), 2872 (tmp & 0x0040 ? "[Mute AnalogOut] " : ""), 2873 (tmp & 0x0020 ? "[0x20] " : ""), 2874 (tmp & 0x0010 ? "[0x10] " : ""), 2875 (tmp & 0x0008 ? "[0x08] " : ""), 2876 (tmp & 0x0004 ? "[GPOUT0] " : ""), 2877 (tmp & 0x0002 ? "[GPOUT1] " : ""), 2878 (tmp & 0x0001 ? "[GPOUT2]" : " ")); 2879 } /* is_emu10k2 or ca* */ 2880 } /* bootverbose */ 2881 return (0); 2882} 2883 2884static int 2885emu_uninit(struct emu_sc_info *sc) 2886{ 2887 uint32_t ch; 2888 struct emu_memblk *blk; 2889 2890 emu_wr(sc, EMU_INTE, 0, 4); 2891 for (ch = 0; ch < NUM_G; ch++) 2892 emu_wrptr(sc, ch, EMU_CHAN_DCYSUSV, 0); 2893 for (ch = 0; ch < NUM_G; ch++) { 2894 emu_wrptr(sc, ch, EMU_CHAN_VTFT, 0); 2895 emu_wrptr(sc, ch, EMU_CHAN_CVCF, 0); 2896 emu_wrptr(sc, ch, EMU_CHAN_PTRX, 0); 2897 emu_wrptr(sc, ch, EMU_CHAN_CPF, 0); 2898 } 2899 2900 /* disable audio and lock cache */ 2901 emu_wr(sc, EMU_HCFG, EMU_HCFG_LOCKSOUNDCACHE | EMU_HCFG_LOCKTANKCACHE_MASK | EMU_HCFG_MUTEBUTTONENABLE, 4); 2902 2903 emu_wrptr(sc, 0, EMU_PTB, 0); 2904 /* reset recording buffers */ 2905 emu_wrptr(sc, 0, EMU_MICBS, EMU_RECBS_BUFSIZE_NONE); 2906 emu_wrptr(sc, 0, EMU_MICBA, 0); 2907 emu_wrptr(sc, 0, EMU_FXBS, EMU_RECBS_BUFSIZE_NONE); 2908 emu_wrptr(sc, 0, EMU_FXBA, 0); 2909 emu_wrptr(sc, 0, EMU_FXWC, 0); 2910 emu_wrptr(sc, 0, EMU_ADCBS, EMU_RECBS_BUFSIZE_NONE); 2911 emu_wrptr(sc, 0, EMU_ADCBA, 0); 2912 emu_wrptr(sc, 0, EMU_TCB, 0); 2913 emu_wrptr(sc, 0, EMU_TCBS, 0); 2914 2915 /* disable channel interrupt */ 2916 emu_wrptr(sc, 0, EMU_CLIEL, 0); 2917 emu_wrptr(sc, 0, EMU_CLIEH, 0); 2918 emu_wrptr(sc, 0, EMU_SOLEL, 0); 2919 emu_wrptr(sc, 0, EMU_SOLEH, 0); 2920 2921 if (!SLIST_EMPTY(&sc->mem.blocks)) 2922 device_printf(sc->dev, "warning: memblock list not empty\n"); 2923 2924 SLIST_FOREACH(blk, &sc->mem.blocks, link) 2925 if (blk != NULL) 2926 device_printf(sc->dev, "lost %d for %s\n", blk->pte_size, blk->owner); 2927 2928 emu_free(&sc->mem, sc->mem.ptb_pages, sc->mem.ptb_map); 2929 emu_free(&sc->mem, sc->mem.silent_page, sc->mem.silent_map); 2930 2931 return (0); 2932} 2933 2934static int 2935emu_read_ivar(device_t bus, device_t dev, int ivar_index, uintptr_t * result) 2936{ 2937 struct sndcard_func *func = device_get_ivars(dev); 2938 struct emu_sc_info *sc = device_get_softc(bus); 2939 2940 if (func==NULL) 2941 return (ENOMEM); 2942 if (sc == NULL) 2943 return (ENOMEM); 2944 2945 switch (ivar_index) { 2946 case EMU_VAR_FUNC: 2947 *result = func->func; 2948 break; 2949 case EMU_VAR_ROUTE: 2950 if (func->varinfo == NULL) 2951 return (ENOMEM); 2952 *result = ((struct emu_pcminfo *)func->varinfo)->route; 2953 break; 2954 case EMU_VAR_ISEMU10K1: 2955 *result = sc->is_emu10k1; 2956 break; 2957 case EMU_VAR_MCH_DISABLED: 2958 *result = sc->mch_disabled; 2959 break; 2960 case EMU_VAR_MCH_REC: 2961 *result = sc->mch_rec; 2962 break; 2963 default: 2964 return (ENOENT); 2965 } 2966 2967 return (0); 2968} 2969 2970static int 2971emu_write_ivar(device_t bus __unused, device_t dev __unused, 2972 int ivar_index, uintptr_t value __unused) 2973{ 2974 2975 switch (ivar_index) { 2976 case 0: 2977 return (EINVAL); 2978 2979 default: 2980 return (ENOENT); 2981 } 2982} 2983 2984static int 2985emu_pci_probe(device_t dev) 2986{ 2987 unsigned int thiscard = 0; 2988 uint16_t vendor; 2989 2990 vendor = pci_read_config(dev, PCIR_DEVVENDOR, /* bytes */ 2); 2991 if (vendor != 0x1102) 2992 return (ENXIO); /* Not Creative */ 2993 2994 thiscard = emu_getcard(dev); 2995 if (thiscard == 0) 2996 return (ENXIO); 2997 2998 device_set_descf(dev, "Creative %s [%s]", 2999 emu_cards[thiscard].desc, emu_cards[thiscard].SBcode); 3000 3001 return (BUS_PROBE_DEFAULT); 3002} 3003 3004static int 3005emu_pci_attach(device_t dev) 3006{ 3007 struct sndcard_func *func; 3008 struct emu_sc_info *sc; 3009 struct emu_pcminfo *pcminfo; 3010#if 0 3011 struct emu_midiinfo *midiinfo; 3012#endif 3013 int i; 3014 int device_flags; 3015 char status[255]; 3016 int error = ENXIO; 3017 int unit; 3018 3019 sc = device_get_softc(dev); 3020 unit = device_get_unit(dev); 3021 3022 /* Get configuration */ 3023 3024 sc->ctx = device_get_sysctl_ctx(dev); 3025 if (sc->ctx == NULL) 3026 goto bad; 3027 sc->root = device_get_sysctl_tree(dev); 3028 if (sc->root == NULL) 3029 goto bad; 3030 3031 if (resource_int_value("emu10kx", unit, "multichannel_disabled", &(sc->mch_disabled))) 3032 RANGE(sc->mch_disabled, 0, 1); 3033 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), 3034 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 3035 OID_AUTO, "multichannel_disabled", CTLFLAG_RD, &(sc->mch_disabled), 0, "Multichannel playback setting"); 3036 3037 if (resource_int_value("emu10kx", unit, "multichannel_recording", &(sc->mch_rec))) 3038 RANGE(sc->mch_rec, 0, 1); 3039 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), 3040 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 3041 OID_AUTO, "multichannel_recording", CTLFLAG_RD, &(sc->mch_rec), 0, "Multichannel recording setting"); 3042 3043 if (resource_int_value("emu10kx", unit, "debug", &(sc->dbg_level))) 3044 RANGE(sc->mch_rec, 0, 2); 3045 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), 3046 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 3047 OID_AUTO, "debug", CTLFLAG_RW, &(sc->dbg_level), 0, "Debug level"); 3048 3049 /* Fill in the softc. */ 3050 mtx_init(&sc->lock, device_get_nameunit(dev), "bridge conf", MTX_DEF); 3051 mtx_init(&sc->rw, device_get_nameunit(dev), "exclusive io", MTX_DEF); 3052 sc->dev = dev; 3053 sc->type = pci_get_devid(dev); 3054 sc->rev = pci_get_revid(dev); 3055 sc->enable_ir = 0; 3056 sc->has_ac97 = 0; 3057 sc->has_51 = 0; 3058 sc->has_71 = 0; 3059 sc->broken_digital = 0; 3060 sc->is_emu10k1 = 0; 3061 sc->is_emu10k2 = 0; 3062 sc->is_ca0102 = 0; 3063 sc->is_ca0108 = 0; 3064 sc->is_cardbus = 0; 3065 3066 device_flags = emu_cards[emu_getcard(dev)].flags; 3067 if (device_flags & HAS_51) 3068 sc->has_51 = 1; 3069 if (device_flags & HAS_71) { 3070 sc->has_51 = 1; 3071 sc->has_71 = 1; 3072 } 3073 if (device_flags & IS_EMU10K1) 3074 sc->is_emu10k1 = 1; 3075 if (device_flags & IS_EMU10K2) 3076 sc->is_emu10k2 = 1; 3077 if (device_flags & IS_CA0102) 3078 sc->is_ca0102 = 1; 3079 if (device_flags & IS_CA0108) 3080 sc->is_ca0108 = 1; 3081 if ((sc->is_emu10k2) && (sc->rev == 4)) { 3082 sc->is_emu10k2 = 0; 3083 sc->is_ca0102 = 1; /* for unknown Audigy 2 cards */ 3084 } 3085 if ((sc->is_ca0102 == 1) || (sc->is_ca0108 == 1)) 3086 if (device_flags & IS_CARDBUS) 3087 sc->is_cardbus = 1; 3088 3089 if ((sc->is_emu10k1 + sc->is_emu10k2 + sc->is_ca0102 + sc->is_ca0108) != 1) { 3090 device_printf(sc->dev, "Unable to detect HW chipset\n"); 3091 goto bad; 3092 } 3093 if (device_flags & BROKEN_DIGITAL) 3094 sc->broken_digital = 1; 3095 if (device_flags & HAS_AC97) 3096 sc->has_ac97 = 1; 3097 3098 sc->opcode_shift = 0; 3099 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) { 3100 sc->opcode_shift = 24; 3101 sc->high_operand_shift = 12; 3102 3103 /* DSP map */ 3104 /* sc->fx_base = 0x0 */ 3105 sc->input_base = 0x40; 3106 /* sc->p16vinput_base = 0x50; */ 3107 sc->output_base = 0x60; 3108 sc->efxc_base = 0x80; 3109 /* sc->output32h_base = 0xa0; */ 3110 /* sc->output32l_base = 0xb0; */ 3111 sc->dsp_zero = 0xc0; 3112 /* 0xe0...0x100 are unknown */ 3113 /* sc->tram_base = 0x200 */ 3114 /* sc->tram_addr_base = 0x300 */ 3115 sc->gpr_base = EMU_A_FXGPREGBASE; 3116 sc->num_gprs = 0x200; 3117 sc->code_base = EMU_A_MICROCODEBASE; 3118 sc->code_size = 0x800 / 2; /* 0x600-0xdff, 2048 words, 3119 * 1024 instructions */ 3120 3121 sc->mchannel_fx = 8; 3122 sc->num_fxbuses = 16; 3123 sc->num_inputs = 8; 3124 sc->num_outputs = 16; 3125 sc->address_mask = EMU_A_PTR_ADDR_MASK; 3126 } 3127 if (sc->is_emu10k1) { 3128 sc->has_51 = 0; /* We don't support 5.1 sound on SB Live! 5.1 */ 3129 sc->opcode_shift = 20; 3130 sc->high_operand_shift = 10; 3131 sc->code_base = EMU_MICROCODEBASE; 3132 sc->code_size = 0x400 / 2; /* 0x400-0x7ff, 1024 words, 3133 * 512 instructions */ 3134 sc->gpr_base = EMU_FXGPREGBASE; 3135 sc->num_gprs = 0x100; 3136 sc->input_base = 0x10; 3137 sc->output_base = 0x20; 3138 /* 3139 * XXX 5.1 Analog outputs are inside efxc address space! 3140 * They use output+0x11/+0x12 (=efxc+1/+2). 3141 * Don't use this efx registers for recording on SB Live! 5.1! 3142 */ 3143 sc->efxc_base = 0x30; 3144 sc->dsp_zero = 0x40; 3145 sc->mchannel_fx = 0; 3146 sc->num_fxbuses = 8; 3147 sc->num_inputs = 8; 3148 sc->num_outputs = 16; 3149 sc->address_mask = EMU_PTR_ADDR_MASK; 3150 } 3151 if (sc->opcode_shift == 0) 3152 goto bad; 3153 3154 pci_enable_busmaster(dev); 3155 3156 i = PCIR_BAR(0); 3157 sc->reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &i, RF_ACTIVE); 3158 if (sc->reg == NULL) { 3159 device_printf(dev, "unable to map register space\n"); 3160 goto bad; 3161 } 3162 sc->st = rman_get_bustag(sc->reg); 3163 sc->sh = rman_get_bushandle(sc->reg); 3164 3165 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) 3166 sc->timer[i] = 0; /* disable it */ 3167 3168 i = 0; 3169 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i, RF_ACTIVE | RF_SHAREABLE); 3170 if ((sc->irq == NULL) || bus_setup_intr(dev, sc->irq, INTR_MPSAFE | INTR_TYPE_AV, 3171 NULL, 3172 emu_intr, sc, &sc->ih)) { 3173 device_printf(dev, "unable to map interrupt\n"); 3174 goto bad; 3175 } 3176 if (emu_rm_init(sc) != 0) { 3177 device_printf(dev, "unable to create resource manager\n"); 3178 goto bad; 3179 } 3180 if (sc->is_cardbus) 3181 if (emu_cardbus_init(sc) != 0) { 3182 device_printf(dev, "unable to initialize CardBus interface\n"); 3183 goto bad; 3184 } 3185 if (emu_init(sc) != 0) { 3186 device_printf(dev, "unable to initialize the card\n"); 3187 goto bad; 3188 } 3189 if (emu10kx_dev_init(sc) != 0) { 3190 device_printf(dev, "unable to create control device\n"); 3191 goto bad; 3192 } 3193 snprintf(status, 255, "rev %d at io 0x%jx irq %jd", sc->rev, rman_get_start(sc->reg), rman_get_start(sc->irq)); 3194 3195 /* Voices */ 3196 for (i = 0; i < NUM_G; i++) { 3197 sc->voice[i].vnum = i; 3198 sc->voice[i].slave = NULL; 3199 sc->voice[i].busy = 0; 3200 sc->voice[i].ismaster = 0; 3201 sc->voice[i].running = 0; 3202 sc->voice[i].b16 = 0; 3203 sc->voice[i].stereo = 0; 3204 sc->voice[i].speed = 0; 3205 sc->voice[i].start = 0; 3206 sc->voice[i].end = 0; 3207 } 3208 3209 /* PCM Audio */ 3210 for (i = 0; i < RT_COUNT; i++) 3211 sc->pcm[i] = NULL; 3212 3213 /* FRONT */ 3214 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); 3215 if (func == NULL) { 3216 error = ENOMEM; 3217 goto bad; 3218 } 3219 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO); 3220 if (pcminfo == NULL) { 3221 error = ENOMEM; 3222 goto bad; 3223 } 3224 pcminfo->card = sc; 3225 pcminfo->route = RT_FRONT; 3226 3227 func->func = SCF_PCM; 3228 func->varinfo = pcminfo; 3229 sc->pcm[RT_FRONT] = device_add_child(dev, "pcm", -1); 3230 device_set_ivars(sc->pcm[RT_FRONT], func); 3231 3232 if (!(sc->mch_disabled)) { 3233 /* REAR */ 3234 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); 3235 if (func == NULL) { 3236 error = ENOMEM; 3237 goto bad; 3238 } 3239 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO); 3240 if (pcminfo == NULL) { 3241 error = ENOMEM; 3242 goto bad; 3243 } 3244 pcminfo->card = sc; 3245 pcminfo->route = RT_REAR; 3246 3247 func->func = SCF_PCM; 3248 func->varinfo = pcminfo; 3249 sc->pcm[RT_REAR] = device_add_child(dev, "pcm", -1); 3250 device_set_ivars(sc->pcm[RT_REAR], func); 3251 if (sc->has_51) { 3252 /* CENTER */ 3253 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); 3254 if (func == NULL) { 3255 error = ENOMEM; 3256 goto bad; 3257 } 3258 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO); 3259 if (pcminfo == NULL) { 3260 error = ENOMEM; 3261 goto bad; 3262 } 3263 pcminfo->card = sc; 3264 pcminfo->route = RT_CENTER; 3265 3266 func->func = SCF_PCM; 3267 func->varinfo = pcminfo; 3268 sc->pcm[RT_CENTER] = device_add_child(dev, "pcm", -1); 3269 device_set_ivars(sc->pcm[RT_CENTER], func); 3270 /* SUB */ 3271 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); 3272 if (func == NULL) { 3273 error = ENOMEM; 3274 goto bad; 3275 } 3276 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO); 3277 if (pcminfo == NULL) { 3278 error = ENOMEM; 3279 goto bad; 3280 } 3281 pcminfo->card = sc; 3282 pcminfo->route = RT_SUB; 3283 3284 func->func = SCF_PCM; 3285 func->varinfo = pcminfo; 3286 sc->pcm[RT_SUB] = device_add_child(dev, "pcm", -1); 3287 device_set_ivars(sc->pcm[RT_SUB], func); 3288 } 3289 if (sc->has_71) { 3290 /* SIDE */ 3291 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); 3292 if (func == NULL) { 3293 error = ENOMEM; 3294 goto bad; 3295 } 3296 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO); 3297 if (pcminfo == NULL) { 3298 error = ENOMEM; 3299 goto bad; 3300 } 3301 pcminfo->card = sc; 3302 pcminfo->route = RT_SIDE; 3303 3304 func->func = SCF_PCM; 3305 func->varinfo = pcminfo; 3306 sc->pcm[RT_SIDE] = device_add_child(dev, "pcm", -1); 3307 device_set_ivars(sc->pcm[RT_SIDE], func); 3308 } 3309 } /* mch_disabled */ 3310 3311 if (sc->mch_rec) { 3312 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); 3313 if (func == NULL) { 3314 error = ENOMEM; 3315 goto bad; 3316 } 3317 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO); 3318 if (pcminfo == NULL) { 3319 error = ENOMEM; 3320 goto bad; 3321 } 3322 pcminfo->card = sc; 3323 pcminfo->route = RT_MCHRECORD; 3324 3325 func->func = SCF_PCM; 3326 func->varinfo = pcminfo; 3327 sc->pcm[RT_MCHRECORD] = device_add_child(dev, "pcm", -1); 3328 device_set_ivars(sc->pcm[RT_MCHRECORD], func); 3329 } /*mch_rec */ 3330 3331 for (i = 0; i < 2; i++) 3332 sc->midi[i] = NULL; 3333 3334 /* MIDI has some memory mangament and (possible) locking problems */ 3335#if 0 3336 /* Midi Interface 1: Live!, Audigy, Audigy 2 */ 3337 if ((sc->is_emu10k1) || (sc->is_emu10k2) || (sc->is_ca0102)) { 3338 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); 3339 if (func == NULL) { 3340 error = ENOMEM; 3341 goto bad; 3342 } 3343 midiinfo = malloc(sizeof(struct emu_midiinfo), M_DEVBUF, M_NOWAIT | M_ZERO); 3344 if (midiinfo == NULL) { 3345 error = ENOMEM; 3346 goto bad; 3347 } 3348 midiinfo->card = sc; 3349 if (sc->is_emu10k2 || (sc->is_ca0102)) { 3350 midiinfo->port = EMU_A_MUDATA1; 3351 midiinfo->portnr = 1; 3352 } 3353 if (sc->is_emu10k1) { 3354 midiinfo->port = MUDATA; 3355 midiinfo->portnr = 1; 3356 } 3357 func->func = SCF_MIDI; 3358 func->varinfo = midiinfo; 3359 sc->midi[0] = device_add_child(dev, "midi", -1); 3360 device_set_ivars(sc->midi[0], func); 3361 } 3362 /* Midi Interface 2: Audigy, Audigy 2 (on AudigyDrive) */ 3363 if (sc->is_emu10k2 || (sc->is_ca0102)) { 3364 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); 3365 if (func == NULL) { 3366 error = ENOMEM; 3367 goto bad; 3368 } 3369 midiinfo = malloc(sizeof(struct emu_midiinfo), M_DEVBUF, M_NOWAIT | M_ZERO); 3370 if (midiinfo == NULL) { 3371 error = ENOMEM; 3372 goto bad; 3373 } 3374 midiinfo->card = sc; 3375 3376 midiinfo->port = EMU_A_MUDATA2; 3377 midiinfo->portnr = 2; 3378 3379 func->func = SCF_MIDI; 3380 func->varinfo = midiinfo; 3381 sc->midi[1] = device_add_child(dev, "midi", -1); 3382 device_set_ivars(sc->midi[1], func); 3383 } 3384#endif 3385 return (bus_generic_attach(dev)); 3386 3387bad: 3388 /* XXX can we just call emu_pci_detach here? */ 3389 if (sc->cdev) 3390 emu10kx_dev_uninit(sc); 3391 if (sc->rm != NULL) 3392 emu_rm_uninit(sc); 3393 if (sc->reg) 3394 bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg); 3395 if (sc->ih) 3396 bus_teardown_intr(dev, sc->irq, sc->ih); 3397 if (sc->irq) 3398 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq); 3399 mtx_destroy(&sc->rw); 3400 mtx_destroy(&sc->lock); 3401 return (error); 3402} 3403 3404static int 3405emu_pci_detach(device_t dev) 3406{ 3407 struct emu_sc_info *sc; 3408 struct sndcard_func *func; 3409 int devcount, i; 3410 device_t *childlist; 3411 int r = 0; 3412 3413 sc = device_get_softc(dev); 3414 3415 for (i = 0; i < RT_COUNT; i++) { 3416 if (sc->pcm[i] != NULL) { 3417 func = device_get_ivars(sc->pcm[i]); 3418 if (func != NULL && func->func == SCF_PCM) { 3419 device_set_ivars(sc->pcm[i], NULL); 3420 free(func->varinfo, M_DEVBUF); 3421 free(func, M_DEVBUF); 3422 } 3423 r = device_delete_child(dev, sc->pcm[i]); 3424 if (r) return (r); 3425 } 3426 } 3427 3428 if (sc->midi[0] != NULL) { 3429 func = device_get_ivars(sc->midi[0]); 3430 if (func != NULL && func->func == SCF_MIDI) { 3431 device_set_ivars(sc->midi[0], NULL); 3432 free(func->varinfo, M_DEVBUF); 3433 free(func, M_DEVBUF); 3434 } 3435 r = device_delete_child(dev, sc->midi[0]); 3436 if (r) return (r); 3437 } 3438 3439 if (sc->midi[1] != NULL) { 3440 func = device_get_ivars(sc->midi[1]); 3441 if (func != NULL && func->func == SCF_MIDI) { 3442 device_set_ivars(sc->midi[1], NULL); 3443 free(func->varinfo, M_DEVBUF); 3444 free(func, M_DEVBUF); 3445 } 3446 r = device_delete_child(dev, sc->midi[1]); 3447 if (r) return (r); 3448 } 3449 3450 if (device_get_children(dev, &childlist, &devcount) == 0) 3451 for (i = 0; i < devcount - 1; i++) { 3452 device_printf(dev, "removing stale child %d (unit %d)\n", i, device_get_unit(childlist[i])); 3453 func = device_get_ivars(childlist[i]); 3454 if (func != NULL && (func->func == SCF_MIDI || func->func == SCF_PCM)) { 3455 device_set_ivars(childlist[i], NULL); 3456 free(func->varinfo, M_DEVBUF); 3457 free(func, M_DEVBUF); 3458 } 3459 device_delete_child(dev, childlist[i]); 3460 } 3461 if (childlist != NULL) 3462 free(childlist, M_TEMP); 3463 3464 r = emu10kx_dev_uninit(sc); 3465 if (r) 3466 return (r); 3467 3468 /* shutdown chip */ 3469 emu_uninit(sc); 3470 emu_rm_uninit(sc); 3471 3472 if (sc->mem.dmat) 3473 bus_dma_tag_destroy(sc->mem.dmat); 3474 3475 if (sc->reg) 3476 bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg); 3477 bus_teardown_intr(dev, sc->irq, sc->ih); 3478 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq); 3479 mtx_destroy(&sc->rw); 3480 mtx_destroy(&sc->lock); 3481 3482 return (bus_generic_detach(dev)); 3483} 3484/* add suspend, resume */ 3485static device_method_t emu_methods[] = { 3486 /* Device interface */ 3487 DEVMETHOD(device_probe, emu_pci_probe), 3488 DEVMETHOD(device_attach, emu_pci_attach), 3489 DEVMETHOD(device_detach, emu_pci_detach), 3490 /* Bus methods */ 3491 DEVMETHOD(bus_read_ivar, emu_read_ivar), 3492 DEVMETHOD(bus_write_ivar, emu_write_ivar), 3493 3494 DEVMETHOD_END 3495}; 3496 3497static driver_t emu_driver = { 3498 "emu10kx", 3499 emu_methods, 3500 sizeof(struct emu_sc_info), 3501 NULL, 3502 0, 3503 NULL 3504}; 3505 3506static int 3507emu_modevent(module_t mod __unused, int cmd, void *data __unused) 3508{ 3509 int err = 0; 3510 3511 switch (cmd) { 3512 case MOD_LOAD: 3513 break; /* Success */ 3514 3515 case MOD_UNLOAD: 3516 case MOD_SHUTDOWN: 3517 3518 /* XXX Should we check state of pcm & midi subdevices here? */ 3519 3520 break; /* Success */ 3521 3522 default: 3523 err = EINVAL; 3524 break; 3525 } 3526 3527 return (err); 3528 3529} 3530 3531DRIVER_MODULE(snd_emu10kx, pci, emu_driver, emu_modevent, NULL); 3532MODULE_VERSION(snd_emu10kx, SND_EMU10KX_PREFVER); 3533