1/*- 2 * Copyright (c) 2016 Andriy Voskoboinyk <avos@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> 28#include "opt_wlan.h" 29 30#include <sys/param.h> 31#include <sys/lock.h> 32#include <sys/mutex.h> 33#include <sys/mbuf.h> 34#include <sys/kernel.h> 35#include <sys/socket.h> 36#include <sys/systm.h> 37#include <sys/malloc.h> 38#include <sys/queue.h> 39#include <sys/taskqueue.h> 40#include <sys/bus.h> 41#include <sys/endian.h> 42#include <sys/linker.h> 43 44#include <net/if.h> 45#include <net/ethernet.h> 46#include <net/if_media.h> 47 48#include <net80211/ieee80211_var.h> 49#include <net80211/ieee80211_radiotap.h> 50 51#include <dev/rtwn/if_rtwnreg.h> 52#include <dev/rtwn/if_rtwnvar.h> 53 54#include <dev/rtwn/if_rtwn_debug.h> 55 56#include <dev/rtwn/rtl8812a/r12a.h> 57#include <dev/rtwn/rtl8812a/r12a_var.h> 58#include <dev/rtwn/rtl8812a/r12a_rom_image.h> 59 60void 61r12a_parse_rom_common(struct rtwn_softc *sc, uint8_t *buf) 62{ 63 struct r12a_softc *rs = sc->sc_priv; 64 struct r12a_rom *rom = (struct r12a_rom *)buf; 65 int i, j, k; 66 67 sc->thermal_meter = rom->thermal_meter; 68 rs->crystalcap = RTWN_GET_ROM_VAR(rom->crystalcap, 69 R12A_ROM_CRYSTALCAP_DEF); 70 rs->tx_bbswing_2g = RTWN_GET_ROM_VAR(rom->tx_bbswing_2g, 0); 71 rs->tx_bbswing_5g = RTWN_GET_ROM_VAR(rom->tx_bbswing_5g, 0); 72 73 for (i = 0; i < sc->ntxchains; i++) { 74 struct r12a_tx_pwr_2g *pwr_2g = &rom->tx_pwr[i].pwr_2g; 75 struct r12a_tx_pwr_5g *pwr_5g = &rom->tx_pwr[i].pwr_5g; 76 struct r12a_tx_pwr_diff_2g *pwr_diff_2g = 77 &rom->tx_pwr[i].pwr_diff_2g; 78 struct r12a_tx_pwr_diff_5g *pwr_diff_5g = 79 &rom->tx_pwr[i].pwr_diff_5g; 80 81 for (j = 0; j < R12A_GROUP_2G - 1; j++) { 82 rs->cck_tx_pwr[i][j] = 83 RTWN_GET_ROM_VAR(pwr_2g->cck[j], 84 R12A_DEF_TX_PWR_2G); 85 rs->ht40_tx_pwr_2g[i][j] = 86 RTWN_GET_ROM_VAR(pwr_2g->ht40[j], 87 R12A_DEF_TX_PWR_2G); 88 } 89 rs->cck_tx_pwr[i][j] = RTWN_GET_ROM_VAR(pwr_2g->cck[j], 90 R12A_DEF_TX_PWR_2G); 91 92 rs->cck_tx_pwr_diff_2g[i][0] = 0; 93 rs->ofdm_tx_pwr_diff_2g[i][0] = RTWN_SIGN4TO8( 94 MS(pwr_diff_2g->ht20_ofdm, LOW_PART)); 95 rs->bw20_tx_pwr_diff_2g[i][0] = RTWN_SIGN4TO8( 96 MS(pwr_diff_2g->ht20_ofdm, HIGH_PART)); 97 rs->bw40_tx_pwr_diff_2g[i][0] = 0; 98 99 for (j = 1, k = 0; k < nitems(pwr_diff_2g->diff123); j++, k++) { 100 rs->cck_tx_pwr_diff_2g[i][j] = RTWN_SIGN4TO8( 101 MS(pwr_diff_2g->diff123[k].ofdm_cck, LOW_PART)); 102 rs->ofdm_tx_pwr_diff_2g[i][j] = RTWN_SIGN4TO8( 103 MS(pwr_diff_2g->diff123[k].ofdm_cck, HIGH_PART)); 104 rs->bw20_tx_pwr_diff_2g[i][j] = RTWN_SIGN4TO8( 105 MS(pwr_diff_2g->diff123[k].ht40_ht20, LOW_PART)); 106 rs->bw40_tx_pwr_diff_2g[i][j] = RTWN_SIGN4TO8( 107 MS(pwr_diff_2g->diff123[k].ht40_ht20, HIGH_PART)); 108 } 109 110 for (j = 0; j < R12A_GROUP_5G; j++) { 111 rs->ht40_tx_pwr_5g[i][j] = 112 RTWN_GET_ROM_VAR(pwr_5g->ht40[j], 113 R12A_DEF_TX_PWR_5G); 114 } 115 116 rs->ofdm_tx_pwr_diff_5g[i][0] = RTWN_SIGN4TO8( 117 MS(pwr_diff_5g->ht20_ofdm, LOW_PART)); 118 rs->ofdm_tx_pwr_diff_5g[i][1] = RTWN_SIGN4TO8( 119 MS(pwr_diff_5g->ofdm_ofdm[0], HIGH_PART)); 120 rs->ofdm_tx_pwr_diff_5g[i][2] = RTWN_SIGN4TO8( 121 MS(pwr_diff_5g->ofdm_ofdm[0], LOW_PART)); 122 rs->ofdm_tx_pwr_diff_5g[i][3] = RTWN_SIGN4TO8( 123 MS(pwr_diff_5g->ofdm_ofdm[1], LOW_PART)); 124 125 rs->bw20_tx_pwr_diff_5g[i][0] = RTWN_SIGN4TO8( 126 MS(pwr_diff_5g->ht20_ofdm, HIGH_PART)); 127 rs->bw40_tx_pwr_diff_5g[i][0] = 0; 128 for (j = 1, k = 0; k < nitems(pwr_diff_5g->ht40_ht20); 129 j++, k++) { 130 rs->bw20_tx_pwr_diff_5g[i][j] = RTWN_SIGN4TO8( 131 MS(pwr_diff_5g->ht40_ht20[k], LOW_PART)); 132 rs->bw40_tx_pwr_diff_5g[i][j] = RTWN_SIGN4TO8( 133 MS(pwr_diff_5g->ht40_ht20[k], HIGH_PART)); 134 } 135 136 for (j = 0; j < nitems(pwr_diff_5g->ht80_ht160); j++) { 137 rs->bw80_tx_pwr_diff_5g[i][j] = RTWN_SIGN4TO8( 138 MS(pwr_diff_5g->ht80_ht160[j], HIGH_PART)); 139 rs->bw160_tx_pwr_diff_5g[i][j] = RTWN_SIGN4TO8( 140 MS(pwr_diff_5g->ht80_ht160[j], LOW_PART)); 141 } 142 } 143 144 rs->regulatory = MS(rom->rf_board_opt, R92C_ROM_RF1_REGULATORY); 145 rs->board_type = 146 MS(RTWN_GET_ROM_VAR(rom->rf_board_opt, R92C_BOARD_TYPE_DONGLE), 147 R92C_ROM_RF1_BOARD_TYPE); 148 RTWN_DPRINTF(sc, RTWN_DEBUG_ROM, "%s: regulatory type=%d\n", 149 __func__, rs->regulatory); 150} 151 152void 153r12a_parse_rom(struct rtwn_softc *sc, uint8_t *buf) 154{ 155 struct r12a_softc *rs = sc->sc_priv; 156 struct r12a_rom *rom = (struct r12a_rom *)buf; 157 uint8_t pa_type, lna_type_2g, lna_type_5g; 158 159 /* Read PA/LNA types. */ 160 pa_type = RTWN_GET_ROM_VAR(rom->pa_type, 0); 161 lna_type_2g = RTWN_GET_ROM_VAR(rom->lna_type_2g, 0); 162 lna_type_5g = RTWN_GET_ROM_VAR(rom->lna_type_5g, 0); 163 164 rs->ext_pa_2g = R12A_ROM_IS_PA_EXT_2GHZ(pa_type); 165 rs->ext_pa_5g = R12A_ROM_IS_PA_EXT_5GHZ(pa_type); 166 rs->ext_lna_2g = R21A_ROM_IS_LNA_EXT(lna_type_2g); 167 rs->ext_lna_5g = R21A_ROM_IS_LNA_EXT(lna_type_5g); 168 rs->bt_coex = (MS(rom->rf_board_opt, R92C_ROM_RF1_BOARD_TYPE) == 169 R92C_BOARD_TYPE_HIGHPA); 170 rs->bt_ant_num = (rom->rf_bt_opt & R12A_RF_BT_OPT_ANT_NUM); 171 172 if (rs->ext_pa_2g) { 173 rs->type_pa_2g = 174 R12A_GET_ROM_PA_TYPE(lna_type_2g, 0) | 175 (R12A_GET_ROM_PA_TYPE(lna_type_2g, 1) << 2); 176 } 177 if (rs->ext_pa_5g) { 178 rs->type_pa_5g = 179 R12A_GET_ROM_PA_TYPE(lna_type_5g, 0) | 180 (R12A_GET_ROM_PA_TYPE(lna_type_5g, 1) << 2); 181 } 182 if (rs->ext_lna_2g) { 183 rs->type_lna_2g = 184 R12A_GET_ROM_LNA_TYPE(lna_type_2g, 0) | 185 (R12A_GET_ROM_LNA_TYPE(lna_type_2g, 1) << 2); 186 } 187 if (rs->ext_lna_5g) { 188 rs->type_lna_5g = 189 R12A_GET_ROM_LNA_TYPE(lna_type_5g, 0) | 190 (R12A_GET_ROM_LNA_TYPE(lna_type_5g, 1) << 2); 191 } 192 193 if (rom->rfe_option & 0x80) { 194 if (rs->ext_lna_5g) { 195 if (rs->ext_pa_5g) { 196 if (rs->ext_pa_2g && rs->ext_lna_2g) 197 rs->rfe_type = 3; 198 else 199 rs->rfe_type = 0; 200 } else 201 rs->rfe_type = 2; 202 } else 203 rs->rfe_type = 4; 204 } else { 205 rs->rfe_type = rom->rfe_option & 0x3f; 206 207 /* workaround for incorrect EFUSE map */ 208 if (rs->rfe_type == 4 && 209 rs->ext_pa_2g && rs->ext_lna_2g && 210 rs->ext_pa_5g && rs->ext_lna_5g) 211 rs->rfe_type = 0; 212 } 213 214 /* Read MAC address. */ 215 IEEE80211_ADDR_COPY(sc->sc_ic.ic_macaddr, rom->macaddr_12a); 216 217 /* Execute common part of initialization. */ 218 r12a_parse_rom_common(sc, buf); 219} 220