1/*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2013-2016 Qlogic Corporation 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 18 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 21 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 */ 29/* 30 * File: ql_inline.h 31 * Author : David C Somayajulu, Qlogic Corporation, Aliso Viejo, CA 92656. 32 */ 33#ifndef _QL_INLINE_H_ 34#define _QL_INLINE_H_ 35 36#define QL8_SEMLOCK_TIMEOUT 1000/* QLA8020 Semaphore Lock Timeout 10ms */ 37 38/* 39 * Inline functions for hardware semaphores 40 */ 41 42/* 43 * Name: qla_sem_lock 44 * Function: Locks one of the semaphore registers (semaphore 2,3,5 & 7) 45 * If the id_reg is valid, then id_val is written into it. 46 * This is for debugging purpose 47 * Returns: 0 on success; otherwise its failed. 48 */ 49static __inline int 50qla_sem_lock(qla_host_t *ha, uint32_t sem_reg, uint32_t id_reg, uint32_t id_val) 51{ 52 int count = QL8_SEMLOCK_TIMEOUT; 53 54 while (count) { 55 if ((READ_REG32(ha, sem_reg) & BIT_0)) 56 break; 57 count--; 58 59 if (!count) 60 return(-1); 61 qla_mdelay(__func__, 10); 62 } 63 if (id_reg) 64 WRITE_REG32(ha, id_reg, id_val); 65 66 return(0); 67} 68 69/* 70 * Name: qla_sem_unlock 71 * Function: Unlocks the semaphore registers (semaphore 2,3,5 & 7) 72 * previously locked by qla_sem_lock() 73 */ 74static __inline void 75qla_sem_unlock(qla_host_t *ha, uint32_t sem_reg) 76{ 77 READ_REG32(ha, sem_reg); 78} 79 80static __inline int 81qla_get_ifq_snd_maxlen(qla_host_t *ha) 82{ 83 return(((NUM_TX_DESCRIPTORS * 4) - 1)); 84} 85 86static __inline uint32_t 87qla_get_optics(qla_host_t *ha) 88{ 89 uint32_t link_speed; 90 91 link_speed = READ_REG32(ha, Q8_LINK_SPEED_0); 92 if (ha->pci_func == 0) 93 link_speed = link_speed & 0xFF; 94 else 95 link_speed = (link_speed >> 8) & 0xFF; 96 97 switch (link_speed) { 98 case 0x1: 99 link_speed = IFM_100_FX; 100 break; 101 102 case 0x10: 103 link_speed = IFM_1000_SX; 104 break; 105 106 default: 107 if ((ha->hw.module_type == 0x4) || 108 (ha->hw.module_type == 0x5) || 109 (ha->hw.module_type == 0x6)) 110 link_speed = (IFM_10G_TWINAX); 111 else 112 link_speed = (IFM_10G_LR | IFM_10G_SR); 113 break; 114 } 115 116 return(link_speed); 117} 118 119static __inline uint8_t * 120qla_get_mac_addr(qla_host_t *ha) 121{ 122 return (ha->hw.mac_addr); 123} 124 125static __inline void 126qla_set_hw_rcv_desc(qla_host_t *ha, uint32_t r_idx, uint32_t index, 127 uint32_t handle, bus_addr_t paddr, uint32_t buf_size) 128{ 129 volatile q80_recv_desc_t *rcv_desc; 130 131 rcv_desc = (q80_recv_desc_t *)ha->hw.dma_buf.rds_ring[r_idx].dma_b; 132 133 rcv_desc += index; 134 135 rcv_desc->handle = (uint16_t)handle; 136 rcv_desc->buf_size = buf_size; 137 rcv_desc->buf_addr = paddr; 138 139 return; 140} 141 142static __inline void 143qla_init_hw_rcv_descriptors(qla_host_t *ha) 144{ 145 int i; 146 147 for (i = 0; i < ha->hw.num_rds_rings; i++) 148 bzero((void *)ha->hw.dma_buf.rds_ring[i].dma_b, 149 (sizeof(q80_recv_desc_t) * NUM_RX_DESCRIPTORS)); 150} 151 152#define QLA_LOCK_DEFAULT_MS_TIMEOUT 3000 153 154#ifndef QLA_LOCK_NO_SLEEP 155#define QLA_LOCK_NO_SLEEP 0 156#endif 157 158static __inline int 159qla_lock(qla_host_t *ha, const char *str, uint32_t timeout_ms, 160 uint32_t no_sleep) 161{ 162 int ret = -1; 163 164 while (1) { 165 mtx_lock(&ha->hw_lock); 166 167 if (ha->qla_detach_active || ha->offline) { 168 mtx_unlock(&ha->hw_lock); 169 break; 170 } 171 172 if (!ha->hw_lock_held) { 173 ha->hw_lock_held = 1; 174 ha->qla_lock = str; 175 ret = 0; 176 mtx_unlock(&ha->hw_lock); 177 break; 178 } 179 mtx_unlock(&ha->hw_lock); 180 181 if (--timeout_ms == 0) { 182 ha->hw_lock_failed++; 183 break; 184 } else { 185 if (no_sleep) 186 DELAY(1000); 187 else 188 qla_mdelay(__func__, 1); 189 } 190 } 191 192// if (!ha->enable_error_recovery) 193// device_printf(ha->pci_dev, "%s: %s ret = %d\n", __func__, 194// str,ret); 195 196 return (ret); 197} 198 199static __inline void 200qla_unlock(qla_host_t *ha, const char *str) 201{ 202 mtx_lock(&ha->hw_lock); 203 ha->hw_lock_held = 0; 204 ha->qla_unlock = str; 205 mtx_unlock(&ha->hw_lock); 206 207// if (!ha->enable_error_recovery) 208// device_printf(ha->pci_dev, "%s: %s\n", __func__, str); 209 210 return; 211} 212 213#endif /* #ifndef _QL_INLINE_H_ */ 214