1/*-
2 * Copyright (c) 2017, Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses.  You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 *     Redistribution and use in source and binary forms, with or
11 *     without modification, are permitted provided that the following
12 *     conditions are met:
13 *
14 *      - Redistributions of source code must retain the above
15 *        copyright notice, this list of conditions and the following
16 *        disclaimer.
17 *
18 *      - Redistributions in binary form must reproduce the above
19 *        copyright notice, this list of conditions and the following
20 *        disclaimer in the documentation and/or other materials
21 *        provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33#include <linux/etherdevice.h>
34#include <dev/mlx5/driver.h>
35#include <dev/mlx5/mlx5_core/mlx5_core.h>
36#include <dev/mlx5/mlx5_lib/mlx5.h>
37
38void mlx5_init_reserved_gids(struct mlx5_core_dev *dev)
39{
40	unsigned int tblsz = MLX5_CAP_ROCE(dev, roce_address_table_size);
41
42	ida_init(&dev->roce.reserved_gids.ida);
43	dev->roce.reserved_gids.start = tblsz;
44	dev->roce.reserved_gids.count = 0;
45}
46
47void mlx5_cleanup_reserved_gids(struct mlx5_core_dev *dev)
48{
49	WARN_ON(!ida_is_empty(&dev->roce.reserved_gids.ida));
50	dev->roce.reserved_gids.start = 0;
51	dev->roce.reserved_gids.count = 0;
52	ida_destroy(&dev->roce.reserved_gids.ida);
53}
54
55int mlx5_core_reserve_gids(struct mlx5_core_dev *dev, unsigned int count)
56{
57	if (test_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state)) {
58		mlx5_core_err(dev, "Cannot reserve GIDs when interfaces are up\n");
59		return -EPERM;
60	}
61	if (dev->roce.reserved_gids.start < count) {
62		mlx5_core_warn(dev, "GID table exhausted attempting to reserve %d more GIDs\n",
63			       count);
64		return -ENOMEM;
65	}
66	if (dev->roce.reserved_gids.count + count > MLX5_MAX_RESERVED_GIDS) {
67		mlx5_core_warn(dev, "Unable to reserve %d more GIDs\n", count);
68		return -ENOMEM;
69	}
70
71	dev->roce.reserved_gids.start -= count;
72	dev->roce.reserved_gids.count += count;
73	mlx5_core_dbg(dev, "Reserved %u GIDs starting at %u\n",
74		      dev->roce.reserved_gids.count,
75		      dev->roce.reserved_gids.start);
76	return 0;
77}
78
79void mlx5_core_unreserve_gids(struct mlx5_core_dev *dev, unsigned int count)
80{
81	WARN(test_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state), "Unreserving GIDs when interfaces are up");
82	WARN(count > dev->roce.reserved_gids.count, "Unreserving %u GIDs when only %u reserved",
83	     count, dev->roce.reserved_gids.count);
84
85	dev->roce.reserved_gids.start += count;
86	dev->roce.reserved_gids.count -= count;
87	mlx5_core_dbg(dev, "%u GIDs starting at %u left reserved\n",
88		      dev->roce.reserved_gids.count,
89		      dev->roce.reserved_gids.start);
90}
91
92int mlx5_core_reserved_gid_alloc(struct mlx5_core_dev *dev, int *gid_index)
93{
94	int end = dev->roce.reserved_gids.start +
95		  dev->roce.reserved_gids.count;
96	int index = 0;
97
98	index = ida_simple_get(&dev->roce.reserved_gids.ida,
99			       dev->roce.reserved_gids.start, end,
100			       GFP_KERNEL);
101	if (index < 0)
102		return index;
103
104	mlx5_core_dbg(dev, "Allocating reserved GID %u\n", index);
105	*gid_index = index;
106	return 0;
107}
108
109void mlx5_core_reserved_gid_free(struct mlx5_core_dev *dev, int gid_index)
110{
111	mlx5_core_dbg(dev, "Freeing reserved GID %u\n", gid_index);
112	ida_simple_remove(&dev->roce.reserved_gids.ida, gid_index);
113}
114
115unsigned int mlx5_core_reserved_gids_count(struct mlx5_core_dev *dev)
116{
117	return dev->roce.reserved_gids.count;
118}
119EXPORT_SYMBOL_GPL(mlx5_core_reserved_gids_count);
120
121int mlx5_core_roce_gid_set(struct mlx5_core_dev *dev, unsigned int index,
122			   u8 roce_version, u8 roce_l3_type, const u8 *gid,
123			   const u8 *mac, bool vlan, u16 vlan_id)
124{
125#define MLX5_SET_RA(p, f, v) MLX5_SET(roce_addr_layout, p, f, v)
126	u32  in[MLX5_ST_SZ_DW(set_roce_address_in)] = {0};
127	u32 out[MLX5_ST_SZ_DW(set_roce_address_out)] = {0};
128	void *in_addr = MLX5_ADDR_OF(set_roce_address_in, in, roce_address);
129	char *addr_l3_addr = MLX5_ADDR_OF(roce_addr_layout, in_addr,
130					  source_l3_address);
131	void *addr_mac = MLX5_ADDR_OF(roce_addr_layout, in_addr,
132				      source_mac_47_32);
133	int gidsz = MLX5_FLD_SZ_BYTES(roce_addr_layout, source_l3_address);
134
135	if (MLX5_CAP_GEN(dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
136		return -EINVAL;
137
138	if (gid) {
139		if (vlan) {
140			MLX5_SET_RA(in_addr, vlan_valid, 1);
141			MLX5_SET_RA(in_addr, vlan_id, vlan_id);
142		}
143
144		ether_addr_copy(addr_mac, mac);
145		MLX5_SET_RA(in_addr, roce_version, roce_version);
146		MLX5_SET_RA(in_addr, roce_l3_type, roce_l3_type);
147		memcpy(addr_l3_addr, gid, gidsz);
148	}
149
150	MLX5_SET(set_roce_address_in, in, roce_address_index, index);
151	MLX5_SET(set_roce_address_in, in, opcode, MLX5_CMD_OP_SET_ROCE_ADDRESS);
152	return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
153}
154EXPORT_SYMBOL(mlx5_core_roce_gid_set);
155