1/*-
2 * Copyright (c) 2017 Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses.  You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 *     Redistribution and use in source and binary forms, with or
11 *     without modification, are permitted provided that the following
12 *     conditions are met:
13 *
14 *      - Redistributions of source code must retain the above
15 *        copyright notice, this list of conditions and the following
16 *        disclaimer.
17 *
18 *      - Redistributions in binary form must reproduce the above
19 *        copyright notice, this list of conditions and the following
20 *        disclaimer in the documentation and/or other materials
21 *        provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33#ifndef __MLX5_FPGA_IPSEC_H__
34#define __MLX5_FPGA_IPSEC_H__
35
36#include <dev/mlx5/mlx5_accel/ipsec.h>
37
38#ifdef CONFIG_MLX5_FPGA
39
40void *mlx5_fpga_ipsec_sa_cmd_exec(struct mlx5_core_dev *mdev,
41				  struct mlx5_accel_ipsec_sa *cmd);
42int mlx5_fpga_ipsec_sa_cmd_wait(void *context);
43
44u32 mlx5_fpga_ipsec_device_caps(struct mlx5_core_dev *mdev);
45unsigned int mlx5_fpga_ipsec_counters_count(struct mlx5_core_dev *mdev);
46int mlx5_fpga_ipsec_counters_read(struct mlx5_core_dev *mdev, u64 *counters,
47				  unsigned int counters_count);
48
49int mlx5_fpga_ipsec_init(struct mlx5_core_dev *mdev);
50void mlx5_fpga_ipsec_cleanup(struct mlx5_core_dev *mdev);
51
52#else
53
54static inline void *mlx5_fpga_ipsec_sa_cmd_exec(struct mlx5_core_dev *mdev,
55						struct mlx5_accel_ipsec_sa *cmd)
56{
57	return ERR_PTR(-EOPNOTSUPP);
58}
59
60static inline int mlx5_fpga_ipsec_sa_cmd_wait(void *context)
61{
62	return -EOPNOTSUPP;
63}
64
65static inline u32 mlx5_fpga_ipsec_device_caps(struct mlx5_core_dev *mdev)
66{
67	return 0;
68}
69
70static inline unsigned int
71mlx5_fpga_ipsec_counters_count(struct mlx5_core_dev *mdev)
72{
73	return 0;
74}
75
76static inline int mlx5_fpga_ipsec_counters_read(struct mlx5_core_dev *mdev,
77						u64 *counters)
78{
79	return 0;
80}
81
82static inline int mlx5_fpga_ipsec_init(struct mlx5_core_dev *mdev)
83{
84	return 0;
85}
86
87static inline void mlx5_fpga_ipsec_cleanup(struct mlx5_core_dev *mdev)
88{
89}
90
91#endif /* CONFIG_MLX5_FPGA */
92
93#endif	/* __MLX5_FPGA_SADB_H__ */
94