1/****************************************************************************** 2 3 Copyright (c) 2013-2018, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32******************************************************************************/ 33 34 35#ifndef _IXL_PF_H_ 36#define _IXL_PF_H_ 37 38#include "i40e_dcb.h" 39 40#include "ixl.h" 41#include "ixl_pf_qmgr.h" 42 43#define VF_FLAG_ENABLED 0x01 44#define VF_FLAG_SET_MAC_CAP 0x02 45#define VF_FLAG_VLAN_CAP 0x04 46#define VF_FLAG_PROMISC_CAP 0x08 47#define VF_FLAG_MAC_ANTI_SPOOF 0x10 48 49#define IXL_ICR0_CRIT_ERR_MASK \ 50 (I40E_PFINT_ICR0_PCI_EXCEPTION_MASK | \ 51 I40E_PFINT_ICR0_ECC_ERR_MASK | \ 52 I40E_PFINT_ICR0_PE_CRITERR_MASK) 53 54/* VF Interrupts */ 55#define IXL_VPINT_LNKLSTN_REG(hw, vector, vf_num) \ 56 I40E_VPINT_LNKLSTN(((vector) - 1) + \ 57 (((hw)->func_caps.num_msix_vectors_vf - 1) * (vf_num))) 58 59#define IXL_VFINT_DYN_CTLN_REG(hw, vector, vf_num) \ 60 I40E_VFINT_DYN_CTLN(((vector) - 1) + \ 61 (((hw)->func_caps.num_msix_vectors_vf - 1) * (vf_num))) 62 63enum ixl_fw_mode { 64 IXL_FW_MODE_NORMAL, 65 IXL_FW_MODE_RECOVERY, 66 IXL_FW_MODE_UEMPR 67}; 68 69enum ixl_i2c_access_method_t { 70 IXL_I2C_ACCESS_METHOD_BEST_AVAILABLE = 0, 71 IXL_I2C_ACCESS_METHOD_BIT_BANG_I2CPARAMS = 1, 72 IXL_I2C_ACCESS_METHOD_REGISTER_I2CCMD = 2, 73 IXL_I2C_ACCESS_METHOD_AQ = 3, 74 IXL_I2C_ACCESS_METHOD_TYPE_LENGTH = 4 75}; 76 77/* Used in struct ixl_pf's state field */ 78enum ixl_state { 79 IXL_STATE_RECOVERY_MODE = 0, 80 IXL_STATE_RESETTING = 1, 81 IXL_STATE_MDD_PENDING = 2, 82 IXL_STATE_PF_RESET_REQ = 3, 83 IXL_STATE_VF_RESET_REQ = 4, 84 IXL_STATE_PF_CRIT_ERR = 5, 85 IXL_STATE_CORE_RESET_REQ = 6, 86 IXL_STATE_GLOB_RESET_REQ = 7, 87 IXL_STATE_EMP_RESET_REQ = 8, 88 IXL_STATE_FW_LLDP_DISABLED = 9, 89 IXL_STATE_EEE_ENABLED = 10, 90 IXL_STATE_LINK_ACTIVE_ON_DOWN = 11, 91 IXL_STATE_LINK_POLLING = 12, 92}; 93 94#define IXL_PF_IN_RECOVERY_MODE(pf) \ 95 ixl_test_state(&pf->state, IXL_STATE_RECOVERY_MODE) 96 97#define IXL_PF_IS_RESETTING(pf) \ 98 ixl_test_state(&pf->state, IXL_STATE_RESETTING) 99 100struct ixl_vf { 101 struct ixl_vsi vsi; 102 u32 vf_flags; 103 u32 num_mdd_events; 104 105 u8 mac[ETHER_ADDR_LEN]; 106 u16 vf_num; 107 struct virtchnl_version_info version; 108 109 struct ixl_pf_qtag qtag; 110}; 111 112/* Physical controller structure */ 113struct ixl_pf { 114 struct ixl_vsi vsi; 115 116 struct i40e_hw hw; 117 struct i40e_osdep osdep; 118 device_t dev; 119 120 struct resource *pci_mem; 121 122#ifdef IXL_IW 123 int iw_msix; 124 bool iw_enabled; 125#endif 126 u32 state; 127 u8 supported_speeds; 128 129 struct ixl_pf_qmgr qmgr; 130 struct ixl_pf_qtag qtag; 131 132 char admin_mtx_name[16]; /* name of the admin mutex */ 133 struct mtx admin_mtx; /* mutex to protect the admin timer */ 134 struct callout admin_timer; /* timer to trigger admin task */ 135 136 /* Tunable values */ 137#ifdef IXL_DEBUG_FC 138 bool enable_tx_fc_filter; 139#endif 140#ifdef IXL_DEBUG 141 bool recovery_mode; 142#endif 143 int dynamic_rx_itr; 144 int dynamic_tx_itr; 145 int tx_itr; 146 int rx_itr; 147 int enable_vf_loopback; 148 149 bool link_up; 150 int advertised_speed; 151 int fc; /* link flow ctrl setting */ 152 enum ixl_dbg_mask dbg_mask; 153 bool has_i2c; 154 155 /* Misc stats maintained by the driver */ 156 u64 admin_irq; 157 158 /* Statistics from hw */ 159 struct i40e_hw_port_stats stats; 160 struct i40e_hw_port_stats stats_offsets; 161 bool stat_offsets_loaded; 162 163 /* I2C access methods */ 164 enum ixl_i2c_access_method_t i2c_access_method; 165 s32 (*read_i2c_byte)(struct ixl_pf *pf, u8 byte_offset, 166 u8 dev_addr, u8 *data); 167 s32 (*write_i2c_byte)(struct ixl_pf *pf, u8 byte_offset, 168 u8 dev_addr, u8 data); 169 170 /* SR-IOV */ 171 struct ixl_vf *vfs; 172 int num_vfs; 173 uint16_t veb_seid; 174 int vc_debug_lvl; 175 176 sbintime_t link_poll_start; 177}; 178 179/* 180 * Defines used for NVM update ioctls. 181 * This value is used in the Solaris tool, too. 182 */ 183#define I40E_NVM_ACCESS \ 184 (((((((('E' << 4) + '1') << 4) + 'K') << 4) + 'G') << 4) | 5) 185 186#define IXL_DEFAULT_PHY_INT_MASK \ 187 ((~(I40E_AQ_EVENT_LINK_UPDOWN | I40E_AQ_EVENT_MODULE_QUAL_FAIL \ 188 | I40E_AQ_EVENT_MEDIA_NA)) & 0x3FF) 189 190/*** Sysctl help messages; displayed with "sysctl -d" ***/ 191 192#define IXL_SYSCTL_HELP_SET_ADVERTISE \ 193"\nControl advertised link speed.\n" \ 194"Flags:\n" \ 195"\t 0x1 - advertise 100M\n" \ 196"\t 0x2 - advertise 1G\n" \ 197"\t 0x4 - advertise 10G\n" \ 198"\t 0x8 - advertise 20G\n" \ 199"\t0x10 - advertise 25G\n" \ 200"\t0x20 - advertise 40G\n" \ 201"\t0x40 - advertise 2.5G\n" \ 202"\t0x80 - advertise 5G\n\n" \ 203"Set to 0 to disable link.\n" \ 204"Use \"sysctl -x\" to view flags properly." 205 206#define IXL_SYSCTL_HELP_SUPPORTED_SPEED \ 207"\nSupported link speeds.\n" \ 208"Flags:\n" \ 209"\t 0x1 - 100M\n" \ 210"\t 0x2 - 1G\n" \ 211"\t 0x4 - 10G\n" \ 212"\t 0x8 - 20G\n" \ 213"\t0x10 - 25G\n" \ 214"\t0x20 - 40G\n" \ 215"\t0x40 - 2.5G\n" \ 216"\t0x80 - 5G\n\n" \ 217"Use \"sysctl -x\" to view flags properly." 218 219#define IXL_SYSCTL_HELP_FC \ 220"\nSet flow control mode using the values below.\n" \ 221"\t0 - off\n" \ 222"\t1 - rx pause\n" \ 223"\t2 - tx pause\n" \ 224"\t3 - tx and rx pause" 225 226#define IXL_SYSCTL_HELP_LINK_STATUS \ 227"\nExecutes a \"Get Link Status\" command on the Admin Queue, and displays" \ 228" the response." 229 230#define IXL_SYSCTL_HELP_FW_LLDP \ 231"\nFW LLDP engine:\n" \ 232"\t0 - disable\n" \ 233"\t1 - enable\n" 234 235#define IXL_SYSCTL_HELP_SET_LINK_ACTIVE \ 236"\nKeep link active after setting interface down:\n" \ 237"\t0 - disable\n" \ 238"\t1 - enable\n" 239 240#define IXL_SYSCTL_HELP_READ_I2C \ 241"\nRead a byte from I2C bus\n" \ 242"Input: 32-bit value\n" \ 243"\tbits 0-7: device address (0xA0 or 0xA2)\n" \ 244"\tbits 8-15: offset (0-255)\n" \ 245"\tbits 16-31: unused\n" \ 246"Output: 8-bit value read" 247 248#define IXL_SYSCTL_HELP_WRITE_I2C \ 249"\nWrite a byte to the I2C bus\n" \ 250"Input: 32-bit value\n" \ 251"\tbits 0-7: device address (0xA0 or 0xA2)\n" \ 252"\tbits 8-15: offset (0-255)\n" \ 253"\tbits 16-23: value to write\n" \ 254"\tbits 24-31: unused\n" \ 255"Output: 8-bit value written" 256 257#define IXL_SYSCTL_HELP_I2C_METHOD \ 258"\nI2C access method that driver will use:\n" \ 259"\t0 - best available method\n" \ 260"\t1 - bit bang via I2CPARAMS register\n" \ 261"\t2 - register read/write via I2CCMD register\n" \ 262"\t3 - Use Admin Queue command (best)\n" \ 263"Using the Admin Queue is only supported on 710 devices with FW version 1.7 or higher" 264 265#define IXL_SYSCTL_HELP_VF_LOOPBACK \ 266"\nDetermines mode that embedded device switch will use when SR-IOV is initialized:\n" \ 267"\t0 - Disable (VEPA)\n" \ 268"\t1 - Enable (VEB)\n" \ 269"Enabling this will allow VFs in separate VMs to communicate over the hardware bridge." 270 271/*** Functions / Macros ***/ 272/* Adjust the level here to 10 or over to print stats messages */ 273#define I40E_VC_DEBUG(p, level, ...) \ 274 do { \ 275 if (level < 10) \ 276 ixl_dbg(p, IXL_DBG_IOV_VC, ##__VA_ARGS__); \ 277 } while (0) 278 279#define i40e_send_vf_nack(pf, vf, op, st) \ 280 ixl_send_vf_nack_msg((pf), (vf), (op), (st), __FILE__, __LINE__) 281 282/* Debug printing */ 283#define ixl_dbg(pf, m, s, ...) ixl_debug_core((pf)->dev, (pf)->dbg_mask, m, s, ##__VA_ARGS__) 284#define ixl_dbg_info(pf, s, ...) ixl_debug_core((pf)->dev, (pf)->dbg_mask, IXL_DBG_INFO, s, ##__VA_ARGS__) 285#define ixl_dbg_filter(pf, s, ...) ixl_debug_core((pf)->dev, (pf)->dbg_mask, IXL_DBG_FILTER, s, ##__VA_ARGS__) 286#define ixl_dbg_iov(pf, s, ...) ixl_debug_core((pf)->dev, (pf)->dbg_mask, IXL_DBG_IOV, s, ##__VA_ARGS__) 287#define ixl_dbg_link(pf, s, ...) ixl_debug_core((pf)->dev, (pf)->dbg_mask, IXL_DBG_LINK, s, ##__VA_ARGS__) 288 289/* PF-only function declarations */ 290void ixl_set_state(volatile u32 *s, enum ixl_state bit); 291void ixl_clear_state(volatile u32 *s, enum ixl_state bit); 292bool ixl_test_state(volatile u32 *s, enum ixl_state bit); 293u32 ixl_testandset_state(volatile u32 *s, enum ixl_state bit); 294int ixl_setup_interface(device_t, struct ixl_pf *); 295void ixl_print_nvm_cmd(device_t, struct i40e_nvm_access *); 296 297void ixl_handle_que(void *context, int pending); 298 299void ixl_init(void *); 300void ixl_register_vlan(void *, if_t, u16); 301void ixl_unregister_vlan(void *, if_t, u16); 302int ixl_intr(void *); 303int ixl_msix_que(void *); 304int ixl_msix_adminq(void *); 305void ixl_do_adminq(void *, int); 306 307int ixl_res_alloc_cmp(const void *, const void *); 308const char * ixl_switch_res_type_string(u8); 309void ixl_add_sysctls_mac_stats(struct sysctl_ctx_list *, 310 struct sysctl_oid_list *, struct i40e_hw_port_stats *); 311 312void ixl_media_status(if_t, struct ifmediareq *); 313int ixl_media_change(if_t); 314int ixl_ioctl(if_t, u_long, caddr_t); 315 316void ixl_enable_queue(struct i40e_hw *, int); 317void ixl_disable_queue(struct i40e_hw *, int); 318void ixl_enable_intr0(struct i40e_hw *); 319void ixl_disable_intr0(struct i40e_hw *); 320void ixl_nvm_version_str(struct i40e_hw *hw, struct sbuf *buf); 321void ixl_stat_update48(struct i40e_hw *, u32, u32, bool, 322 u64 *, u64 *); 323void ixl_stat_update32(struct i40e_hw *, u32, bool, 324 u64 *, u64 *); 325 326void ixl_stop(struct ixl_pf *); 327void ixl_vsi_add_sysctls(struct ixl_vsi *, const char *, bool); 328int ixl_get_hw_capabilities(struct ixl_pf *); 329void ixl_link_up_msg(struct ixl_pf *); 330void ixl_update_link_status(struct ixl_pf *); 331int ixl_setup_stations(struct ixl_pf *); 332int ixl_switch_config(struct ixl_pf *); 333void ixl_stop_locked(struct ixl_pf *); 334int ixl_teardown_hw_structs(struct ixl_pf *); 335void ixl_init_locked(struct ixl_pf *); 336void ixl_set_rss_key(struct ixl_pf *); 337void ixl_set_rss_pctypes(struct ixl_pf *); 338void ixl_set_rss_hlut(struct ixl_pf *); 339int ixl_setup_adminq_msix(struct ixl_pf *); 340int ixl_setup_adminq_tq(struct ixl_pf *); 341void ixl_teardown_adminq_msix(struct ixl_pf *); 342void ixl_configure_intr0_msix(struct ixl_pf *); 343void ixl_configure_queue_intr_msix(struct ixl_pf *); 344void ixl_free_adminq_tq(struct ixl_pf *); 345int ixl_setup_legacy(struct ixl_pf *); 346int ixl_init_msix(struct ixl_pf *); 347void ixl_configure_tx_itr(struct ixl_pf *); 348void ixl_configure_rx_itr(struct ixl_pf *); 349void ixl_configure_itr(struct ixl_pf *); 350void ixl_configure_legacy(struct ixl_pf *); 351void ixl_free_pci_resources(struct ixl_pf *); 352void ixl_link_event(struct ixl_pf *, struct i40e_arq_event_info *); 353void ixl_config_rss(struct ixl_pf *); 354int ixl_set_advertised_speeds(struct ixl_pf *, int, bool); 355void ixl_set_initial_advertised_speeds(struct ixl_pf *); 356void ixl_print_nvm_version(struct ixl_pf *pf); 357void ixl_add_sysctls_recovery_mode(struct ixl_pf *); 358void ixl_add_device_sysctls(struct ixl_pf *); 359void ixl_handle_mdd_event(struct ixl_pf *); 360void ixl_add_hw_stats(struct ixl_pf *); 361void ixl_update_stats_counters(struct ixl_pf *); 362void ixl_pf_reset_stats(struct ixl_pf *); 363void ixl_get_bus_info(struct ixl_pf *pf); 364int ixl_aq_get_link_status(struct ixl_pf *, 365 struct i40e_aqc_get_link_status *); 366void ixl_set_link(struct ixl_pf *, bool); 367 368int ixl_handle_nvmupd_cmd(struct ixl_pf *, struct ifdrv *); 369int ixl_handle_i2c_eeprom_read_cmd(struct ixl_pf *, struct ifreq *ifr); 370 371int ixl_setup_hmc(struct ixl_pf *); 372void ixl_shutdown_hmc(struct ixl_pf *); 373void ixl_handle_empr_reset(struct ixl_pf *); 374int ixl_prepare_for_reset(struct ixl_pf *pf, bool is_up); 375int ixl_rebuild_hw_structs_after_reset(struct ixl_pf *, bool is_up); 376int ixl_pf_reset(struct ixl_pf *); 377 378void ixl_set_queue_rx_itr(struct ixl_rx_queue *); 379void ixl_set_queue_tx_itr(struct ixl_tx_queue *); 380 381void ixl_add_filter(struct ixl_vsi *, const u8 *, s16 vlan); 382void ixl_del_filter(struct ixl_vsi *, const u8 *, s16 vlan); 383void ixl_add_vlan_filters(struct ixl_vsi *, const u8 *); 384void ixl_del_all_vlan_filters(struct ixl_vsi *, const u8 *); 385void ixl_reconfigure_filters(struct ixl_vsi *vsi); 386 387int ixl_disable_rings(struct ixl_pf *, struct ixl_vsi *, struct ixl_pf_qtag *); 388int ixl_disable_tx_ring(struct ixl_pf *, struct ixl_pf_qtag *, u16); 389int ixl_disable_rx_ring(struct ixl_pf *, struct ixl_pf_qtag *, u16); 390int ixl_disable_ring(struct ixl_pf *pf, struct ixl_pf_qtag *, u16); 391 392int ixl_enable_rings(struct ixl_vsi *); 393int ixl_enable_tx_ring(struct ixl_pf *, struct ixl_pf_qtag *, u16); 394int ixl_enable_rx_ring(struct ixl_pf *, struct ixl_pf_qtag *, u16); 395int ixl_enable_ring(struct ixl_pf *pf, struct ixl_pf_qtag *, u16); 396 397void ixl_update_eth_stats(struct ixl_vsi *); 398void ixl_cap_txcsum_tso(struct ixl_vsi *, if_t, int); 399int ixl_initialize_vsi(struct ixl_vsi *); 400void ixl_add_ifmedia(struct ifmedia *, u64); 401int ixl_setup_queue_msix(struct ixl_vsi *); 402int ixl_setup_queue_tqs(struct ixl_vsi *); 403int ixl_teardown_queue_msix(struct ixl_vsi *); 404void ixl_free_queue_tqs(struct ixl_vsi *); 405void ixl_enable_intr(struct ixl_vsi *); 406void ixl_disable_rings_intr(struct ixl_vsi *); 407void ixl_set_promisc(struct ixl_vsi *); 408void ixl_add_multi(struct ixl_vsi *); 409void ixl_del_multi(struct ixl_vsi *, bool); 410void ixl_setup_vlan_filters(struct ixl_vsi *); 411void ixl_init_filters(struct ixl_vsi *); 412void ixl_free_filters(struct ixl_ftl_head *); 413void ixl_add_hw_filters(struct ixl_vsi *, struct ixl_ftl_head *, int); 414void ixl_del_hw_filters(struct ixl_vsi *, struct ixl_ftl_head *, int); 415void ixl_del_default_hw_filters(struct ixl_vsi *); 416struct ixl_mac_filter * 417 ixl_find_filter(struct ixl_ftl_head *, const u8 *, s16); 418void ixl_update_vsi_stats(struct ixl_vsi *); 419void ixl_vsi_reset_stats(struct ixl_vsi *); 420 421void ixl_vsi_free_queues(struct ixl_vsi *vsi); 422 423void ixl_if_init(if_ctx_t ctx); 424void ixl_if_stop(if_ctx_t ctx); 425 426/* 427 * I2C Function prototypes 428 */ 429int ixl_find_i2c_interface(struct ixl_pf *); 430s32 ixl_read_i2c_byte_bb(struct ixl_pf *pf, u8 byte_offset, 431 u8 dev_addr, u8 *data); 432s32 ixl_write_i2c_byte_bb(struct ixl_pf *pf, u8 byte_offset, 433 u8 dev_addr, u8 data); 434s32 ixl_read_i2c_byte_reg(struct ixl_pf *pf, u8 byte_offset, 435 u8 dev_addr, u8 *data); 436s32 ixl_write_i2c_byte_reg(struct ixl_pf *pf, u8 byte_offset, 437 u8 dev_addr, u8 data); 438s32 ixl_read_i2c_byte_aq(struct ixl_pf *pf, u8 byte_offset, 439 u8 dev_addr, u8 *data); 440s32 ixl_write_i2c_byte_aq(struct ixl_pf *pf, u8 byte_offset, 441 u8 dev_addr, u8 data); 442 443u64 ixl_max_aq_speed_to_value(u8); 444int ixl_attach_get_link_status(struct ixl_pf *); 445int ixl_sysctl_set_flowcntl(SYSCTL_HANDLER_ARGS); 446 447#endif /* _IXL_PF_H_ */ 448