1/* SPDX-License-Identifier: BSD-3-Clause */ 2/* Copyright (c) 2024, Intel Corporation 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * 3. Neither the name of the Intel Corporation nor the names of its 16 * contributors may be used to endorse or promote products derived from 17 * this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32#ifndef _ICE_FLOW_H_ 33#define _ICE_FLOW_H_ 34 35#include "ice_flex_type.h" 36 37#define ICE_IPV4_MAKE_PREFIX_MASK(prefix) ((u32)(~0) << (32 - (prefix))) 38#define ICE_FLOW_PROF_ID_INVAL 0xfffffffffffffffful 39#define ICE_FLOW_PROF_ID_BYPASS 0 40#define ICE_FLOW_PROF_ID_DEFAULT 1 41#define ICE_FLOW_ENTRY_HANDLE_INVAL 0 42#define ICE_FLOW_VSI_INVAL 0xffff 43#define ICE_FLOW_FLD_OFF_INVAL 0xffff 44 45/* Generate flow hash field from flow field type(s) */ 46#define ICE_FLOW_HASH_IPV4 \ 47 (BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_SA) | \ 48 BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_DA)) 49#define ICE_FLOW_HASH_IPV6 \ 50 (BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_SA) | \ 51 BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_DA)) 52#define ICE_FLOW_HASH_TCP_PORT \ 53 (BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_SRC_PORT) | \ 54 BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_DST_PORT)) 55#define ICE_FLOW_HASH_UDP_PORT \ 56 (BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_SRC_PORT) | \ 57 BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_DST_PORT)) 58#define ICE_FLOW_HASH_SCTP_PORT \ 59 (BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT) | \ 60 BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_DST_PORT)) 61 62#define ICE_HASH_INVALID 0 63#define ICE_HASH_TCP_IPV4 (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_TCP_PORT) 64#define ICE_HASH_TCP_IPV6 (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_TCP_PORT) 65#define ICE_HASH_UDP_IPV4 (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_UDP_PORT) 66#define ICE_HASH_UDP_IPV6 (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_UDP_PORT) 67#define ICE_HASH_SCTP_IPV4 (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_SCTP_PORT) 68#define ICE_HASH_SCTP_IPV6 (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_SCTP_PORT) 69 70/* Protocol header fields within a packet segment. A segment consists of one or 71 * more protocol headers that make up a logical group of protocol headers. Each 72 * logical group of protocol headers encapsulates or is encapsulated using/by 73 * tunneling or encapsulation protocols for network virtualization such as GRE, 74 * VxLAN, etc. 75 */ 76enum ice_flow_seg_hdr { 77 ICE_FLOW_SEG_HDR_NONE = 0x00000000, 78 ICE_FLOW_SEG_HDR_ETH = 0x00000001, 79 ICE_FLOW_SEG_HDR_VLAN = 0x00000002, 80 ICE_FLOW_SEG_HDR_IPV4 = 0x00000004, 81 ICE_FLOW_SEG_HDR_IPV6 = 0x00000008, 82 ICE_FLOW_SEG_HDR_ARP = 0x00000010, 83 ICE_FLOW_SEG_HDR_ICMP = 0x00000020, 84 ICE_FLOW_SEG_HDR_TCP = 0x00000040, 85 ICE_FLOW_SEG_HDR_UDP = 0x00000080, 86 ICE_FLOW_SEG_HDR_SCTP = 0x00000100, 87 ICE_FLOW_SEG_HDR_GRE = 0x00000200, 88 /* The following is an additive bit for ICE_FLOW_SEG_HDR_IPV4 and 89 * ICE_FLOW_SEG_HDR_IPV6. 90 */ 91 ICE_FLOW_SEG_HDR_IPV_FRAG = 0x40000000, 92 ICE_FLOW_SEG_HDR_IPV_OTHER = 0x80000000, 93}; 94 95enum ice_flow_field { 96 /* L2 */ 97 ICE_FLOW_FIELD_IDX_ETH_DA, 98 ICE_FLOW_FIELD_IDX_ETH_SA, 99 ICE_FLOW_FIELD_IDX_S_VLAN, 100 ICE_FLOW_FIELD_IDX_C_VLAN, 101 ICE_FLOW_FIELD_IDX_ETH_TYPE, 102 /* L3 */ 103 ICE_FLOW_FIELD_IDX_IPV4_DSCP, 104 ICE_FLOW_FIELD_IDX_IPV6_DSCP, 105 ICE_FLOW_FIELD_IDX_IPV4_TTL, 106 ICE_FLOW_FIELD_IDX_IPV4_PROT, 107 ICE_FLOW_FIELD_IDX_IPV6_TTL, 108 ICE_FLOW_FIELD_IDX_IPV6_PROT, 109 ICE_FLOW_FIELD_IDX_IPV4_SA, 110 ICE_FLOW_FIELD_IDX_IPV4_DA, 111 ICE_FLOW_FIELD_IDX_IPV6_SA, 112 ICE_FLOW_FIELD_IDX_IPV6_DA, 113 /* L4 */ 114 ICE_FLOW_FIELD_IDX_TCP_SRC_PORT, 115 ICE_FLOW_FIELD_IDX_TCP_DST_PORT, 116 ICE_FLOW_FIELD_IDX_UDP_SRC_PORT, 117 ICE_FLOW_FIELD_IDX_UDP_DST_PORT, 118 ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT, 119 ICE_FLOW_FIELD_IDX_SCTP_DST_PORT, 120 ICE_FLOW_FIELD_IDX_TCP_FLAGS, 121 /* ARP */ 122 ICE_FLOW_FIELD_IDX_ARP_SIP, 123 ICE_FLOW_FIELD_IDX_ARP_DIP, 124 ICE_FLOW_FIELD_IDX_ARP_SHA, 125 ICE_FLOW_FIELD_IDX_ARP_DHA, 126 ICE_FLOW_FIELD_IDX_ARP_OP, 127 /* ICMP */ 128 ICE_FLOW_FIELD_IDX_ICMP_TYPE, 129 ICE_FLOW_FIELD_IDX_ICMP_CODE, 130 /* GRE */ 131 ICE_FLOW_FIELD_IDX_GRE_KEYID, 132 /* The total number of enums must not exceed 64 */ 133 ICE_FLOW_FIELD_IDX_MAX 134}; 135 136/* Flow headers and fields for AVF support */ 137enum ice_flow_avf_hdr_field { 138 /* Values 0 - 28 are reserved for future use */ 139 ICE_AVF_FLOW_FIELD_INVALID = 0, 140 ICE_AVF_FLOW_FIELD_UNICAST_IPV4_UDP = 29, 141 ICE_AVF_FLOW_FIELD_MULTICAST_IPV4_UDP, 142 ICE_AVF_FLOW_FIELD_IPV4_UDP, 143 ICE_AVF_FLOW_FIELD_IPV4_TCP_SYN_NO_ACK, 144 ICE_AVF_FLOW_FIELD_IPV4_TCP, 145 ICE_AVF_FLOW_FIELD_IPV4_SCTP, 146 ICE_AVF_FLOW_FIELD_IPV4_OTHER, 147 ICE_AVF_FLOW_FIELD_FRAG_IPV4, 148 /* Values 37-38 are reserved */ 149 ICE_AVF_FLOW_FIELD_UNICAST_IPV6_UDP = 39, 150 ICE_AVF_FLOW_FIELD_MULTICAST_IPV6_UDP, 151 ICE_AVF_FLOW_FIELD_IPV6_UDP, 152 ICE_AVF_FLOW_FIELD_IPV6_TCP_SYN_NO_ACK, 153 ICE_AVF_FLOW_FIELD_IPV6_TCP, 154 ICE_AVF_FLOW_FIELD_IPV6_SCTP, 155 ICE_AVF_FLOW_FIELD_IPV6_OTHER, 156 ICE_AVF_FLOW_FIELD_FRAG_IPV6, 157 ICE_AVF_FLOW_FIELD_RSVD47, 158 ICE_AVF_FLOW_FIELD_FCOE_OX, 159 ICE_AVF_FLOW_FIELD_FCOE_RX, 160 ICE_AVF_FLOW_FIELD_FCOE_OTHER, 161 /* Values 51-62 are reserved */ 162 ICE_AVF_FLOW_FIELD_L2_PAYLOAD = 63, 163 ICE_AVF_FLOW_FIELD_MAX 164}; 165 166/* Supported RSS offloads This macro is defined to support 167 * VIRTCHNL_OP_GET_RSS_HENA_CAPS ops. PF driver sends the RSS hardware 168 * capabilities to the caller of this ops. 169 */ 170#define ICE_DEFAULT_RSS_HENA ( \ 171 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_UDP) | \ 172 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP) | \ 173 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP) | \ 174 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_OTHER) | \ 175 BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV4) | \ 176 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_UDP) | \ 177 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP) | \ 178 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP) | \ 179 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_OTHER) | \ 180 BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV6) | \ 181 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP_SYN_NO_ACK) | \ 182 BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV4_UDP) | \ 183 BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV4_UDP) | \ 184 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP_SYN_NO_ACK) | \ 185 BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV6_UDP) | \ 186 BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV6_UDP)) 187 188enum ice_rss_cfg_hdr_type { 189 ICE_RSS_OUTER_HEADERS, /* take outer headers as inputset. */ 190 ICE_RSS_INNER_HEADERS, /* take inner headers as inputset. */ 191 /* take inner headers as inputset for packet with outer IPv4. */ 192 ICE_RSS_INNER_HEADERS_W_OUTER_IPV4, 193 /* take inner headers as inputset for packet with outer IPv6. */ 194 ICE_RSS_INNER_HEADERS_W_OUTER_IPV6, 195 /* take outer headers first then inner headers as inputset */ 196 /* take inner as inputset for GTPoGRE with outer IPv4 + GRE. */ 197 ICE_RSS_INNER_HEADERS_W_OUTER_IPV4_GRE, 198 /* take inner as inputset for GTPoGRE with outer IPv6 + GRE. */ 199 ICE_RSS_INNER_HEADERS_W_OUTER_IPV6_GRE, 200 ICE_RSS_ANY_HEADERS 201}; 202 203struct ice_rss_hash_cfg { 204 u32 addl_hdrs; /* protocol header fields */ 205 u64 hash_flds; /* hash bit field (ICE_FLOW_HASH_*) to configure */ 206 enum ice_rss_cfg_hdr_type hdr_type; /* to specify inner or outer */ 207 bool symm; /* symmetric or asymmetric hash */ 208}; 209 210enum ice_flow_dir { 211 ICE_FLOW_DIR_UNDEFINED = 0, 212 ICE_FLOW_TX = 0x01, 213 ICE_FLOW_RX = 0x02, 214 ICE_FLOW_TX_RX = ICE_FLOW_RX | ICE_FLOW_TX 215}; 216 217enum ice_flow_priority { 218 ICE_FLOW_PRIO_LOW, 219 ICE_FLOW_PRIO_NORMAL, 220 ICE_FLOW_PRIO_HIGH 221}; 222 223#define ICE_FLOW_SEG_SINGLE 1 224#define ICE_FLOW_SEG_MAX 2 225#define ICE_FLOW_PROFILE_MAX 1024 226#define ICE_FLOW_ACL_FIELD_VECTOR_MAX 32 227#define ICE_FLOW_FV_EXTRACT_SZ 2 228 229#define ICE_FLOW_SET_HDRS(seg, val) ((seg)->hdrs |= (u32)(val)) 230 231struct ice_flow_seg_xtrct { 232 u8 prot_id; /* Protocol ID of extracted header field */ 233 u16 off; /* Starting offset of the field in header in bytes */ 234 u8 idx; /* Index of FV entry used */ 235 u8 disp; /* Displacement of field in bits fr. FV entry's start */ 236}; 237 238enum ice_flow_fld_match_type { 239 ICE_FLOW_FLD_TYPE_REG, /* Value, mask */ 240 ICE_FLOW_FLD_TYPE_RANGE, /* Value, mask, last (upper bound) */ 241 ICE_FLOW_FLD_TYPE_PREFIX, /* IP address, prefix, size of prefix */ 242 ICE_FLOW_FLD_TYPE_SIZE, /* Value, mask, size of match */ 243}; 244 245struct ice_flow_fld_loc { 246 /* Describe offsets of field information relative to the beginning of 247 * input buffer provided when adding flow entries. 248 */ 249 u16 val; /* Offset where the value is located */ 250 u16 mask; /* Offset where the mask/prefix value is located */ 251 u16 last; /* Length or offset where the upper value is located */ 252}; 253 254struct ice_flow_fld_info { 255 enum ice_flow_fld_match_type type; 256 /* Location where to retrieve data from an input buffer */ 257 struct ice_flow_fld_loc src; 258 /* Location where to put the data into the final entry buffer */ 259 struct ice_flow_fld_loc entry; 260 struct ice_flow_seg_xtrct xtrct; 261}; 262 263struct ice_flow_seg_info { 264 u32 hdrs; /* Bitmask indicating protocol headers present */ 265 /* Bitmask indicating header fields to be matched */ 266 ice_declare_bitmap(match, ICE_FLOW_FIELD_IDX_MAX); 267 /* Bitmask indicating header fields matched as ranges */ 268 ice_declare_bitmap(range, ICE_FLOW_FIELD_IDX_MAX); 269 270 struct ice_flow_fld_info fields[ICE_FLOW_FIELD_IDX_MAX]; 271}; 272 273#define ICE_FLOW_ENTRY_HNDL(e) ((u64)e) 274 275struct ice_flow_prof { 276 struct LIST_ENTRY_TYPE l_entry; 277 278 u64 id; 279 enum ice_flow_dir dir; 280 u8 segs_cnt; 281 282 struct ice_flow_seg_info segs[ICE_FLOW_SEG_MAX]; 283 284 /* software VSI handles referenced by this flow profile */ 285 ice_declare_bitmap(vsis, ICE_MAX_VSI); 286 287 union { 288 /* struct sw_recipe */ 289 bool symm; /* Symmetric Hash for RSS */ 290 } cfg; 291}; 292 293struct ice_rss_cfg { 294 struct LIST_ENTRY_TYPE l_entry; 295 /* bitmap of VSIs added to the RSS entry */ 296 ice_declare_bitmap(vsis, ICE_MAX_VSI); 297 struct ice_rss_hash_cfg hash; 298}; 299 300enum ice_flow_action_type { 301 ICE_FLOW_ACT_NOP, 302 ICE_FLOW_ACT_ALLOW, 303 ICE_FLOW_ACT_DROP, 304 ICE_FLOW_ACT_CNTR_PKT, 305 ICE_FLOW_ACT_FWD_VSI, 306 ICE_FLOW_ACT_FWD_VSI_LIST, /* Should be abstracted away */ 307 ICE_FLOW_ACT_FWD_QUEUE, /* Can Queues be abstracted away? */ 308 ICE_FLOW_ACT_FWD_QUEUE_GROUP, /* Can Queues be abstracted away? */ 309 ICE_FLOW_ACT_PUSH, 310 ICE_FLOW_ACT_POP, 311 ICE_FLOW_ACT_MODIFY, 312 ICE_FLOW_ACT_CNTR_BYTES, 313 ICE_FLOW_ACT_CNTR_PKT_BYTES, 314 ICE_FLOW_ACT_GENERIC_0, 315 ICE_FLOW_ACT_GENERIC_1, 316 ICE_FLOW_ACT_GENERIC_2, 317 ICE_FLOW_ACT_GENERIC_3, 318 ICE_FLOW_ACT_GENERIC_4, 319 ICE_FLOW_ACT_RPT_FLOW_ID, 320 ICE_FLOW_ACT_BUILD_PROF_IDX, 321}; 322 323struct ice_flow_action { 324 enum ice_flow_action_type type; 325 union { 326 u32 dummy; 327 } data; 328}; 329 330u64 331ice_flow_find_prof(struct ice_hw *hw, enum ice_block blk, enum ice_flow_dir dir, 332 struct ice_flow_seg_info *segs, u8 segs_cnt); 333enum ice_status 334ice_flow_assoc_vsig_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi_handle, 335 u16 vsig); 336enum ice_status 337ice_flow_get_hw_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id, 338 u8 *hw_prof); 339void 340ice_flow_set_fld_prefix(struct ice_flow_seg_info *seg, enum ice_flow_field fld, 341 u16 val_loc, u16 prefix_loc, u8 prefix_sz); 342void ice_rem_vsi_rss_list(struct ice_hw *hw, u16 vsi_handle); 343enum ice_status ice_replay_rss_cfg(struct ice_hw *hw, u16 vsi_handle); 344enum ice_status 345ice_add_avf_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds); 346enum ice_status ice_rem_vsi_rss_cfg(struct ice_hw *hw, u16 vsi_handle); 347enum ice_status 348ice_add_rss_cfg(struct ice_hw *hw, u16 vsi_handle, 349 const struct ice_rss_hash_cfg *cfg); 350enum ice_status 351ice_rem_rss_cfg(struct ice_hw *hw, u16 vsi_handle, 352 const struct ice_rss_hash_cfg *cfg); 353u64 ice_get_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u32 hdrs); 354#endif /* _ICE_FLOW_H_ */ 355