1/* SPDX-License-Identifier: BSD-3-Clause */
2/*  Copyright (c) 2021, Intel Corporation
3 *  All rights reserved.
4 *
5 *  Redistribution and use in source and binary forms, with or without
6 *  modification, are permitted provided that the following conditions are met:
7 *
8 *   1. Redistributions of source code must retain the above copyright notice,
9 *      this list of conditions and the following disclaimer.
10 *
11 *   2. Redistributions in binary form must reproduce the above copyright
12 *      notice, this list of conditions and the following disclaimer in the
13 *      documentation and/or other materials provided with the distribution.
14 *
15 *   3. Neither the name of the Intel Corporation nor the names of its
16 *      contributors may be used to endorse or promote products derived from
17 *      this software without specific prior written permission.
18 *
19 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
23 *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 *  POSSIBILITY OF SUCH DAMAGE.
30 */
31
32#ifndef _IAVF_ADMINQ_H_
33#define _IAVF_ADMINQ_H_
34
35#include "iavf_osdep.h"
36#include "iavf_status.h"
37#include "iavf_adminq_cmd.h"
38
39#define IAVF_ADMINQ_DESC(R, i)   \
40	(&(((struct iavf_aq_desc *)((R).desc_buf.va))[i]))
41
42#define IAVF_ADMINQ_DESC_ALIGNMENT 4096
43
44struct iavf_adminq_ring {
45	struct iavf_virt_mem dma_head;	/* space for dma structures */
46	struct iavf_dma_mem desc_buf;	/* descriptor ring memory */
47	struct iavf_virt_mem cmd_buf;	/* command buffer memory */
48
49	union {
50		struct iavf_dma_mem *asq_bi;
51		struct iavf_dma_mem *arq_bi;
52	} r;
53
54	u16 count;		/* Number of descriptors */
55	u16 rx_buf_len;		/* Admin Receive Queue buffer length */
56
57	/* used for interrupt processing */
58	u16 next_to_use;
59	u16 next_to_clean;
60
61	/* used for queue tracking */
62	u32 head;
63	u32 tail;
64	u32 len;
65	u32 bah;
66	u32 bal;
67};
68
69/* ASQ transaction details */
70struct iavf_asq_cmd_details {
71	void *callback; /* cast from type IAVF_ADMINQ_CALLBACK */
72	u64 cookie;
73	u16 flags_ena;
74	u16 flags_dis;
75	bool async;
76	bool postpone;
77	struct iavf_aq_desc *wb_desc;
78};
79
80#define IAVF_ADMINQ_DETAILS(R, i)   \
81	(&(((struct iavf_asq_cmd_details *)((R).cmd_buf.va))[i]))
82
83/* ARQ event information */
84struct iavf_arq_event_info {
85	struct iavf_aq_desc desc;
86	u16 msg_len;
87	u16 buf_len;
88	u8 *msg_buf;
89};
90
91/* Admin Queue information */
92struct iavf_adminq_info {
93	struct iavf_adminq_ring arq;    /* receive queue */
94	struct iavf_adminq_ring asq;    /* send queue */
95	u32 asq_cmd_timeout;            /* send queue cmd write back timeout*/
96	u16 num_arq_entries;            /* receive queue depth */
97	u16 num_asq_entries;            /* send queue depth */
98	u16 arq_buf_size;               /* receive queue buffer size */
99	u16 asq_buf_size;               /* send queue buffer size */
100	u16 fw_maj_ver;                 /* firmware major version */
101	u16 fw_min_ver;                 /* firmware minor version */
102	u32 fw_build;                   /* firmware build number */
103	u16 api_maj_ver;                /* api major version */
104	u16 api_min_ver;                /* api minor version */
105
106	struct iavf_spinlock asq_spinlock; /* Send queue spinlock */
107	struct iavf_spinlock arq_spinlock; /* Receive queue spinlock */
108
109	/* last status values on send and receive queues */
110	enum iavf_admin_queue_err asq_last_status;
111	enum iavf_admin_queue_err arq_last_status;
112};
113
114/* general information */
115#define IAVF_AQ_LARGE_BUF	512
116#define IAVF_ASQ_CMD_TIMEOUT	250000  /* usecs */
117
118void iavf_fill_default_direct_cmd_desc(struct iavf_aq_desc *desc,
119				       u16 opcode);
120
121#endif /* _IAVF_ADMINQ_H_ */
122