1/*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2011 HighPoint Technologies, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29#include <dev/hptnr/hptnr_config.h> 30 31#ifndef HPT_INTF_H 32#define HPT_INTF_H 33 34#if defined(__BIG_ENDIAN__)&&!defined(__BIG_ENDIAN_BITFIELD) 35#define __BIG_ENDIAN_BITFIELD 36#endif 37 38#ifdef __cplusplus 39extern "C" { 40#endif 41 42#ifndef __GNUC__ 43#define __attribute__(x) 44#endif 45 46#pragma pack(1) 47 48/* 49 * Version of this interface. 50 * The user mode application must first issue a hpt_get_version() call to 51 * check HPT_INTERFACE_VERSION. When an utility using newer version interface 52 * is used with old version drivers, it must call only the functions that 53 * driver supported. 54 * A new version interface should only add ioctl functions; it should implement 55 * all old version functions without change their definition. 56 */ 57#define __this_HPT_INTERFACE_VERSION 0x02010000 58 59#ifndef HPT_INTERFACE_VERSION 60#error "You must define HPT_INTERFACE_VERSION you implemented" 61#endif 62 63#if HPT_INTERFACE_VERSION > __this_HPT_INTERFACE_VERSION 64#error "HPT_INTERFACE_VERSION is invalid" 65#endif 66 67/* 68 * DEFINITION 69 * Logical device --- a device that can be accessed by OS. 70 * Physical device --- device attached to the controller. 71 * A logical device can be simply a physical device. 72 * 73 * Each logical and physical device has a 32bit ID. GUI will use this ID 74 * to identify devices. 75 * 1. The ID must be unique. 76 * 2. The ID must be immutable. Once an ID is assigned to a device, it 77 * must not change when system is running and the device exists. 78 * 3. The ID of logical device must be NOT reusable. If a device is 79 * removed, other newly created logical device must not use the same ID. 80 * 4. The ID must not be zero or 0xFFFFFFFF. 81 */ 82typedef HPT_U32 DEVICEID; 83 84/* 85 * logical device type. 86 * Identify array (logical device) and physical device. 87 */ 88#define LDT_ARRAY 1 89#define LDT_DEVICE 2 90 91/* 92 * Array types 93 * GUI will treat all array as 1-level RAID. No RAID0/1 or RAID1/0. 94 * A RAID0/1 device is type AT_RAID1. A RAID1/0 device is type AT_RAID0. 95 * Their members may be another array of type RAID0 or RAID1. 96 */ 97#define AT_UNKNOWN 0 98#define AT_RAID0 1 99#define AT_RAID1 2 100#define AT_RAID5 3 101#define AT_RAID6 4 102#define AT_RAID3 5 103#define AT_RAID4 6 104#define AT_JBOD 7 105#define AT_RAID1E 8 106 107/* 108 * physical device type 109 */ 110#define PDT_UNKNOWN 0 111#define PDT_HARDDISK 1 112#define PDT_CDROM 2 113#define PDT_TAPE 3 114 115/* 116 * Some constants. 117 */ 118#define MAX_NAME_LENGTH 36 119#define MAX_ARRAYNAME_LEN 16 120 121#define MAX_ARRAY_MEMBERS_V1 8 122 123#ifndef MAX_ARRAY_MEMBERS_V2 124#define MAX_ARRAY_MEMBERS_V2 16 125#endif 126 127#ifndef MAX_ARRAY_MEMBERS_V3 128#define MAX_ARRAY_MEMBERS_V3 64 129#endif 130 131/* keep definition for source code compatibility */ 132#define MAX_ARRAY_MEMBERS MAX_ARRAY_MEMBERS_V1 133 134/* 135 * io commands 136 * GUI use these commands to do IO on logical/physical devices. 137 */ 138#define IO_COMMAND_READ 1 139#define IO_COMMAND_WRITE 2 140 141 142 143/* 144 * array flags 145 */ 146#define ARRAY_FLAG_DISABLED 0x00000001 /* The array is disabled */ 147#define ARRAY_FLAG_NEEDBUILDING 0x00000002 /* array data need to be rebuilt */ 148#define ARRAY_FLAG_REBUILDING 0x00000004 /* array is in rebuilding process */ 149#define ARRAY_FLAG_BROKEN 0x00000008 /* broken but may still working */ 150#define ARRAY_FLAG_BOOTDISK 0x00000010 /* array has a active partition */ 151 152#define ARRAY_FLAG_BOOTMARK 0x00000040 /* array has boot mark set */ 153#define ARRAY_FLAG_NEED_AUTOREBUILD 0x00000080 /* auto-rebuild should start */ 154#define ARRAY_FLAG_VERIFYING 0x00000100 /* is being verified */ 155#define ARRAY_FLAG_INITIALIZING 0x00000200 /* is being initialized */ 156#define ARRAY_FLAG_TRANSFORMING 0x00000400 /* transform in progress */ 157#define ARRAY_FLAG_NEEDTRANSFORM 0x00000800 /* array need transform */ 158#define ARRAY_FLAG_NEEDINITIALIZING 0x00001000 /* the array's initialization hasn't finished*/ 159#define ARRAY_FLAG_BROKEN_REDUNDANT 0x00002000 /* broken but redundant (raid6) */ 160#define ARRAY_FLAG_RAID15PLUS 0x80000000 /* display this RAID 1 as RAID 1.5 */ 161 162#define ARRAY_FLAG_ZERO_STARTING 0x40000000 /* start lba of all members of this array is 0 */ 163 164/* 165 * device flags 166 */ 167#define DEVICE_FLAG_DISABLED 0x00000001 /* device is disabled */ 168#define DEVICE_FLAG_BOOTDISK 0x00000002 /* disk has a active partition */ 169#define DEVICE_FLAG_BOOTMARK 0x00000004 /* disk has boot mark set */ 170#define DEVICE_FLAG_WITH_601 0x00000008 /* has HPT601 connected */ 171#define DEVICE_FLAG_SATA 0x00000010 /* SATA or SAS device */ 172#define DEVICE_FLAG_ON_PM_PORT 0x00000020 /* PM port */ 173#define DEVICE_FLAG_SAS 0x00000040 /* SAS device */ 174#define DEVICE_FLAG_IN_ENCLOSURE 0x00000080 /* PathId is enclosure# */ 175#define DEVICE_FLAG_UNINITIALIZED 0x00010000 /* device is not initialized, can't be used to create array */ 176#define DEVICE_FLAG_LEGACY 0x00020000 /* single disk & mbr contains at least one partition */ 177#define DEVICE_FLAG_BAD_SECTOR_FOUND 0x00040000 /* found bad sector on target disk, set and clear by GUI */ 178 179#define DEVICE_FLAG_IS_SPARE 0x80000000 /* is a spare disk */ 180 181 182#define DEVICE_FLAG_SSD 0x00000100 /* SSD device */ 183#define DEVICE_FLAG_3G 0x10000000 184#define DEVICE_FLAG_6G 0x20000000 185 186 187/* 188 * array states used by hpt_set_array_state() 189 */ 190/* old defines */ 191#define MIRROR_REBUILD_START 1 192#define MIRROR_REBUILD_ABORT 2 193#define MIRROR_REBUILD_COMPLETE 3 194/* new defines */ 195#define AS_REBUILD_START 1 196#define AS_REBUILD_ABORT 2 197#define AS_REBUILD_PAUSE AS_REBUILD_ABORT 198#define AS_REBUILD_COMPLETE 3 199#define AS_VERIFY_START 4 200#define AS_VERIFY_ABORT 5 201#define AS_VERIFY_COMPLETE 6 202#define AS_INITIALIZE_START 7 203#define AS_INITIALIZE_ABORT 8 204#define AS_INITIALIZE_COMPLETE 9 205#define AS_VERIFY_FAILED 10 206#define AS_REBUILD_STOP 11 207#define AS_SAVE_STATE 12 208#define AS_TRANSFORM_START 13 209#define AS_TRANSFORM_ABORT 14 210 211/************************************************************************ 212 * ioctl code 213 * It would be better if ioctl code are the same on different platforms, 214 * but we must not conflict with system defined ioctl code. 215 ************************************************************************/ 216#if defined(LINUX) || defined(__FreeBSD_version) || defined(linux) 217#define HPT_CTL_CODE(x) (x+0xFF00) 218#define HPT_CTL_CODE_LINUX_TO_IOP(x) ((x)-0xff00) 219#elif defined(_MS_WIN32_) || defined(WIN32) 220 221#ifndef CTL_CODE 222#define CTL_CODE( DeviceType, Function, Method, Access ) \ 223 (((DeviceType) << 16) | ((Access) << 14) | ((Function) << 2) | (Method)) 224#endif 225#define HPT_CTL_CODE(x) CTL_CODE(0x370, 0x900+(x), 0, 0) 226#define HPT_CTL_CODE_WIN32_TO_IOP(x) ((((x) & 0xffff)>>2)-0x900) 227 228#else 229#define HPT_CTL_CODE(x) (x) 230#endif 231 232#define HPT_IOCTL_GET_VERSION HPT_CTL_CODE(0) 233#define HPT_IOCTL_GET_CONTROLLER_COUNT HPT_CTL_CODE(1) 234#define HPT_IOCTL_GET_CONTROLLER_INFO HPT_CTL_CODE(2) 235#define HPT_IOCTL_GET_CHANNEL_INFO HPT_CTL_CODE(3) 236#define HPT_IOCTL_GET_LOGICAL_DEVICES HPT_CTL_CODE(4) 237#define HPT_IOCTL_GET_DEVICE_INFO HPT_CTL_CODE(5) 238#define HPT_IOCTL_CREATE_ARRAY HPT_CTL_CODE(6) 239#define HPT_IOCTL_DELETE_ARRAY HPT_CTL_CODE(7) 240#define HPT_IOCTL_ARRAY_IO HPT_CTL_CODE(8) 241#define HPT_IOCTL_DEVICE_IO HPT_CTL_CODE(9) 242#define HPT_IOCTL_GET_EVENT HPT_CTL_CODE(10) 243#define HPT_IOCTL_REBUILD_MIRROR HPT_CTL_CODE(11) 244/* use HPT_IOCTL_REBUILD_DATA_BLOCK from now on */ 245#define HPT_IOCTL_REBUILD_DATA_BLOCK HPT_IOCTL_REBUILD_MIRROR 246#define HPT_IOCTL_ADD_SPARE_DISK HPT_CTL_CODE(12) 247#define HPT_IOCTL_REMOVE_SPARE_DISK HPT_CTL_CODE(13) 248#define HPT_IOCTL_ADD_DISK_TO_ARRAY HPT_CTL_CODE(14) 249#define HPT_IOCTL_SET_ARRAY_STATE HPT_CTL_CODE(15) 250#define HPT_IOCTL_SET_ARRAY_INFO HPT_CTL_CODE(16) 251#define HPT_IOCTL_SET_DEVICE_INFO HPT_CTL_CODE(17) 252#define HPT_IOCTL_RESCAN_DEVICES HPT_CTL_CODE(18) 253#define HPT_IOCTL_GET_DRIVER_CAPABILITIES HPT_CTL_CODE(19) 254#define HPT_IOCTL_GET_601_INFO HPT_CTL_CODE(20) 255#define HPT_IOCTL_SET_601_INFO HPT_CTL_CODE(21) 256#define HPT_IOCTL_LOCK_DEVICE HPT_CTL_CODE(22) 257#define HPT_IOCTL_UNLOCK_DEVICE HPT_CTL_CODE(23) 258#define HPT_IOCTL_IDE_PASS_THROUGH HPT_CTL_CODE(24) 259#define HPT_IOCTL_VERIFY_DATA_BLOCK HPT_CTL_CODE(25) 260#define HPT_IOCTL_INITIALIZE_DATA_BLOCK HPT_CTL_CODE(26) 261#define HPT_IOCTL_ADD_DEDICATED_SPARE HPT_CTL_CODE(27) 262#define HPT_IOCTL_DEVICE_IO_EX HPT_CTL_CODE(28) 263#define HPT_IOCTL_SET_BOOT_MARK HPT_CTL_CODE(29) 264#define HPT_IOCTL_QUERY_REMOVE HPT_CTL_CODE(30) 265#define HPT_IOCTL_REMOVE_DEVICES HPT_CTL_CODE(31) 266#define HPT_IOCTL_CREATE_ARRAY_V2 HPT_CTL_CODE(32) 267#define HPT_IOCTL_GET_DEVICE_INFO_V2 HPT_CTL_CODE(33) 268#define HPT_IOCTL_SET_DEVICE_INFO_V2 HPT_CTL_CODE(34) 269#define HPT_IOCTL_REBUILD_DATA_BLOCK_V2 HPT_CTL_CODE(35) 270#define HPT_IOCTL_VERIFY_DATA_BLOCK_V2 HPT_CTL_CODE(36) 271#define HPT_IOCTL_INITIALIZE_DATA_BLOCK_V2 HPT_CTL_CODE(37) 272#define HPT_IOCTL_LOCK_DEVICE_V2 HPT_CTL_CODE(38) 273#define HPT_IOCTL_DEVICE_IO_V2 HPT_CTL_CODE(39) 274#define HPT_IOCTL_DEVICE_IO_EX_V2 HPT_CTL_CODE(40) 275#define HPT_IOCTL_CREATE_TRANSFORM HPT_CTL_CODE(41) 276#define HPT_IOCTL_STEP_TRANSFORM HPT_CTL_CODE(42) 277#define HPT_IOCTL_SET_VDEV_INFO HPT_CTL_CODE(43) 278#define HPT_IOCTL_CALC_MAX_CAPACITY HPT_CTL_CODE(44) 279#define HPT_IOCTL_INIT_DISKS HPT_CTL_CODE(45) 280#define HPT_IOCTL_GET_DEVICE_INFO_V3 HPT_CTL_CODE(46) 281#define HPT_IOCTL_GET_CONTROLLER_INFO_V2 HPT_CTL_CODE(47) 282#define HPT_IOCTL_I2C_TRANSACTION HPT_CTL_CODE(48) 283#define HPT_IOCTL_GET_PARAMETER_LIST HPT_CTL_CODE(49) 284#define HPT_IOCTL_GET_PARAMETER HPT_CTL_CODE(50) 285#define HPT_IOCTL_SET_PARAMETER HPT_CTL_CODE(51) 286#define HPT_IOCTL_GET_DRIVER_CAPABILITIES_V2 HPT_CTL_CODE(52) 287#define HPT_IOCTL_GET_CHANNEL_INFO_V2 HPT_CTL_CODE(53) 288#define HPT_IOCTL_GET_CONTROLLER_INFO_V3 HPT_CTL_CODE(54) 289#define HPT_IOCTL_GET_DEVICE_INFO_V4 HPT_CTL_CODE(55) 290#define HPT_IOCTL_CREATE_ARRAY_V3 HPT_CTL_CODE(56) 291#define HPT_IOCTL_CREATE_TRANSFORM_V2 HPT_CTL_CODE(57) 292#define HPT_IOCTL_CALC_MAX_CAPACITY_V2 HPT_CTL_CODE(58) 293#define HPT_IOCTL_SCSI_PASSTHROUGH HPT_CTL_CODE(59) 294#define HPT_IOCTL_GET_PHYSICAL_DEVICES HPT_CTL_CODE(60) 295#define HPT_IOCTL_GET_ENCLOSURE_COUNT HPT_CTL_CODE(61) 296#define HPT_IOCTL_GET_ENCLOSURE_INFO HPT_CTL_CODE(62) 297#define HPT_IOCTL_GET_PERFMON_STATUS HPT_CTL_CODE(63) 298#define HPT_IOCTL_SET_PERFMON_STATUS HPT_CTL_CODE(64) 299#define HPT_IOCTL_GET_PERFMON_DATA HPT_CTL_CODE(65) 300#define HPT_IOCTL_IDE_PASS_THROUGH_V2 HPT_CTL_CODE(66) 301#define HPT_IOCTL_GET_ENCLOSURE_INFO_V2 HPT_CTL_CODE(67) 302#define HPT_IOCTL_GET_ENCLOSURE_INFO_V3 HPT_CTL_CODE(68) 303#define HPT_IOCTL_ACCESS_CONFIG_REG HPT_CTL_CODE(69) 304 305#define HPT_IOCTL_GET_ENCLOSURE_INFO_V4 HPT_CTL_CODE(70) 306#define HPT_IOCTL_GET_ENCLOSURE_ELEMENT_INFO HPT_CTL_CODE(71) 307#define HPT_IOCTL_DUMP_METADATA HPT_CTL_CODE(72) 308#define HPT_IOCTL_GET_CONTROLLER_INFO_V2_EXT HPT_CTL_CODE(73) 309 310 311#define HPT_IOCTL_GET_CONTROLLER_IDS HPT_CTL_CODE(100) 312#define HPT_IOCTL_GET_DCB HPT_CTL_CODE(101) 313 314#define HPT_IOCTL_EPROM_IO HPT_CTL_CODE(102) 315#define HPT_IOCTL_GET_CONTROLLER_VENID HPT_CTL_CODE(103) 316 317 318#define HPT_IOCTL_GET_DRIVER_CAPABILITIES_CC HPT_CTL_CODE(200) 319#define HPT_IOCTL_GET_CCS_INFO HPT_CTL_CODE(201) 320#define HPT_IOCTL_CREATE_CC HPT_CTL_CODE(202) 321#define HPT_IOCTL_DELETE_CC HPT_CTL_CODE(203) 322#define HPT_IOCTL_REENABLE_ARRAY HPT_CTL_CODE(204) 323 324/************************************************************************ 325 * shared data structures 326 ************************************************************************/ 327 328/* 329 * Chip Type 330 */ 331#define CHIP_TYPE_HPT366 1 332#define CHIP_TYPE_HPT368 2 333#define CHIP_TYPE_HPT370 3 334#define CHIP_TYPE_HPT370A 4 335#define CHIP_TYPE_HPT370B 5 336#define CHIP_TYPE_HPT374 6 337#define CHIP_TYPE_HPT372 7 338#define CHIP_TYPE_HPT372A 8 339#define CHIP_TYPE_HPT302 9 340#define CHIP_TYPE_HPT371 10 341#define CHIP_TYPE_HPT372N 11 342#define CHIP_TYPE_HPT302N 12 343#define CHIP_TYPE_HPT371N 13 344#define CHIP_TYPE_SI3112A 14 345#define CHIP_TYPE_ICH5 15 346#define CHIP_TYPE_ICH5R 16 347#define CHIP_TYPE_MV50XX 20 348#define CHIP_TYPE_MV60X1 21 349#define CHIP_TYPE_MV60X2 22 350#define CHIP_TYPE_MV70X2 23 351#define CHIP_TYPE_MV5182 24 352#define CHIP_TYPE_IOP331 31 353#define CHIP_TYPE_IOP333 32 354#define CHIP_TYPE_IOP341 33 355#define CHIP_TYPE_IOP348 34 356 357/* 358 * Chip Flags 359 */ 360#define CHIP_SUPPORT_ULTRA_66 0x20 361#define CHIP_SUPPORT_ULTRA_100 0x40 362#define CHIP_HPT3XX_DPLL_MODE 0x80 363#define CHIP_SUPPORT_ULTRA_133 0x01 364#define CHIP_SUPPORT_ULTRA_150 0x02 365#define CHIP_MASTER 0x04 366#define CHIP_SUPPORT_SATA_300 0x08 367 368#define HPT_SPIN_UP_MODE_NOSUPPORT 0 369#define HPT_SPIN_UP_MODE_FULL 1 370#define HPT_SPIN_UP_MODE_STANDBY 2 371 372#define HPT_CAP_DUMP_METADATA 0x1 373#define HPT_CAP_DISK_CHECKING 0x2 374#define HPT_CAP_REPORT_SECTOR_SIZE 0x10 375 376typedef struct _DRIVER_CAPABILITIES { 377 HPT_U32 dwSize; 378 379 HPT_U8 MaximumControllers; /* maximum controllers the driver can support */ 380 HPT_U8 SupportCrossControllerRAID; /* 1-support, 0-not support */ 381 HPT_U8 MinimumBlockSizeShift; /* minimum block size shift */ 382 HPT_U8 MaximumBlockSizeShift; /* maximum block size shift */ 383 384 HPT_U8 SupportDiskModeSetting; 385 HPT_U8 SupportSparePool; 386 HPT_U8 MaximumArrayNameLength; 387 /* only one HPT_U8 left here! */ 388#ifdef __BIG_ENDIAN_BITFIELD 389 HPT_U8 reserved: 2; 390 HPT_U8 SupportPerformanceMonitor: 1; 391 HPT_U8 SupportVariableSectorSize: 1; 392 HPT_U8 SupportHotSwap: 1; 393 HPT_U8 HighPerformanceRAID1: 1; 394 HPT_U8 RebuildProcessInDriver: 1; 395 HPT_U8 SupportDedicatedSpare: 1; 396#else 397 HPT_U8 SupportDedicatedSpare: 1; /* call hpt_add_dedicated_spare() for dedicated spare. */ 398 HPT_U8 RebuildProcessInDriver: 1; /* Windows only. used by mid layer for rebuild control. */ 399 HPT_U8 HighPerformanceRAID1: 1; 400 HPT_U8 SupportHotSwap: 1; 401 HPT_U8 SupportVariableSectorSize: 1; 402 HPT_U8 SupportPerformanceMonitor: 1; 403 HPT_U8 reserved: 2; 404#endif 405 406 407 HPT_U8 SupportedRAIDTypes[16]; 408 /* maximum members in an array corresponding to SupportedRAIDTypes */ 409 HPT_U8 MaximumArrayMembers[16]; 410} 411DRIVER_CAPABILITIES, *PDRIVER_CAPABILITIES; 412 413typedef struct _DRIVER_CAPABILITIES_V2 { 414 DRIVER_CAPABILITIES v1; 415 HPT_U8 SupportedCachePolicies[16]; 416 HPT_U32 ConfigRegSize; /* max sectors */ 417 HPT_U32 SupportDiskCachePolicy; /* disable/enable disk cache policy */ 418 HPT_U32 Flags; 419 HPT_U32 reserved[14]; 420} 421DRIVER_CAPABILITIES_V2, *PDRIVER_CAPABILITIES_V2; 422 423/* 424 * Controller information. 425 */ 426typedef struct _CONTROLLER_INFO { 427 HPT_U8 ChipType; /* chip type */ 428 HPT_U8 InterruptLevel; /* IRQ level */ 429 HPT_U8 NumBuses; /* bus count */ 430 HPT_U8 ChipFlags; 431 432 HPT_U8 szProductID[MAX_NAME_LENGTH];/* product name */ 433 HPT_U8 szVendorID[MAX_NAME_LENGTH]; /* vender name */ 434 435} CONTROLLER_INFO, *PCONTROLLER_INFO; 436 437#if HPT_INTERFACE_VERSION>=0x01020000 438typedef struct _CONTROLLER_INFO_V2 { 439 HPT_U8 ChipType; /* chip type */ 440 HPT_U8 InterruptLevel; /* IRQ level */ 441 HPT_U8 NumBuses; /* bus count */ 442 HPT_U8 ChipFlags; 443 444 HPT_U8 szProductID[MAX_NAME_LENGTH];/* product name */ 445 HPT_U8 szVendorID[MAX_NAME_LENGTH]; /* vender name */ 446 447 HPT_U32 GroupId; /* low 32bit of vbus pointer the controller belongs 448 * the master controller has CHIP_MASTER flag set*/ 449 HPT_U8 pci_tree; 450 HPT_U8 pci_bus; 451 HPT_U8 pci_device; 452 HPT_U8 pci_function; 453 454 HPT_U32 ExFlags; 455} CONTROLLER_INFO_V2, *PCONTROLLER_INFO_V2; 456 457typedef struct _CONTROLLER_INFO_V2_EXT { 458 HPT_U8 MaxWidth; 459 HPT_U8 CurrentWidth; 460 HPT_U8 MaxSpeed; 461 HPT_U8 CurrentSpeed; 462 HPT_U8 reserve[64]; 463} CONTROLLER_INFO_V2_EXT, *PCONTROLLER_INFO_V2_EXT; 464 465 466#define CEXF_IOPModel 1 467#define CEXF_SDRAMSize 2 468#define CEXF_BatteryInstalled 4 469#define CEXF_BatteryStatus 8 470#define CEXF_BatteryVoltage 0x10 471#define CEXF_BatteryBackupTime 0x20 472#define CEXF_FirmwareVersion 0x40 473#define CEXF_SerialNumber 0x80 474#define CEXF_BatteryTemperature 0x100 475#define CEXF_Power12v 0x200 476#define CEXF_Power5v 0x400 477#define CEXF_Power3p3v 0x800 478#define CEXF_Power2p5v 0x1000 479#define CEXF_Power1p8v 0x2000 480#define CEXF_Core1p8v 0x4000 481#define CEXF_Core1p2v 0x8000 482#define CEXF_DDR1p8v 0x10000 483#define CEXF_DDR1p8vRef 0x20000 484#define CEXF_CPUTemperature 0x40000 485#define CEXF_BoardTemperature 0x80000 486#define CEXF_FanSpeed 0x100000 487#define CEXF_Core1p0v 0x200000 488#define CEXF_Fan2Speed 0x400000 489#define CEXF_Power1p0v 0x800000 490#define CEXF_Power1p5v 0x1000000 491#define CEXF_SASAddress 0x2000000 492 493typedef struct _CONTROLLER_INFO_V3 { 494 HPT_U8 ChipType; 495 HPT_U8 InterruptLevel; 496 HPT_U8 NumBuses; 497 HPT_U8 ChipFlags; 498 HPT_U8 szProductID[MAX_NAME_LENGTH]; 499 HPT_U8 szVendorID[MAX_NAME_LENGTH]; 500 HPT_U32 GroupId; 501 HPT_U8 pci_tree; 502 HPT_U8 pci_bus; 503 HPT_U8 pci_device; 504 HPT_U8 pci_function; 505 HPT_U32 ExFlags; 506 HPT_U8 IOPModel[32]; 507 HPT_U32 SDRAMSize; 508 HPT_U8 BatteryInstalled; 509 HPT_U8 BatteryStatus; 510 HPT_U16 BatteryVoltage; 511 HPT_U32 BatteryBackupTime; 512 HPT_U32 FirmwareVersion; 513 HPT_U8 SerialNumber[32]; 514 HPT_U8 BatteryMBInstalled; 515 HPT_U8 BatteryTemperature; 516 signed char CPUTemperature; 517 signed char BoardTemperature; 518 HPT_U16 FanSpeed; 519 HPT_U16 Power12v; 520 HPT_U16 Power5v; 521 HPT_U16 Power3p3v; 522 HPT_U16 Power2p5v; 523 HPT_U16 Power1p8v; 524 HPT_U16 Core1p8v; 525 HPT_U16 Core1p2v; 526 HPT_U16 DDR1p8v; 527 HPT_U16 DDR1p8vRef; 528 HPT_U16 Core1p0v; 529 HPT_U16 Fan2Speed; 530 HPT_U16 Power1p0v; 531 HPT_U16 Power1p5v; 532 HPT_U8 SASAddress[8]; 533 HPT_U8 reserve[48]; 534} 535CONTROLLER_INFO_V3, *PCONTROLLER_INFO_V3; 536typedef char check_CONTROLLER_INFO_V3[sizeof(CONTROLLER_INFO_V3)==256? 1:-1]; 537#endif 538/* 539 * Channel information. 540 */ 541typedef struct _CHANNEL_INFO { 542 HPT_U32 IoPort; /* IDE Base Port Address */ 543 HPT_U32 ControlPort; /* IDE Control Port Address */ 544 545 DEVICEID Devices[2]; /* device connected to this channel */ 546 547} CHANNEL_INFO, *PCHANNEL_INFO; 548 549typedef struct _CHANNEL_INFO_V2 { 550 HPT_U32 IoPort; /* IDE Base Port Address */ 551 HPT_U32 ControlPort; /* IDE Control Port Address */ 552 553 DEVICEID Devices[2+13]; /* device connected to this channel, PMPort max=15 */ 554} CHANNEL_INFO_V2, *PCHANNEL_INFO_V2; 555 556typedef struct _ENCLOSURE_INFO { 557 HPT_U8 EnclosureType; 558 HPT_U8 NumberOfPhys; 559 HPT_U8 AttachedTo; 560 HPT_U8 Status; 561 HPT_U8 VendorId[8]; 562 HPT_U8 ProductId[16]; 563 HPT_U8 ProductRevisionLevel[4]; 564 HPT_U32 PortPhyMap; 565 HPT_U32 reserve[55]; 566} ENCLOSURE_INFO, *PENCLOSURE_INFO; 567 568 569typedef struct _SES_ELEMENT_STATUS { 570 HPT_U8 ElementType; 571 HPT_U8 ElementOverallIndex; 572 HPT_U8 ElementStatus; 573 HPT_U8 Reserved; 574 HPT_U32 ElementValue; 575 HPT_U8 ElementDescriptor[32]; 576}SES_ELEMENT_STATUS,*PSES_ELEMENT_STATUS; 577 578#define MAX_ELEMENT_COUNT 80 579/* Element Type */ 580#define SES_TYPE_UNSPECIFIED 0x00 581#define SES_TYPE_DEVICE 0x01 582#define SES_TYPE_POWER_SUPPLY 0x02 583#define SES_TYPE_FAN 0x03 584#define SES_TYPE_TEMPERATURE_SENSOR 0x04 585#define SES_TYPE_DOOR_LOCK 0x05 586#define SES_TYPE_SPEAKER 0x06 587#define SES_TYPE_ES_CONTROLLER 0x07 588#define SES_TYPE_SCC_CONTROLLER 0x08 589#define SES_TYPE_NONVOLATILE_CACHE 0x09 590#define SES_TYPE_UPS 0x0B 591#define SES_TYPE_DISPLAY 0x0C 592#define SES_TYPE_KEYPAD 0x0D 593#define SES_TYPE_ENCLOSURE 0x0E 594#define SES_TYPE_SCSI_TRANSCEIVER 0x0F 595#define SES_TYPE_LANGUAGE 0x10 596#define SES_TYPE_COMM_PORT 0x11 597#define SES_TYPE_VOLTAGE_SENSOR 0x12 598#define SES_TYPE_CURRENT_SENSOR 0x13 599#define SES_TYPE_SCSI_TARGET_PORT 0x14 600#define SES_TYPE_SCSI_INITIATOR_PORT 0x15 601#define SES_TYPE_SIMPLE_SUBENCLOSURE 0x16 602#define SES_TYPE_ARRAY_DEVICE 0x17 603#define SES_TYPE_VENDOR_SPECIFIC 0x80 604 605/* Element Status */ 606 607#define SES_STATUS_UNSUPPORTED 0x00 608#define SES_STATUS_OK 0x01 609#define SES_STATUS_CRITICAL 0x02 610#define SES_STATUS_NONCRITICAL 0x03 611#define SES_STATUS_UNRECOVERABLE 0x04 612#define SES_STATUS_NOTINSTALLED 0x05 613#define SES_STATUS_UNKNOWN 0x06 614#define SES_STATUS_NOTAVAILABLE 0x07 615#define SES_STATUS_RESERVED 0x08 616 617 618typedef struct _ENCLOSURE_INFO_V2 { 619 HPT_U8 EnclosureType; 620 HPT_U8 NumberOfPhys; 621 HPT_U8 AttachedTo; 622 HPT_U8 Status; 623 HPT_U8 VendorId[8]; 624 HPT_U8 ProductId[16]; 625 HPT_U8 ProductRevisionLevel[4]; 626 HPT_U32 PortPhyMap; 627 SES_ELEMENT_STATUS ElementStatus[MAX_ELEMENT_COUNT]; 628} ENCLOSURE_INFO_V2, *PENCLOSURE_INFO_V2; 629 630typedef struct _ENCLOSURE_INFO_V3 { 631 HPT_U8 EnclosureType; 632 HPT_U8 NumberOfPhys; 633 HPT_U8 AttachedTo; 634 HPT_U8 Status; 635 HPT_U8 VendorId[8]; 636 HPT_U8 ProductId[16]; 637 HPT_U8 ProductRevisionLevel[4]; 638 HPT_U32 PortPhyMap; 639 HPT_U32 UnitId; /*272x card has two Cores, unitId is used to distinguish them */ 640 HPT_U32 reserved[32]; 641 SES_ELEMENT_STATUS ElementStatus[MAX_ELEMENT_COUNT]; 642} ENCLOSURE_INFO_V3, *PENCLOSURE_INFO_V3; 643 644typedef struct _ENCLOSURE_INFO_V4 { 645 HPT_U8 EnclosureType; 646 HPT_U8 NumberOfPhys; 647 HPT_U8 AttachedTo; 648 HPT_U8 Status; 649 HPT_U8 VendorId[8]; 650 HPT_U8 ProductId[16]; 651 HPT_U8 ProductRevisionLevel[4]; 652 HPT_U32 PortPhyMap; 653 HPT_U32 UnitId; /*272x card has two Cores, unitId is used to distinguish them */ 654 HPT_U32 ElementCount; 655 HPT_U32 reserved[32]; 656} ENCLOSURE_INFO_V4, *PENCLOSURE_INFO_V4; 657 658#define ENCLOSURE_STATUS_OFFLINE 1 659 660#define ENCLOSURE_TYPE_INTERNAL 0 661#define ENCLOSURE_TYPE_SMP 1 662#define ENCLOSURE_TYPE_PM 2 663 664#ifndef __KERNEL__ 665/* 666 * time represented in HPT_U32 format 667 */ 668typedef struct _TIME_RECORD { 669 HPT_U32 seconds:6; /* 0 - 59 */ 670 HPT_U32 minutes:6; /* 0 - 59 */ 671 HPT_U32 month:4; /* 1 - 12 */ 672 HPT_U32 hours:6; /* 0 - 59 */ 673 HPT_U32 day:5; /* 1 - 31 */ 674 HPT_U32 year:5; /* 0=2000, 31=2031 */ 675} TIME_RECORD; 676#endif 677 678/* 679 * Array information. 680 */ 681typedef struct _HPT_ARRAY_INFO { 682 HPT_U8 Name[MAX_ARRAYNAME_LEN];/* array name */ 683 HPT_U8 Description[64]; /* array description */ 684 HPT_U8 CreateManager[16]; /* who created it */ 685 TIME_RECORD CreateTime; /* when created it */ 686 687 HPT_U8 ArrayType; /* array type */ 688 HPT_U8 BlockSizeShift; /* stripe size */ 689 HPT_U8 nDisk; /* member count: Number of ID in Members[] */ 690 HPT_U8 SubArrayType; 691 692 HPT_U32 Flags; /* working flags, see ARRAY_FLAG_XXX */ 693 HPT_U32 Members[MAX_ARRAY_MEMBERS_V1]; /* member array/disks */ 694 695 /* 696 * rebuilding progress, xx.xx% = sprintf(s, "%.2f%%", RebuildingProgress/100.0); 697 * only valid if rebuilding is done by driver code. 698 * Member Flags will have ARRAY_FLAG_REBUILDING set at this case. 699 * Verify operation use same fields below, the only difference is 700 * ARRAY_FLAG_VERIFYING is set. 701 */ 702 HPT_U32 RebuildingProgress; 703 HPT_U32 RebuiltSectors; /* rebuilding point (LBA) for single member */ 704 705} HPT_ARRAY_INFO, *PHPT_ARRAY_INFO; 706 707#if HPT_INTERFACE_VERSION>=0x01010000 708typedef struct _HPT_ARRAY_INFO_V2 { 709 HPT_U8 Name[MAX_ARRAYNAME_LEN];/* array name */ 710 HPT_U8 Description[64]; /* array description */ 711 HPT_U8 CreateManager[16]; /* who created it */ 712 TIME_RECORD CreateTime; /* when created it */ 713 714 HPT_U8 ArrayType; /* array type */ 715 HPT_U8 BlockSizeShift; /* stripe size */ 716 HPT_U8 nDisk; /* member count: Number of ID in Members[] */ 717 HPT_U8 SubArrayType; 718 719 HPT_U32 Flags; /* working flags, see ARRAY_FLAG_XXX */ 720 HPT_U32 Members[MAX_ARRAY_MEMBERS_V2]; /* member array/disks */ 721 722 HPT_U32 RebuildingProgress; 723 HPT_U64 RebuiltSectors; /* rebuilding point (LBA) for single member */ 724 725 HPT_U32 reserve4[4]; 726} HPT_ARRAY_INFO_V2, *PHPT_ARRAY_INFO_V2; 727#endif 728 729#if HPT_INTERFACE_VERSION>=0x01020000 730typedef struct _HPT_ARRAY_INFO_V3 { 731 HPT_U8 Name[MAX_ARRAYNAME_LEN];/* array name */ 732 HPT_U8 Description[64]; /* array description */ 733 HPT_U8 CreateManager[16]; /* who created it */ 734 TIME_RECORD CreateTime; /* when created it */ 735 736 HPT_U8 ArrayType; /* array type */ 737 HPT_U8 BlockSizeShift; /* stripe size */ 738 HPT_U8 nDisk; /* member count: Number of ID in Members[] */ 739 HPT_U8 SubArrayType; 740 741 HPT_U32 Flags; /* working flags, see ARRAY_FLAG_XXX */ 742 HPT_U32 Members[MAX_ARRAY_MEMBERS_V2]; /* member array/disks */ 743 744 HPT_U32 RebuildingProgress; 745 HPT_U64 RebuiltSectors; /* rebuilding point (LBA) for single member */ 746 747 DEVICEID TransformSource; 748 DEVICEID TransformTarget; /* destination device ID */ 749 HPT_U32 TransformingProgress; 750 HPT_U32 Signature; /* persistent identification*/ 751#if MAX_ARRAY_MEMBERS_V2==16 752 HPT_U16 Critical_Members; /* bit mask of critical members */ 753 HPT_U16 reserve2; 754 HPT_U32 reserve; 755#else 756 HPT_U32 Critical_Members; 757 HPT_U32 reserve; 758#endif 759} HPT_ARRAY_INFO_V3, *PHPT_ARRAY_INFO_V3; 760#endif 761 762#if HPT_INTERFACE_VERSION>=0x02000001 763typedef struct _HPT_ARRAY_INFO_V4 { 764 HPT_U8 Name[MAX_ARRAYNAME_LEN];/* array name */ 765 HPT_U8 Description[64]; /* array description */ 766 HPT_U8 CreateManager[16]; /* who created it */ 767 TIME_RECORD CreateTime; /* when created it */ 768 769 HPT_U8 ArrayType; /* array type */ 770 HPT_U8 BlockSizeShift; /* stripe size */ 771 HPT_U8 nDisk; /* member count: Number of ID in Members[] */ 772 HPT_U8 SubArrayType; 773 774 HPT_U32 Flags; /* working flags, see ARRAY_FLAG_XXX */ 775 776 HPT_U32 RebuildingProgress; 777 HPT_U64 RebuiltSectors; /* rebuilding point (LBA) for single member */ 778 779 DEVICEID TransformSource; 780 DEVICEID TransformTarget; /* destination device ID */ 781 HPT_U32 TransformingProgress; 782 HPT_U32 Signature; /* persistent identification*/ 783 HPT_U8 SectorSizeShift; /*sector size = 512B<<SectorSizeShift*/ 784 HPT_U8 reserved2[7]; 785 HPT_U64 Critical_Members; 786 HPT_U32 Members[MAX_ARRAY_MEMBERS_V3]; /* member array/disks */ 787} HPT_ARRAY_INFO_V4, *PHPT_ARRAY_INFO_V4; 788#endif 789 790 791/* 792 * ATA/ATAPI Device identify data without the Reserved4. 793 */ 794typedef struct _IDENTIFY_DATA2 { 795 HPT_U16 GeneralConfiguration; 796 HPT_U16 NumberOfCylinders; 797 HPT_U16 Reserved1; 798 HPT_U16 NumberOfHeads; 799 HPT_U16 UnformattedBytesPerTrack; 800 HPT_U16 UnformattedBytesPerSector; 801 HPT_U8 SasAddress[8]; 802 HPT_U16 SerialNumber[10]; 803 HPT_U16 BufferType; 804 HPT_U16 BufferSectorSize; 805 HPT_U16 NumberOfEccBytes; 806 HPT_U16 FirmwareRevision[4]; 807 HPT_U16 ModelNumber[20]; 808 HPT_U8 MaximumBlockTransfer; 809 HPT_U8 VendorUnique2; 810 HPT_U16 DoubleWordIo; 811 HPT_U16 Capabilities; 812 HPT_U16 Reserved2; 813 HPT_U8 VendorUnique3; 814 HPT_U8 PioCycleTimingMode; 815 HPT_U8 VendorUnique4; 816 HPT_U8 DmaCycleTimingMode; 817 HPT_U16 TranslationFieldsValid; 818 HPT_U16 NumberOfCurrentCylinders; 819 HPT_U16 NumberOfCurrentHeads; 820 HPT_U16 CurrentSectorsPerTrack; 821 HPT_U32 CurrentSectorCapacity; 822 HPT_U16 CurrentMultiSectorSetting; 823 HPT_U32 UserAddressableSectors; 824 HPT_U8 SingleWordDMASupport; 825 HPT_U8 SingleWordDMAActive; 826 HPT_U8 MultiWordDMASupport; 827 HPT_U8 MultiWordDMAActive; 828 HPT_U8 AdvancedPIOModes; 829 HPT_U8 Reserved4; 830 HPT_U16 MinimumMWXferCycleTime; 831 HPT_U16 RecommendedMWXferCycleTime; 832 HPT_U16 MinimumPIOCycleTime; 833 HPT_U16 MinimumPIOCycleTimeIORDY; 834 HPT_U16 Reserved5[2]; 835 HPT_U16 ReleaseTimeOverlapped; 836 HPT_U16 ReleaseTimeServiceCommand; 837 HPT_U16 MajorRevision; 838 HPT_U16 MinorRevision; 839} __attribute__((packed)) IDENTIFY_DATA2, *PIDENTIFY_DATA2; 840 841/* 842 * physical device information. 843 * IdentifyData.ModelNumber[] is HPT_U8-swapped from the original identify data. 844 */ 845typedef struct _DEVICE_INFO { 846 HPT_U8 ControllerId; /* controller id */ 847 HPT_U8 PathId; /* bus */ 848 HPT_U8 TargetId; /* id */ 849 HPT_U8 DeviceModeSetting; /* Current Data Transfer mode: 0-4 PIO 0-4 */ 850 /* 5-7 MW DMA0-2, 8-13 UDMA0-5 */ 851 HPT_U8 DeviceType; /* device type */ 852 HPT_U8 UsableMode; /* highest usable mode */ 853 854#ifdef __BIG_ENDIAN_BITFIELD 855 HPT_U8 NCQEnabled: 1; 856 HPT_U8 NCQSupported: 1; 857 HPT_U8 TCQEnabled: 1; 858 HPT_U8 TCQSupported: 1; 859 HPT_U8 WriteCacheEnabled: 1; 860 HPT_U8 WriteCacheSupported: 1; 861 HPT_U8 ReadAheadEnabled: 1; 862 HPT_U8 ReadAheadSupported: 1; 863 HPT_U8 reserved6: 6; 864 HPT_U8 SpinUpMode: 2; 865#else 866 HPT_U8 ReadAheadSupported: 1; 867 HPT_U8 ReadAheadEnabled: 1; 868 HPT_U8 WriteCacheSupported: 1; 869 HPT_U8 WriteCacheEnabled: 1; 870 HPT_U8 TCQSupported: 1; 871 HPT_U8 TCQEnabled: 1; 872 HPT_U8 NCQSupported: 1; 873 HPT_U8 NCQEnabled: 1; 874 HPT_U8 SpinUpMode: 2; 875 HPT_U8 reserved6: 6; 876#endif 877 878 HPT_U32 Flags; /* working flags, see DEVICE_FLAG_XXX */ 879 880 IDENTIFY_DATA2 IdentifyData; /* Identify Data of this device */ 881 882} 883__attribute__((packed)) DEVICE_INFO, *PDEVICE_INFO; 884 885#if HPT_INTERFACE_VERSION>=0x01020000 886#define MAX_PARENTS_PER_DISK 8 887/* 888 * physical device information. 889 * IdentifyData.ModelNumber[] is HPT_U8-swapped from the original identify data. 890 */ 891typedef struct _DEVICE_INFO_V2 { 892 HPT_U8 ControllerId; /* controller id */ 893 HPT_U8 PathId; /* bus */ 894 HPT_U8 TargetId; /* id */ 895 HPT_U8 DeviceModeSetting; /* Current Data Transfer mode: 0-4 PIO 0-4 */ 896 /* 5-7 MW DMA0-2, 8-13 UDMA0-5 */ 897 HPT_U8 DeviceType; /* device type */ 898 HPT_U8 UsableMode; /* highest usable mode */ 899 900#ifdef __BIG_ENDIAN_BITFIELD 901 HPT_U8 NCQEnabled: 1; 902 HPT_U8 NCQSupported: 1; 903 HPT_U8 TCQEnabled: 1; 904 HPT_U8 TCQSupported: 1; 905 HPT_U8 WriteCacheEnabled: 1; 906 HPT_U8 WriteCacheSupported: 1; 907 HPT_U8 ReadAheadEnabled: 1; 908 HPT_U8 ReadAheadSupported: 1; 909 HPT_U8 reserved6: 6; 910 HPT_U8 SpinUpMode: 2; 911#else 912 HPT_U8 ReadAheadSupported: 1; 913 HPT_U8 ReadAheadEnabled: 1; 914 HPT_U8 WriteCacheSupported: 1; 915 HPT_U8 WriteCacheEnabled: 1; 916 HPT_U8 TCQSupported: 1; 917 HPT_U8 TCQEnabled: 1; 918 HPT_U8 NCQSupported: 1; 919 HPT_U8 NCQEnabled: 1; 920 HPT_U8 SpinUpMode: 2; 921 HPT_U8 reserved6: 6; 922#endif 923 924 HPT_U32 Flags; /* working flags, see DEVICE_FLAG_XXX */ 925 926 IDENTIFY_DATA2 IdentifyData; /* Identify Data of this device */ 927 928 HPT_U64 TotalFree; 929 HPT_U64 MaxFree; 930 HPT_U64 BadSectors; 931 DEVICEID ParentArrays[MAX_PARENTS_PER_DISK]; 932 933} 934__attribute__((packed)) DEVICE_INFO_V2, *PDEVICE_INFO_V2, DEVICE_INFO_V3, *PDEVICE_INFO_V3; 935 936/* 937 * HPT601 information 938 */ 939#endif 940/* 941 * HPT601 information 942 */ 943#define HPT601_INFO_DEVICEID 1 944#define HPT601_INFO_TEMPERATURE 2 945#define HPT601_INFO_FANSTATUS 4 946#define HPT601_INFO_BEEPERCONTROL 8 947#define HPT601_INFO_LED1CONTROL 0x10 948#define HPT601_INFO_LED2CONTROL 0x20 949#define HPT601_INFO_POWERSTATUS 0x40 950 951typedef struct _HPT601_INFO_ { 952 HPT_U16 ValidFields; /* mark valid fields below */ 953 HPT_U16 DeviceId; /* 0x5A3E */ 954 HPT_U16 Temperature; /* Read: temperature sensor value. Write: temperature limit */ 955 HPT_U16 FanStatus; /* Fan status */ 956 HPT_U16 BeeperControl; /* bit4: beeper control bit. bit0-3: frequency bits */ 957 HPT_U16 LED1Control; /* bit4: twinkling control bit. bit0-3: frequency bits */ 958 HPT_U16 LED2Control; /* bit4: twinkling control bit. bit0-3: frequency bits */ 959 HPT_U16 PowerStatus; /* 1: has power 2: no power */ 960} HPT601_INFO, *PHPT601_INFO; 961 962#if HPT_INTERFACE_VERSION>=0x01010000 963#ifndef __KERNEL__ 964/* cache policy for each vdev, copied from ldm.h */ 965#define CACHE_POLICY_NONE 0 966#define CACHE_POLICY_WRITE_THROUGH 1 967#define CACHE_POLICY_WRITE_BACK 2 968 969#endif 970#endif 971/* 972 * Logical device information. 973 * Union of ArrayInfo and DeviceInfo. 974 * Common properties will be put in logical device information. 975 */ 976typedef struct _LOGICAL_DEVICE_INFO { 977 HPT_U8 Type; /* LDT_ARRAY or LDT_DEVICE */ 978 HPT_U8 reserved[3]; 979 980 HPT_U32 Capacity; /* array capacity */ 981 DEVICEID ParentArray; 982 983 union { 984 HPT_ARRAY_INFO array; 985 DEVICE_INFO device; 986 } __attribute__((packed)) u; 987 988} __attribute__((packed)) LOGICAL_DEVICE_INFO, *PLOGICAL_DEVICE_INFO; 989 990#if HPT_INTERFACE_VERSION>=0x01010000 991typedef struct _LOGICAL_DEVICE_INFO_V2 { 992 HPT_U8 Type; /* LDT_ARRAY or LDT_DEVICE */ 993 HPT_U8 reserved[3]; 994 995 HPT_U64 Capacity; /* array capacity */ 996 DEVICEID ParentArray; /* for physical device, Please don't use this field. 997 * use ParentArrays field in DEVICE_INFO_V2 998 */ 999 1000 union { 1001 HPT_ARRAY_INFO_V2 array; 1002 DEVICE_INFO device; 1003 } __attribute__((packed)) u; 1004 1005} __attribute__((packed)) LOGICAL_DEVICE_INFO_V2, *PLOGICAL_DEVICE_INFO_V2; 1006#endif 1007 1008#if HPT_INTERFACE_VERSION>=0x01020000 1009#define INVALID_TARGET_ID 0xFF 1010#define INVALID_BUS_ID 0xFF 1011typedef struct _LOGICAL_DEVICE_INFO_V3 { 1012 HPT_U8 Type; /* LDT_ARRAY or LDT_DEVICE */ 1013 HPT_U8 CachePolicy; /* refer to CACHE_POLICY_xxx */ 1014 HPT_U8 VBusId; /* vbus sequence in vbus_list */ 1015 HPT_U8 TargetId; /* OS target id. Value 0xFF is invalid */ 1016 /* OS disk name: HPT DISK $VBusId_$TargetId */ 1017 HPT_U64 Capacity; /* array capacity */ 1018 DEVICEID ParentArray; /* for physical device, don't use this field. 1019 * use ParentArrays field in DEVICE_INFO_V2 instead. 1020 */ 1021 HPT_U32 TotalIOs; 1022 HPT_U32 TobalMBs; 1023 HPT_U32 IOPerSec; 1024 HPT_U32 MBPerSec; 1025 1026 union { 1027 HPT_ARRAY_INFO_V3 array; 1028 DEVICE_INFO_V2 device; 1029 } __attribute__((packed)) u; 1030 1031} 1032__attribute__((packed)) LOGICAL_DEVICE_INFO_V3, *PLOGICAL_DEVICE_INFO_V3; 1033#endif 1034 1035#if HPT_INTERFACE_VERSION>=0x02000001 1036typedef struct _LOGICAL_DEVICE_INFO_V4 { 1037 HPT_U32 dwSize; 1038 HPT_U8 revision; 1039 HPT_U8 reserved[7]; 1040 1041 HPT_U8 Type; /* LDT_ARRAY or LDT_DEVICE */ 1042 HPT_U8 CachePolicy; /* refer to CACHE_POLICY_xxx */ 1043 HPT_U8 VBusId; /* vbus sequence in vbus_list */ 1044 HPT_U8 TargetId; /* OS target id. Value 0xFF is invalid */ 1045 /* OS disk name: HPT DISK $VBusId_$TargetId */ 1046 HPT_U64 Capacity; /* array capacity */ 1047 DEVICEID ParentArray; /* for physical device, don't use this field. 1048 * use ParentArrays field in DEVICE_INFO_V2 instead. 1049 */ 1050 HPT_U32 TotalIOs; 1051 HPT_U32 TobalMBs; 1052 HPT_U32 IOPerSec; 1053 HPT_U32 MBPerSec; 1054 1055 union { 1056 HPT_ARRAY_INFO_V4 array; 1057 DEVICE_INFO_V3 device; 1058 } __attribute__((packed)) u; 1059} 1060__attribute__((packed)) LOGICAL_DEVICE_INFO_V4, *PLOGICAL_DEVICE_INFO_V4; 1061 1062/*LOGICAL_DEVICE_INFO_V4 max revision number*/ 1063#define LOGICAL_DEVICE_INFO_V4_REVISION 0 1064/*If new revision was defined please check evey revision size*/ 1065#define LOGICAL_DEVICE_INFO_V4_R0_SIZE (sizeof(LOGICAL_DEVICE_INFO_V4)) 1066#endif 1067 1068/* 1069 * ALTERABLE_ARRAY_INFO and ALTERABLE_DEVICE_INFO, used in set_array_info() 1070 * and set_device_info(). 1071 * When set_xxx_info() is called, the ValidFields member indicates which 1072 * fields in the structure are valid. 1073 */ 1074/* field masks */ 1075#define AAIF_NAME 1 1076#define AAIF_DESCRIPTION 2 1077 1078#define ADIF_MODE 1 1079#define ADIF_TCQ 2 1080#define ADIF_NCQ 4 1081#define ADIF_WRITE_CACHE 8 1082#define ADIF_READ_AHEAD 0x10 1083#define ADIF_SPIN_UP_MODE 0x20 1084#define ADIF_SET_BAD 0x40 1085 1086typedef struct _ALTERABLE_ARRAY_INFO { 1087 HPT_U32 ValidFields; /* mark valid fields below */ 1088 HPT_U8 Name[MAX_ARRAYNAME_LEN]; /* array name */ 1089 HPT_U8 Description[64]; /* array description */ 1090}__attribute__((packed))ALTERABLE_ARRAY_INFO, *PALTERABLE_ARRAY_INFO; 1091 1092typedef struct _ALTERABLE_DEVICE_INFO { 1093 HPT_U32 ValidFields; /* mark valid fields below */ 1094 HPT_U8 DeviceModeSetting; /* 0-4 PIO 0-4, 5-7 MW DMA0-2, 8-13 UDMA0-5 */ 1095}__attribute__((packed))ALTERABLE_DEVICE_INFO, *PALTERABLE_DEVICE_INFO; 1096 1097typedef struct _ALTERABLE_DEVICE_INFO_V2 { 1098 HPT_U32 ValidFields; /* mark valid fields below */ 1099 HPT_U8 DeviceModeSetting; /* 0-4 PIO 0-4, 5-7 MW DMA0-2, 8-13 UDMA0-5 */ 1100 HPT_U8 TCQEnabled; 1101 HPT_U8 NCQEnabled; 1102 HPT_U8 WriteCacheEnabled; 1103 HPT_U8 ReadAheadEnabled; 1104 HPT_U8 SpinUpMode; 1105 HPT_U8 SetBadSector; 1106 HPT_U8 reserve[1]; 1107 HPT_U32 reserve2[13]; /* pad to 64 bytes */ 1108}__attribute__((packed))ALTERABLE_DEVICE_INFO_V2, *PALTERABLE_DEVICE_INFO_V2; 1109 1110#if HPT_INTERFACE_VERSION>=0x01020000 1111 1112#define TARGET_TYPE_DEVICE 0 1113#define TARGET_TYPE_ARRAY 1 1114 1115 1116#define AIT_NAME 0 1117#define AIT_DESCRIPTION 1 1118#define AIT_CACHE_POLICY 2 1119 1120 1121#define DIT_MODE 0 1122#define DIT_READ_AHEAD 1 1123#define DIT_WRITE_CACHE 2 1124#define DIT_TCQ 3 1125#define DIT_NCQ 4 1126#define DIT_IDENTIFY 5 1127 1128#define DISK_CACHE_POLICY_UNCHANGE 0 1129#define DISK_CACHE_POLICY_ENABLE 1 1130#define DISK_CACHE_POLICY_DISABLE 2 1131 1132/* param type is determined by target_type and info_type*/ 1133typedef struct _SET_DEV_INFO 1134{ 1135 HPT_U8 target_type; 1136 HPT_U8 infor_type; 1137 HPT_U16 param_length; 1138 #define SET_VDEV_INFO_param(p) ((HPT_U8 *)(p)+sizeof(SET_VDEV_INFO)) 1139 /* HPT_U8 param[0]; */ 1140} SET_VDEV_INFO, * PSET_VDEV_INFO; 1141 1142typedef HPT_U8 PARAM_ARRAY_NAME[MAX_ARRAYNAME_LEN] ; 1143typedef HPT_U8 PARAM_ARRAY_DES[64]; 1144typedef HPT_U8 PARAM_DEVICE_MODE, PARAM_TCQ, PARAM_NCQ, PARAM_READ_AHEAD, PARAM_WRITE_CACHE, PARAM_CACHE_POLICY; 1145 1146#endif 1147 1148/* 1149 * CREATE_ARRAY_PARAMS 1150 * Param structure used to create an array. 1151 */ 1152typedef struct _CREATE_ARRAY_PARAMS { 1153 HPT_U8 ArrayType; /* 1-level array type */ 1154 HPT_U8 nDisk; /* number of elements in Members[] array */ 1155 HPT_U8 BlockSizeShift; /* Stripe size if ArrayType==AT_RAID0 / AT_RAID5 */ 1156 HPT_U8 CreateFlags; /* See CAF_xxx */ 1157 1158 HPT_U8 ArrayName[MAX_ARRAYNAME_LEN];/* Array name */ 1159 HPT_U8 Description[64]; /* array description */ 1160 HPT_U8 CreateManager[16]; /* who created it */ 1161 TIME_RECORD CreateTime; /* when created it */ 1162 1163 HPT_U32 Members[MAX_ARRAY_MEMBERS_V1];/* ID of array members, a member can be an array */ 1164 1165} CREATE_ARRAY_PARAMS, *PCREATE_ARRAY_PARAMS; 1166 1167#if HPT_INTERFACE_VERSION>=0x01010000 1168typedef struct _CREATE_ARRAY_PARAMS_V2 { 1169 HPT_U8 ArrayType; /* 1-level array type */ 1170 HPT_U8 nDisk; /* number of elements in Members[] array */ 1171 HPT_U8 BlockSizeShift; /* Stripe size if ArrayType==AT_RAID0 / AT_RAID5 */ 1172 HPT_U8 CreateFlags; /* See CAF_xxx */ 1173 1174 HPT_U8 ArrayName[MAX_ARRAYNAME_LEN];/* Array name */ 1175 HPT_U8 Description[64]; /* array description */ 1176 HPT_U8 CreateManager[16]; /* who created it */ 1177 TIME_RECORD CreateTime; /* when created it */ 1178 HPT_U64 Capacity; 1179 1180 HPT_U32 Members[MAX_ARRAY_MEMBERS_V2];/* ID of array members, a member can be an array */ 1181 1182} CREATE_ARRAY_PARAMS_V2, *PCREATE_ARRAY_PARAMS_V2; 1183#endif 1184 1185#if HPT_INTERFACE_VERSION>=0x02000001 1186typedef struct _CREATE_ARRAY_PARAMS_V3 { 1187 HPT_U32 dwSize; 1188 HPT_U8 revision; /*CREATE_ARRAY_PARAMS_V3_REVISION*/ 1189 HPT_U8 diskCachePolicy; /*unchange:0 enable:1 disable:2*/ 1190 HPT_U8 reserved[4]; 1191 HPT_U8 subDisks; /* RAIDn0 sub array */ 1192 HPT_U8 SectorSizeShift; /*sector size = 512B<<SectorSizeShift*/ 1193 HPT_U8 ArrayType; /* 1-level array type */ 1194 HPT_U8 nDisk; /* number of elements in Members[] array */ 1195 HPT_U8 BlockSizeShift; /* Stripe size if ArrayType==AT_RAID0 / AT_RAID5 */ 1196 HPT_U8 CreateFlags; /* See CAF_xxx */ 1197 1198 HPT_U8 ArrayName[MAX_ARRAYNAME_LEN];/* Array name */ 1199 HPT_U8 Description[64]; /* array description */ 1200 HPT_U8 CreateManager[16]; /* who created it */ 1201 TIME_RECORD CreateTime; /* when created it */ 1202 HPT_U64 Capacity; 1203 1204 HPT_U32 Members[MAX_ARRAY_MEMBERS_V3];/* ID of array members, a member can be an array */ 1205} CREATE_ARRAY_PARAMS_V3, *PCREATE_ARRAY_PARAMS_V3; 1206 1207/*CREATE_ARRAY_PARAMS_V3 current max revision*/ 1208#define CREATE_ARRAY_PARAMS_V3_REVISION 0 1209/*If new revision defined please check evey revision size*/ 1210#define CREATE_ARRAY_PARAMS_V3_R0_SIZE (sizeof(CREATE_ARRAY_PARAMS_V3)) 1211#endif 1212 1213#if HPT_INTERFACE_VERSION < 0x01020000 1214/* 1215 * Flags used for creating an RAID 1 array 1216 * 1217 * CAF_CREATE_AND_DUPLICATE 1218 * Copy source disk contents to target for RAID 1. If user choose "create and duplicate" 1219 * to create an array, GUI will call CreateArray() with this flag set. Then GUI should 1220 * call hpt_get_device_info() with the returned array ID and check returned flags to 1221 * see if ARRAY_FLAG_REBUILDING is set. If not set, driver does not support rebuilding 1222 * and GUI must do duplication itself. 1223 * CAF_DUPLICATE_MUST_DONE 1224 * If the duplication is aborted or fails, do not create the array. 1225 */ 1226#define CAF_CREATE_AND_DUPLICATE 1 1227#define CAF_DUPLICATE_MUST_DONE 2 1228#define CAF_CREATE_AS_RAID15 4 1229/* 1230 * Flags used for creating an RAID 5 array 1231 */ 1232#define CAF_CREATE_R5_NO_BUILD 1 1233#define CAF_CREATE_R5_ZERO_INIT 2 1234#define CAF_CREATE_R5_BUILD_PARITY 4 1235 1236#else 1237/* 1238 * Flags used for creating 1239 */ 1240#define CAF_FOREGROUND_INITIALIZE 1 1241#define CAF_BACKGROUND_INITIALIZE 2 1242#define CAF_CREATE_R5_WRITE_BACK (CACHE_POLICY_WRITE_BACK<<CAF_CACHE_POLICY_SHIFT) 1243 1244 1245#define CAF_CACHE_POLICY_MASK 0x1C 1246#define CAF_CACHE_POLICY_SHIFT 2 1247 1248#endif 1249 1250#define CAF_KEEP_DATA_ALWAYS 0x80 1251 1252/* Flags used for deleting an array 1253 * 1254 * DAF_KEEP_DATA_IF_POSSIBLE 1255 * If this flag is set, deleting a RAID 1 array will not destroy the data on both disks. 1256 * Deleting a JBOD should keep partitions on first disk ( not implement now ). 1257 * Deleting a RAID 0/1 should result as two RAID 0 array ( not implement now ). 1258 */ 1259#define DAF_KEEP_DATA_IF_POSSIBLE 1 1260#define DAF_KEEP_DATA_ALWAYS 2 1261 1262/* 1263 * event types 1264 */ 1265#define ET_DEVICE_REMOVED 1 /* device removed */ 1266#define ET_DEVICE_PLUGGED 2 /* device plugged */ 1267#define ET_DEVICE_ERROR 3 /* device I/O error */ 1268#define ET_REBUILD_STARTED 4 1269#define ET_REBUILD_ABORTED 5 1270#define ET_REBUILD_FINISHED 6 1271#define ET_SPARE_TOOK_OVER 7 1272#define ET_REBUILD_FAILED 8 1273#define ET_VERIFY_STARTED 9 1274#define ET_VERIFY_ABORTED 10 1275#define ET_VERIFY_FAILED 11 1276#define ET_VERIFY_FINISHED 12 1277#define ET_INITIALIZE_STARTED 13 1278#define ET_INITIALIZE_ABORTED 14 1279#define ET_INITIALIZE_FAILED 15 1280#define ET_INITIALIZE_FINISHED 16 1281#define ET_VERIFY_DATA_ERROR 17 1282#define ET_TRANSFORM_STARTED 18 1283#define ET_TRANSFORM_ABORTED 19 1284#define ET_TRANSFORM_FAILED 20 1285#define ET_TRANSFORM_FINISHED 21 1286#define ET_SMART_FAILED 22 1287#define ET_SMART_PASSED 23 1288#define ET_SECTOR_REPAIR_FAIL 24 1289#define ET_SECTOR_REPAIR_SUCCESS 25 1290#define ET_ERASE_FAIL 26 1291#define ET_ERASE_SUCCESS 27 1292#define ET_CONTINUE_REBUILD_ON_ERROR 28 1293 1294 1295/* 1296 * event structure 1297 */ 1298typedef struct _HPT_EVENT { 1299 TIME_RECORD Time; 1300 DEVICEID DeviceID; 1301 HPT_U8 EventType; 1302 HPT_U8 reserved[3]; 1303 1304 HPT_U8 Data[32]; /* various data depend on EventType */ 1305} HPT_EVENT, *PHPT_EVENT; 1306 1307/* 1308 * IDE pass-through command. Use it at your own risk! 1309 */ 1310typedef struct _IDE_PASS_THROUGH_HEADER { 1311 DEVICEID idDisk; /* disk ID */ 1312 HPT_U8 bFeaturesReg; /* feature register */ 1313 HPT_U8 bSectorCountReg; /* IDE sector count register. */ 1314 HPT_U8 bLbaLowReg; /* IDE LBA low value. */ 1315 HPT_U8 bLbaMidReg; /* IDE LBA mid register. */ 1316 HPT_U8 bLbaHighReg; /* IDE LBA high value. */ 1317 HPT_U8 bDriveHeadReg; /* IDE drive/head register. */ 1318 HPT_U8 bCommandReg; /* Actual IDE command. Checked for validity by driver. */ 1319 HPT_U8 nSectors; /* data size in sectors, if the command has data transfer */ 1320 HPT_U8 protocol; /* IO_COMMAND_(READ,WRITE) or zero for non-DATA */ 1321 HPT_U8 reserve[3]; 1322 #define IDE_PASS_THROUGH_buffer(p) ((HPT_U8 *)(p) + sizeof(IDE_PASS_THROUGH_HEADER)) 1323 /* HPT_U8 DataBuffer[0]; */ 1324} 1325IDE_PASS_THROUGH_HEADER, *PIDE_PASS_THROUGH_HEADER; 1326 1327typedef struct _IDE_PASS_THROUGH_HEADER_V2 { 1328 DEVICEID idDisk; /* disk ID */ 1329 HPT_U16 bFeaturesReg; /* feature register */ 1330 HPT_U16 bSectorCountReg; /* IDE sector count register. */ 1331 HPT_U16 bLbaLowReg; /* IDE LBA low value. */ 1332 HPT_U16 bLbaMidReg; /* IDE LBA mid register. */ 1333 HPT_U16 bLbaHighReg; /* IDE LBA high value. */ 1334 HPT_U8 bDriveHeadReg; /* IDE drive/head register. */ 1335 HPT_U8 bCommandReg; /* Actual IDE command. Checked for validity by driver. */ 1336 HPT_U16 nSectors; /* data size in sectors, if the command has data transfer */ 1337 HPT_U8 protocol; /* IO_COMMAND_(READ,WRITE) or zero for non-DATA */ 1338 HPT_U8 reserve; 1339 #define IDE_PASS_THROUGH_V2_buffer(p) ((HPT_U8 *)(p) + sizeof(IDE_PASS_THROUGH_HEADER_V2)) 1340 /* HPT_U8 DataBuffer[0]; */ 1341} 1342IDE_PASS_THROUGH_HEADER_V2, *PIDE_PASS_THROUGH_HEADER_V2; 1343 1344typedef struct _HPT_SCSI_PASSTHROUGH_IN { 1345 DEVICEID idDisk; 1346 HPT_U8 protocol; 1347 HPT_U8 reserve1; 1348 HPT_U8 reserve2; 1349 HPT_U8 cdbLength; 1350 HPT_U8 cdb[16]; 1351 HPT_U32 dataLength; 1352 /* data follows, if any */ 1353} 1354HPT_SCSI_PASSTHROUGH_IN, *PHPT_SCSI_PASSTHROUGH_IN; 1355 1356typedef struct _HPT_SCSI_PASSTHROUGH_OUT { 1357 HPT_U8 scsiStatus; 1358 HPT_U8 reserve1; 1359 HPT_U8 reserve2; 1360 HPT_U8 reserve3; 1361 HPT_U32 dataLength; 1362 /* data/sense follows if any */ 1363} 1364HPT_SCSI_PASSTHROUGH_OUT, *PHPT_SCSI_PASSTHROUGH_OUT; 1365 1366/* 1367 * device io packet format 1368 */ 1369typedef struct _DEVICE_IO_EX_PARAMS { 1370 DEVICEID idDisk; 1371 HPT_U32 Lba; 1372 HPT_U16 nSectors; 1373 HPT_U8 Command; /* IO_COMMAD_xxx */ 1374 HPT_U8 BufferType; /* BUFFER_TYPE_xxx, see below */ 1375 HPT_U32 BufferPtr; 1376} 1377DEVICE_IO_EX_PARAMS, *PDEVICE_IO_EX_PARAMS; 1378 1379#define BUFFER_TYPE_LOGICAL 1 /* logical pointer to buffer */ 1380#define BUFFER_TYPE_PHYSICAL 2 /* physical address of buffer */ 1381#define BUFFER_TYPE_LOGICAL_LOGICAL_SG 3 /* logical pointer to logical S/G table */ 1382#define BUFFER_TYPE_LOGICAL_PHYSICAL_SG 4 /* logical pointer to physical S/G table */ 1383#define BUFFER_TYPE_PHYSICAL_LOGICAL_SG 5 /* physical address to logical S/G table */ 1384#define BUFFER_TYPE_PHYSICAL_PHYSICAL_SG 6 /* physical address of physical S/G table */ 1385#define BUFFER_TYPE_PHYSICAL_PHYSICAL_SG_PIO 7 /* non DMA capable physical address of physical S/G table */ 1386 1387typedef struct _HPT_DRIVER_PARAMETER { 1388 char name[32]; 1389 HPT_U8 value[32]; 1390 HPT_U8 type; /* HPT_DRIVER_PARAMETER_TYPE_* */ 1391 HPT_U8 persistent; 1392 HPT_U8 reserve2[2]; 1393 HPT_U8 location; /* 0 - system */ 1394 HPT_U8 controller; 1395 HPT_U8 bus; 1396 HPT_U8 reserve1; 1397 char desc[128]; 1398} 1399HPT_DRIVER_PARAMETER, *PHPT_DRIVER_PARAMETER; 1400 1401#define HPT_DRIVER_PARAMETER_TYPE_INT 1 1402#define HPT_DRIVER_PARAMETER_TYPE_BOOL 2 1403 1404typedef struct _HPT_PM_CMDSTAT { 1405 HPT_U64 timeStamp; 1406 HPT_U64 lba; 1407 HPT_U16 sectors; 1408 HPT_U16 reserved; 1409 HPT_U32 rspTime; 1410} 1411HPT_PM_CMDSTAT, *PHPT_PM_CMDSTAT; 1412 1413#define HIGHEST_RSPTIME_CMD_SAVE 10 1414#define RSPTIME_HISTOGRAM_SEGMENT_COUNT 38 1415 1416typedef struct _HPT_PM_IOSTAT { 1417 HPT_PM_CMDSTAT highestRspCmdStatData[HIGHEST_RSPTIME_CMD_SAVE]; 1418 HPT_U32 rspTimeHistogram[RSPTIME_HISTOGRAM_SEGMENT_COUNT]; 1419 HPT_U16 pendingIo; 1420 HPT_U16 activeIo; 1421 HPT_U32 instantKBPs; 1422 HPT_U32 averageKBPs; 1423 HPT_U32 instantIOPs; 1424 HPT_U32 averageIOPs; 1425} 1426HPT_PM_IOSTAT, *PHPT_PM_IOSTAT; 1427 1428/* 1429 * disk config region 1430 */ 1431typedef struct _ACCESS_CONFIG_REG { 1432 DEVICEID id; 1433 HPT_U16 start; 1434 HPT_U8 sectors; 1435 HPT_U8 read; 1436 HPT_U32 Reserved; 1437 #define ACCESS_CONFIG_REG_buffer(p) ((HPT_U8 *)(p) + sizeof(ACCESS_CONFIG_REG_PARAMS)) 1438} __attribute__((packed))ACCESS_CONFIG_REG_PARAMS, *PACCESS_CONFIG_REG_PARAMS; 1439 1440/* 1441 * dump meta data 1442 */ 1443typedef struct _DUMP_METADATA { 1444 DEVICEID id; 1445 HPT_U8 sectors; 1446 HPT_U8 backsectors; 1447 HPT_U8 offset; 1448 HPT_U8 backoffset; 1449} __attribute__((packed))DUMP_METADATA_PARAMS, *PDUMP_METADATA_PARAMS; 1450 1451 1452 1453/* 1454 * ioctl structure 1455 */ 1456#define HPT_IOCTL_MAGIC32 0x1A2B3C4D 1457#define HPT_IOCTL_MAGIC 0xA1B2C3D4 1458 1459typedef struct _HPT_IOCTL_PARAM { 1460 HPT_U32 Magic; /* used to check if it's a valid ioctl packet */ 1461 HPT_U32 dwIoControlCode; /* operation control code */ 1462 HPT_PTR lpInBuffer; /* input data buffer */ 1463 HPT_U32 nInBufferSize; /* size of input data buffer */ 1464 HPT_PTR lpOutBuffer; /* output data buffer */ 1465 HPT_U32 nOutBufferSize; /* size of output data buffer */ 1466 HPT_PTR lpBytesReturned; /* count of HPT_U8s returned */ 1467} 1468HPT_IOCTL_PARAM, *PHPT_IOCTL_PARAM; 1469 1470/* for 32-bit app running on 64-bit system */ 1471typedef struct _HPT_IOCTL_PARAM32 { 1472 HPT_U32 Magic; 1473 HPT_U32 dwIoControlCode; 1474 HPT_U32 lpInBuffer; 1475 HPT_U32 nInBufferSize; 1476 HPT_U32 lpOutBuffer; 1477 HPT_U32 nOutBufferSize; 1478 HPT_U32 lpBytesReturned; 1479} 1480HPT_IOCTL_PARAM32, *PHPT_IOCTL_PARAM32; 1481 1482#if !defined(__KERNEL__) || defined(SIMULATE) 1483/* 1484 * User-mode ioctl parameter passing conventions: 1485 * The ioctl function implementation is platform specific, so we don't 1486 * have forced rules for it. However, it's suggested to use a parameter 1487 * passing method as below 1488 * 1) Put all input data continuously in an input buffer. 1489 * 2) Prepare an output buffer with enough size if needed. 1490 * 3) Fill a HPT_IOCTL_PARAM structure. 1491 * 4) Pass the structure to driver through a platform-specific method. 1492 * This is implemented in the mid-layer user-mode library. The UI 1493 * programmer needn't care about it. 1494 */ 1495 1496/************************************************************************ 1497 * User mode functions 1498 ************************************************************************/ 1499/* 1500 * hpt_get_version 1501 * Version compatibility: all versions 1502 * Parameters: 1503 * None 1504 * Returns: 1505 * interface version. 0 when fail. 1506 */ 1507HPT_U32 hpt_get_version(void); 1508 1509/* 1510 * hpt_get_driver_capabilities 1511 * Version compatibility: v1.0.0.2 or later 1512 * Parameters: 1513 * Pointer to receive a DRIVE_CAPABILITIES structure. The caller must set 1514 * dwSize member to sizeof(DRIVER_CAPABILITIES). The callee must check this 1515 * member to see if it's correct. 1516 * Returns: 1517 * 0 - Success 1518 */ 1519int hpt_get_driver_capabilities(PDRIVER_CAPABILITIES cap); 1520int hpt_get_driver_capabilities_v2(PDRIVER_CAPABILITIES_V2 cap); 1521 1522/* 1523 * hpt_get_controller_count 1524 * Version compatibility: v1.0.0.1 or later 1525 * Parameters: 1526 * None 1527 * Returns: 1528 * number of controllers 1529 */ 1530int hpt_get_controller_count(void); 1531 1532/* hpt_get_controller_info 1533 * Version compatibility: v1.0.0.1 or later 1534 * Parameters: 1535 * id Controller id 1536 * pInfo pointer to CONTROLLER_INFO buffer 1537 * Returns: 1538 * 0 Success, controller info is put into (*pInfo ). 1539 */ 1540int hpt_get_controller_info(int id, PCONTROLLER_INFO pInfo); 1541 1542#if HPT_INTERFACE_VERSION>=0x01020000 1543/* hpt_get_controller_info_v2 1544 * Version compatibility: v2.0.0.0 or later 1545 * Parameters: 1546 * id Controller id 1547 * pInfo pointer to CONTROLLER_INFO_V2 buffer 1548 * Returns: 1549 * 0 Success, controller info is put into (*pInfo ). 1550 */ 1551int hpt_get_controller_info_v2(int id, PCONTROLLER_INFO_V2 pInfo); 1552 1553/* hpt_get_controller_info_v2_ext 1554 * Version compatibility: v2.0.0.0 or later 1555 * Parameters: 1556 * id Controller id 1557 * pInfo pointer to CONTROLLER_INFO_V2_EXT buffer 1558 * Returns: 1559 * 0 Success, controller info is put into (*pInfo ). 1560 */ 1561int hpt_get_controller_info_v2_ext(int id, PCONTROLLER_INFO_V2_EXT pInfo); 1562 1563/* hpt_get_controller_info_v3 1564 * Version compatibility: v2.0.0.0 or later 1565 * Parameters: 1566 * id Controller id 1567 * pInfo pointer to CONTROLLER_INFO_V3 buffer 1568 * Returns: 1569 * 0 Success, controller info is put into (*pInfo ). 1570 */ 1571int hpt_get_controller_info_v3(int id, PCONTROLLER_INFO_V3 pInfo); 1572#endif 1573 1574/* hpt_get_channel_info 1575 * Version compatibility: v1.0.0.1 or later 1576 * Parameters: 1577 * id Controller id 1578 * bus bus number 1579 * pInfo pointer to CHANNEL_INFO buffer 1580 * Returns: 1581 * 0 Success, channel info is put into (*pInfo ). 1582 */ 1583int hpt_get_channel_info(int id, int bus, PCHANNEL_INFO pInfo); 1584 1585/* hpt_get_channel_info_v2 1586 * Version compatibility: v1.0.0.1 or later 1587 * Parameters: 1588 * id Controller id 1589 * bus bus number 1590 * pInfo pointer to CHANNEL_INFO buffer 1591 * Returns: 1592 * 0 Success, channel info is put into (*pInfo ). 1593 */ 1594int hpt_get_channel_info_v2(int id, int bus, PCHANNEL_INFO_V2 pInfo); 1595 1596/* hpt_get_logical_devices 1597 * Version compatibility: v1.0.0.1 or later 1598 * Parameters: 1599 * pIds pointer to a DEVICEID array 1600 * nMaxCount array size 1601 * Returns: 1602 * Number of ID returned. All logical device IDs are put into pIds array. 1603 * Note: A spare disk is not a logical device. 1604 */ 1605int hpt_get_logical_devices(DEVICEID * pIds, int nMaxCount); 1606 1607/* hpt_get_physical_devices 1608 * Version compatibility: v2.1.0.0 or later 1609 * Parameters: 1610 * pIds pointer to a DEVICEID array 1611 * nMaxCount array size 1612 * Returns: 1613 * Number of ID returned. All physical device IDs are put into pIds array. 1614 */ 1615int hpt_get_physical_devices(DEVICEID * pIds, int nMaxCount); 1616 1617/* hpt_get_device_info 1618 * Version compatibility: v1.0.0.1 or later 1619 * Parameters: 1620 * id logical device id 1621 * pInfo pointer to LOGICAL_DEVICE_INFO structure 1622 * Returns: 1623 * 0 - Success 1624 */ 1625int hpt_get_device_info(DEVICEID id, PLOGICAL_DEVICE_INFO pInfo); 1626 1627/* hpt_create_array 1628 * Version compatibility: v1.0.0.1 or later 1629 * Parameters: 1630 * pParam pointer to CREATE_ARRAY_PARAMS structure 1631 * Returns: 1632 * 0 failed 1633 * else return array id 1634 */ 1635DEVICEID hpt_create_array(PCREATE_ARRAY_PARAMS pParam); 1636 1637/* hpt_delete_array 1638 * Version compatibility: v1.0.0.1 or later 1639 * Parameters: 1640 * id array id 1641 * Returns: 1642 * 0 Success 1643 */ 1644int hpt_delete_array(DEVICEID id, HPT_U32 options); 1645 1646/* hpt_device_io 1647 * Read/write data on array and physcal device. 1648 * Version compatibility: v1.0.0.1 or later 1649 * Parameters: 1650 * id device id. If it's an array ID, IO will be performed on the array. 1651 * If it's a physical device ID, IO will be performed on the device. 1652 * cmd IO_COMMAND_READ or IO_COMMAND_WRITE 1653 * buffer data buffer 1654 * length data size 1655 * Returns: 1656 * 0 Success 1657 */ 1658int hpt_device_io(DEVICEID id, int cmd, HPT_U32 lba, HPT_U32 nSector, void * buffer); 1659 1660/* hpt_add_disk_to_array 1661 * Used to dynamicly add a disk to an RAID1, RAID0/1, RAID1/0 or RAID5 array. 1662 * Auto-rebuild will start. 1663 * Version compatibility: v1.0.0.1 or later 1664 * Parameters: 1665 * idArray array id 1666 * idDisk disk id 1667 * Returns: 1668 * 0 Success 1669 */ 1670int hpt_add_disk_to_array(DEVICEID idArray, DEVICEID idDisk); 1671 1672/* hpt_add_spare_disk 1673 * Version compatibility: v1.0.0.1 or later 1674 * Add a disk to spare pool. 1675 * Parameters: 1676 * idDisk disk id 1677 * Returns: 1678 * 0 Success 1679 */ 1680int hpt_add_spare_disk(DEVICEID idDisk); 1681 1682/* hpt_add_dedicated_spare 1683 * Version compatibility: v1.0.0.3 or later 1684 * Add a spare disk to an array 1685 * Parameters: 1686 * idDisk disk id 1687 * idArray array id 1688 * Returns: 1689 * 0 Success 1690 */ 1691int hpt_add_dedicated_spare(DEVICEID idDisk, DEVICEID idArray); 1692 1693/* hpt_remove_spare_disk 1694 * remove a disk from spare pool. 1695 * Version compatibility: v1.0.0.1 or later 1696 * Parameters: 1697 * idDisk disk id 1698 * Returns: 1699 * 0 Success 1700 */ 1701int hpt_remove_spare_disk(DEVICEID idDisk); 1702 1703/* hpt_get_event 1704 * Used to poll events from driver. 1705 * Version compatibility: v1.0.0.1 or later 1706 * Parameters: 1707 * pEvent pointer to HPT_EVENT structure 1708 * Returns: 1709 * 0 Success, event info is filled in *pEvent 1710 */ 1711int hpt_get_event(PHPT_EVENT pEvent); 1712 1713/* hpt_rebuild_data_block 1714 * Used to copy data from source disk and mirror disk. 1715 * Version compatibility: v1.0.0.1 or later 1716 * Parameters: 1717 * idArray Array ID (RAID1, 0/1 or RAID5) 1718 * Lba Start LBA for each array member 1719 * nSector Number of sectors for each array member (RAID 5 will ignore this parameter) 1720 * 1721 * Returns: 1722 * 0 Success, event info is filled in *pEvent 1723 */ 1724int hpt_rebuild_data_block(DEVICEID idMirror, HPT_U32 Lba, HPT_U8 nSector); 1725#define hpt_rebuild_mirror(p1, p2, p3) hpt_rebuild_data_block(p1, p2, p3) 1726 1727/* hpt_set_array_state 1728 * set array state. 1729 * Version compatibility: v1.0.0.1 or later 1730 * Parameters: 1731 * idArray Array ID 1732 * state See above 'array states' constants, possible values are: 1733 * MIRROR_REBUILD_START 1734 * Indicate that GUI wants to rebuild a mirror array 1735 * MIRROR_REBUILD_ABORT 1736 * GUI wants to abort rebuilding an array 1737 * MIRROR_REBUILD_COMPLETE 1738 * GUI finished to rebuild an array. If rebuild is done by driver this 1739 * state has no use 1740 * 1741 * Returns: 1742 * 0 Success 1743 */ 1744int hpt_set_array_state(DEVICEID idArray, HPT_U32 state); 1745 1746/* hpt_set_array_info 1747 * set array info. 1748 * Version compatibility: v1.0.0.1 or later 1749 * Parameters: 1750 * idArray Array ID 1751 * pInfo pointer to new info 1752 * 1753 * Returns: 1754 * 0 Success 1755 */ 1756int hpt_set_array_info(DEVICEID idArray, PALTERABLE_ARRAY_INFO pInfo); 1757 1758/* hpt_set_device_info 1759 * set device info. 1760 * Version compatibility: v1.0.0.1 or later 1761 * Parameters: 1762 * idDisk device ID 1763 * pInfo pointer to new info 1764 * 1765 * Returns: 1766 * 0 Success 1767 * Additional notes: 1768 * If idDisk==0, call to this function will stop buzzer on the adapter 1769 * (if supported by driver). 1770 */ 1771int hpt_set_device_info(DEVICEID idDisk, PALTERABLE_DEVICE_INFO pInfo); 1772 1773#if HPT_INTERFACE_VERSION >= 0x01000004 1774int hpt_set_device_info_v2(DEVICEID idDisk, PALTERABLE_DEVICE_INFO_V2 pInfo); 1775#endif 1776 1777/* hpt_rescan_devices 1778 * rescan devices 1779 * Version compatibility: v1.0.0.1 or later 1780 * Parameters: 1781 * None 1782 * Returns: 1783 * 0 Success 1784 */ 1785int hpt_rescan_devices(void); 1786 1787/* hpt_get_601_info 1788 * Get HPT601 status 1789 * Version compatibiilty: v1.0.0.3 or later 1790 * Parameters: 1791 * idDisk - Disk handle 1792 * PHPT601_INFO - pointer to HPT601 info buffer 1793 * Returns: 1794 * 0 Success 1795 */ 1796int hpt_get_601_info(DEVICEID idDisk, PHPT601_INFO pInfo); 1797 1798/* hpt_set_601_info 1799 * HPT601 function control 1800 * Version compatibiilty: v1.0.0.3 or later 1801 * Parameters: 1802 * idDisk - Disk handle 1803 * PHPT601_INFO - pointer to HPT601 info buffer 1804 * Returns: 1805 * 0 Success 1806 */ 1807int hpt_set_601_info(DEVICEID idDisk, PHPT601_INFO pInfo); 1808 1809/* hpt_lock_device 1810 * Lock a block on a device (prevent OS accessing it) 1811 * Version compatibiilty: v1.0.0.3 or later 1812 * Parameters: 1813 * idDisk - Disk handle 1814 * Lba - Start LBA 1815 * nSectors - number of sectors 1816 * Returns: 1817 * 0 Success 1818 */ 1819int hpt_lock_device(DEVICEID idDisk, HPT_U32 Lba, HPT_U8 nSectors); 1820 1821/* hpt_lock_device 1822 * Unlock a device 1823 * Version compatibiilty: v1.0.0.3 or later 1824 * Parameters: 1825 * idDisk - Disk handle 1826 * Returns: 1827 * 0 Success 1828 */ 1829int hpt_unlock_device(DEVICEID idDisk); 1830 1831/* hpt_ide_pass_through 1832 * send a ATA passthrough command to a device. 1833 * Version compatibility: v1.0.0.3 or later 1834 * Parameters: 1835 * p - IDE_PASS_THROUGH header pointer 1836 * Returns: 1837 * 0 Success 1838 */ 1839int hpt_ide_pass_through(PIDE_PASS_THROUGH_HEADER p); 1840int hpt_ide_pass_through_v2(PIDE_PASS_THROUGH_HEADER_V2 p); 1841 1842/* hpt_scsi_passthrough 1843 * send a SCSI passthrough command to a device. 1844 * Version compatibility: v2.0.0.0 or later 1845 * Parameters: 1846 * in - HPT_SCSI_PASSTHROUGH_IN header pointer 1847 * out - PHPT_SCSI_PASSTHROUGH_OUT header pointer 1848 * insize, outsize - in/out buffer size 1849 * Returns: 1850 * 0 Success 1851 */ 1852int hpt_scsi_passthrough(PHPT_SCSI_PASSTHROUGH_IN in, HPT_U32 insize, 1853 PHPT_SCSI_PASSTHROUGH_OUT out, HPT_U32 outsize); 1854 1855/* hpt_verify_data_block 1856 * verify data block on RAID1 or RAID5. 1857 * Version compatibility: v1.0.0.3 or later 1858 * Parameters: 1859 * idArray - Array ID 1860 * Lba - block number (on each array member, not logical block!) 1861 * nSectors - Sectors for each member (RAID 5 will ignore this parameter) 1862 * Returns: 1863 * 0 Success 1864 * 1 Data compare error 1865 * 2 I/O error 1866 */ 1867int hpt_verify_data_block(DEVICEID idArray, HPT_U32 Lba, HPT_U8 nSectors); 1868 1869/* hpt_initialize_data_block 1870 * initialize data block (fill with zero) on RAID5 1871 * Version compatibility: v1.0.0.3 or later 1872 * Parameters: 1873 * idArray - Array ID 1874 * Lba - block number (on each array member, not logical block!) 1875 * nSectors - Sectors for each member (RAID 5 will ignore this parameter) 1876 * Returns: 1877 * 0 Success 1878 */ 1879int hpt_initialize_data_block(DEVICEID idArray, HPT_U32 Lba, HPT_U8 nSectors); 1880 1881/* hpt_device_io_ex 1882 * extended device I/O function 1883 * Version compatibility: v1.0.0.3 or later 1884 * Parameters: 1885 * idArray - Array ID 1886 * Lba - block number (on each array member, not logical block!) 1887 * nSectors - Sectors for each member 1888 * buffer - I/O buffer or s/g address 1889 * Returns: 1890 * 0 Success 1891 */ 1892int hpt_device_io_ex(PDEVICE_IO_EX_PARAMS param); 1893 1894/* hpt_set_boot_mark 1895 * select boot device 1896 * Version compatibility: v1.0.0.3 or later 1897 * Parameters: 1898 * id - logical device ID. If id is 0 the boot mark will be removed. 1899 * Returns: 1900 * 0 Success 1901 */ 1902int hpt_set_boot_mark(DEVICEID id); 1903 1904/* hpt_query_remove 1905 * check if device can be removed safely 1906 * Version compatibility: v1.0.0.4 or later 1907 * Parameters: 1908 * ndev - number of devices 1909 * pIds - device ID list 1910 * Returns: 1911 * 0 - Success 1912 * -1 - unknown error 1913 * n - the n-th device that can't be removed 1914 */ 1915int hpt_query_remove(HPT_U32 ndev, DEVICEID *pIds); 1916 1917/* hpt_remove_devices 1918 * remove a list of devices 1919 * Version compatibility: v1.0.0.4 or later 1920 * Parameters: 1921 * ndev - number of devices 1922 * pIds - device ID list 1923 * Returns: 1924 * 0 - Success 1925 * -1 - unknown error 1926 * n - the n-th device that can't be removed 1927 */ 1928int hpt_remove_devices(HPT_U32 ndev, DEVICEID *pIds); 1929 1930/* hpt_create_array_v2 1931 * Version compatibility: v1.1.0.0 or later 1932 * Parameters: 1933 * pParam pointer to CREATE_ARRAY_PARAMS_V2 structure 1934 * Returns: 1935 * 0 failed 1936 * else return array id 1937 */ 1938#if HPT_INTERFACE_VERSION>=0x01010000 1939DEVICEID hpt_create_array_v2(PCREATE_ARRAY_PARAMS_V2 pParam); 1940#endif 1941 1942/* hpt_create_array_v3 1943 * Version compatibility: v2.0.0.1 or later 1944 * Parameters: 1945 * pParam pointer to CREATE_ARRAY_PARAMS_V3 structure 1946 * Returns: 1947 * 0 failed 1948 * else return array id 1949 */ 1950#if HPT_INTERFACE_VERSION>=0x02000001 1951DEVICEID hpt_create_array_v3(PCREATE_ARRAY_PARAMS_V3 pParam); 1952#endif 1953 1954/* hpt_get_device_info_v2 1955 * Version compatibility: v1.1.0.0 or later 1956 * Parameters: 1957 * id logical device id 1958 * pInfo pointer to LOGICAL_DEVICE_INFO_V2 structure 1959 * Returns: 1960 * 0 - Success 1961 */ 1962#if HPT_INTERFACE_VERSION>=0x01010000 1963int hpt_get_device_info_v2(DEVICEID id, PLOGICAL_DEVICE_INFO_V2 pInfo); 1964#endif 1965 1966/* hpt_get_device_info_v3 1967 * Version compatibility: v1.2.0.0 or later 1968 * Parameters: 1969 * id logical device id 1970 * pInfo pointer to LOGICAL_DEVICE_INFO_V3 structure 1971 * Returns: 1972 * 0 - Success 1973 */ 1974#if HPT_INTERFACE_VERSION>=0x01020000 1975int hpt_get_device_info_v3(DEVICEID id, PLOGICAL_DEVICE_INFO_V3 pInfo); 1976#endif 1977 1978/* hpt_get_device_info_v4 1979 * Version compatibility: v2.0.0.1 or later 1980 * Parameters: 1981 * id logical device id 1982 * pInfo pointer to LOGICAL_DEVICE_INFO_V4 structure 1983 * Returns: 1984 * 0 - Success 1985 */ 1986#if HPT_INTERFACE_VERSION>=0x02000001 1987int hpt_get_device_info_v4(DEVICEID id, PLOGICAL_DEVICE_INFO_V4 pInfo); 1988#endif 1989 1990/* hpt_create_transform 1991 * create a transform instance. 1992 * Version compatibility: v2.0.0.0 or later 1993 * Parameters: 1994 * idArray - source array 1995 * destInfo - destination array info 1996 * Returns: 1997 * destination array id 1998 */ 1999#if HPT_INTERFACE_VERSION>=0x02000000 2000DEVICEID hpt_create_transform(DEVICEID idArray, PCREATE_ARRAY_PARAMS_V2 destInfo); 2001#endif 2002 2003/* hpt_create_transform_v2 2004 * create a transform instance. 2005 * Version compatibility: v2.0.0.1 or later 2006 * Parameters: 2007 * idArray - source array 2008 * destInfo - destination array info 2009 * Returns: 2010 * destination array id 2011 */ 2012#if HPT_INTERFACE_VERSION>=0x02000001 2013DEVICEID hpt_create_transform_v2(DEVICEID idArray, PCREATE_ARRAY_PARAMS_V3 destInfo); 2014#endif 2015 2016/* hpt_step_transform 2017 * move a block in a transform progress. 2018 * This function is called by mid-layer, not GUI (which uses set_array_state instead). 2019 * Version compatibility: v2.0.0.0 or later 2020 * Parameters: 2021 * idArray - destination array ID 2022 * the source ID will be invalid when transform complete. 2023 * Returns: 2024 * 0 - Success 2025 */ 2026#if HPT_INTERFACE_VERSION>=0x02000000 2027int hpt_step_transform(DEVICEID idArray); 2028#endif 2029 2030/* hpt_set_vdev_info 2031 * set information for disk or array 2032 * Version compatibility: v1.2.0.0 or later 2033 * Parameters: 2034 * dev - destination device 2035 * 2036 * Returns: 2037 * 0 - Success 2038 */ 2039#if HPT_INTERFACE_VERSION>=0x01020000 2040int hpt_set_vdev_info(DEVICEID dev, PSET_VDEV_INFO pInfo); 2041#endif 2042 2043/* hpt_init_disks 2044 * initialize disks for use 2045 * Version compatibility: v2.0.0.0 or later 2046 * Parameters: 2047 * ndev - number of disks to initialize 2048 * pIds - array of DEVICEID 2049 * 2050 * Returns: 2051 * 0 - Success 2052 */ 2053#if HPT_INTERFACE_VERSION>=0x02000000 2054int hpt_init_disks(HPT_U32 ndev, DEVICEID * pIds); 2055#endif 2056 2057/* hpt_calc_max_array_capacity 2058 * cap max capacity of the array user want to create or transform 2059 * Version compatibility: v1.2.0.0 or later 2060 * Parameters: 2061 * source - if transform, this is the source array, otherwise, it should be zero 2062 * destInfo - target array params 2063 * Returns: 2064 * 0 - Success 2065 * cap - max capacity of the target array 2066 */ 2067#if HPT_INTERFACE_VERSION>=0x01020000 2068int hpt_calc_max_array_capacity(DEVICEID source, PCREATE_ARRAY_PARAMS_V2 destInfo, HPT_U64 * cap); 2069#endif 2070 2071/* hpt_calc_max_array_capacity_v2 2072 * cap max capacity of the array user want to create or transform 2073 * Version compatibility: v2.0.0.1 or later 2074 * Parameters: 2075 * source - if transform, this is the source array, otherwise, it should be zero 2076 * destInfo - target array params 2077 * Returns: 2078 * 0 - Success 2079 * cap - max capacity of the target array 2080 */ 2081#if HPT_INTERFACE_VERSION>=0x02000001 2082int hpt_calc_max_array_capacity_v2(DEVICEID source, PCREATE_ARRAY_PARAMS_V3 destInfo, HPT_U64 * cap); 2083#endif 2084 2085/* hpt_rebuild_data_block2 2086 * Used to copy data from source disk and mirror disk. 2087 * Version compatibility: v1.1.0.0 or later 2088 * Parameters: 2089 * idArray Array ID (RAID1, 0/1 or RAID5) 2090 * Lba Start LBA for each array member 2091 * nSector Number of sectors for each array member (RAID 5 will ignore this parameter) 2092 * 2093 * Returns: 2094 * 0 Success, event info is filled in *pEvent 2095 */ 2096#if HPT_INTERFACE_VERSION>=0x01010000 2097int hpt_rebuild_data_block_v2(DEVICEID idMirror, HPT_U64 Lba, HPT_U16 nSector); 2098#endif 2099 2100/* hpt_verify_data_block2 2101 * verify data block on RAID1 or RAID5. 2102 * Version compatibility: v1.1.0.0 or later 2103 * Parameters: 2104 * idArray - Array ID 2105 * Lba - block number (on each array member, not logical block!) 2106 * nSectors - Sectors for each member (RAID 5 will ignore this parameter) 2107 * Returns: 2108 * 0 Success 2109 * 1 Data compare error 2110 * 2 I/O error 2111 */ 2112#if HPT_INTERFACE_VERSION>=0x01010000 2113int hpt_verify_data_block_v2(DEVICEID idArray, HPT_U64 Lba, HPT_U16 nSectors); 2114#endif 2115 2116/* hpt_initialize_data_block2 2117 * initialize data block (fill with zero) on RAID5 2118 * Version compatibility: v1.1.0.0 or later 2119 * Parameters: 2120 * idArray - Array ID 2121 * Lba - block number (on each array member, not logical block!) 2122 * nSectors - Sectors for each member (RAID 5 will ignore this parameter) 2123 * Returns: 2124 * 0 Success 2125 */ 2126#if HPT_INTERFACE_VERSION>=0x01010000 2127int hpt_initialize_data_block_v2(DEVICEID idArray, HPT_U64 Lba, HPT_U16 nSectors); 2128#endif 2129 2130/* hpt_i2c_transaction 2131 * perform an transaction on i2c bus 2132 * Version compatibility: v2.0.0.0 or later 2133 * Parameters: 2134 * indata[0] - controller ID 2135 * Returns: 2136 * 0 Success 2137 */ 2138#if HPT_INTERFACE_VERSION>=0x01020000 2139int hpt_i2c_transaction(HPT_U8 *indata, HPT_U32 inlen, HPT_U8 *outdata, HPT_U32 outlen, HPT_U32 *poutlen); 2140#endif 2141 2142/* hpt_get_parameter_list 2143 * get a list of driver parameters. 2144 * Version compatibility: v1.0.0.0 or later 2145 * Parameters: 2146 * location - parameter location 2147 * outBuffer - a buffer to hold the output 2148 * outBufferSize - size of outBuffer 2149 * Returns: 2150 * 0 Success 2151 * put in outBuffer a list of zero terminated parameter names. the whole list 2152 * is terminated with an additional zero byte. 2153 */ 2154int hpt_get_parameter_list(HPT_U32 location, char *outBuffer, HPT_U32 outBufferSize); 2155 2156/* hpt_{get,set}_parameter 2157 * get/set a parameter value. 2158 * Version compatibility: v1.0.0.0 or later 2159 * Parameters: 2160 * pParam - a pointer to HPT_DRIVER_PARAMETER. 2161 * Returns: 2162 * 0 Success 2163 */ 2164int hpt_get_parameter(PHPT_DRIVER_PARAMETER pParam); 2165int hpt_set_parameter(PHPT_DRIVER_PARAMETER pParam); 2166int hpt_reenumerate_device(DEVICEID id); 2167 2168/* 2169 * hpt_get_enclosure_count 2170 * Version compatibility: v2.1.0.0 or later 2171 * Parameters: 2172 * controller_id 2173 * Returns: 2174 * number of enclosurers 2175 */ 2176int hpt_get_enclosure_count(int ctlr_id); 2177 2178/* hpt_get_enclosure_info 2179 * Version compatibility: v2.1.0.0 or later 2180 * Parameters: 2181 * id enclosure id 2182 * pInfo pointer to ENCLOSURE_INFO buffer 2183 * Returns: 2184 * 0 Success, enclosure info is put into (*pInfo ). 2185 */ 2186int hpt_get_enclosure_info(int ctlr_id, int enc_id, PENCLOSURE_INFO pInfo); 2187 2188int hpt_get_enclosure_info_v2(int ctlr_id, int enc_id, PENCLOSURE_INFO_V2 pInfo); 2189 2190int hpt_get_enclosure_info_v3(int ctlr_id, int enc_id, PENCLOSURE_INFO_V3 pInfo); 2191 2192int hpt_get_enclosure_info_v4(int ctlr_id, int enc_id, PENCLOSURE_INFO_V4 pInfo); 2193int hpt_get_enclosure_element_info(int ctlr_id, int enc_id, int ele_id, PSES_ELEMENT_STATUS pInfo); 2194 2195/* performance monitor interface 2196 * Version compatibility: v2.1.0.0 or later 2197 */ 2198int hpt_get_perfmon_status(int ctlr_id, int *p_status); 2199int hpt_set_perfmon_status(int ctlr_id, int enable); 2200int hpt_get_perfmon_data(DEVICEID id, PHPT_PM_IOSTAT iostat); 2201 2202/* hpt_get_controller_venid 2203 * Version compatibility: v1.0.0.0 or later 2204 */ 2205int hpt_get_controller_venid(int ctlr_id, HPT_U32 *venid); 2206 2207/* hpt_access_config_reg 2208 * access the reserved config space on disk 2209 * Parameters: 2210 * p - ACCESS_CONFIG_REG_PARAMS header pointer 2211 * Returns: 2212 * 0 Success 2213 */ 2214int hpt_access_config_reg(PACCESS_CONFIG_REG_PARAMS p); 2215 2216/* hpt_dump_metadata 2217 * dump internal metadata 2218 * Parameters: 2219 * p - PDUMP_METADATA_PARAMS header pointer 2220 * Returns: 2221 * 0 Success 2222 */ 2223int hpt_dump_metadata(PDUMP_METADATA_PARAMS p); 2224 2225#endif 2226 2227#pragma pack() 2228 2229#ifdef __cplusplus 2230} 2231#endif 2232#endif 2233