1139825Simp#-
286551Sjake# Copyright (c) 2017-2018 Ruslan Bukin <br@bsdpad.com>
386551Sjake# All rights reserved.
486551Sjake#
586551Sjake# This software was developed by SRI International and the University of
686551Sjake# Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
786551Sjake# ("CTSRD"), as part of the DARPA CRASH research programme.
886551Sjake#
986551Sjake# Redistribution and use in source and binary forms, with or without
1086551Sjake# modification, are permitted provided that the following conditions
1186551Sjake# are met:
1286551Sjake# 1. Redistributions of source code must retain the above copyright
1386551Sjake#    notice, this list of conditions and the following disclaimer.
1486551Sjake# 2. Redistributions in binary form must reproduce the above copyright
1586551Sjake#    notice, this list of conditions and the following disclaimer in the
1686551Sjake#    documentation and/or other materials provided with the distribution.
1786551Sjake#
1886551Sjake# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
1986551Sjake# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
2086551Sjake# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
2186551Sjake# ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
2286551Sjake# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
2386551Sjake# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
2486551Sjake# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
2586551Sjake# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
2686551Sjake# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
2786551Sjake# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
2886551Sjake# SUCH DAMAGE.
2986551Sjake#
3086551Sjake#
3186551Sjake
3286551Sjake#include <sys/bus.h>
3386551Sjake#include <sys/bio.h>
3486551Sjake
3586551SjakeINTERFACE qspi;
3686551Sjake
3786551SjakeMETHOD int read {
3886551Sjake	device_t dev;
3986551Sjake	device_t child;
4086551Sjake	struct bio *bp;
4186551Sjake	off_t offset;
4286551Sjake	caddr_t data;
4386551Sjake	off_t count;
4492844Salfred};
4586551Sjake
4686551SjakeMETHOD int write {
4786551Sjake	device_t dev;
4886551Sjake	device_t child;
49128629Sdas	struct bio *bp;
50110566Smike	off_t offset;
51217182Sdas	caddr_t data;
52128629Sdas	off_t count;
5386551Sjake};
5486551Sjake
5586551SjakeMETHOD int erase {
5686551Sjake	device_t dev;
5786551Sjake	device_t child;
5886551Sjake	off_t offset;
5986551Sjake};
6086551Sjake
6186551SjakeMETHOD int write_reg {
6286551Sjake	device_t dev;
63230475Sdas	device_t child;
64230475Sdas	uint8_t opcode;
65230475Sdas	uint8_t *addr;
66230475Sdas	uint32_t len;
67230475Sdas};
6886551Sjake
6986551SjakeMETHOD int read_reg {
7086551Sjake	device_t dev;
7186551Sjake	device_t child;
7286551Sjake	uint8_t opcode;
7386551Sjake	uint8_t *addr;
7486551Sjake	uint32_t len;
7586551Sjake};
7686551Sjake