1/*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2022 Adrian Chadd <adrian@FreeBSD.org>.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27#ifndef	__AR40XX_VAR_H__
28#define	__AR40XX_VAR_H__
29
30#define	AR40XX_LOCK(_sc)		mtx_lock(&(_sc)->sc_mtx)
31#define	AR40XX_UNLOCK(_sc)		mtx_unlock(&(_sc)->sc_mtx)
32#define	AR40XX_LOCK_ASSERT(_sc)		mtx_assert(&(_sc)->sc_mtx, MA_OWNED)
33
34/*
35 * register space access macros
36 */
37#define	AR40XX_REG_WRITE(sc, reg, val)		do {		\
38	    bus_write_4(sc->sc_ess_mem_res, (reg), (val));	\
39	    } while (0)
40
41#define	AR40XX_REG_READ(sc, reg)	bus_read_4(sc->sc_ess_mem_res, (reg))
42
43#define	AR40XX_REG_BARRIER_WRITE(sc)	bus_barrier((sc)->sc_ess_mem_res,	\
44	    0, (sc)->sc_ess_mem_size, BUS_SPACE_BARRIER_WRITE)
45#define	AR40XX_REG_BARRIER_READ(sc)	bus_barrier((sc)->sc_ess_mem_res,	\
46	    0, (sc)->sc_ess_mem_size, BUS_SPACE_BARRIER_READ)
47#define	AR40XX_REG_BARRIER_RW(sc)	bus_barrier((sc)->sc_ess_mem_res,	\
48	    0, (sc)->sc_ess_mem_size,					\
49	    BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE)
50
51/* Size of the VLAN table itself in hardware */
52#define	AR40XX_NUM_VTU_ENTRIES		64
53#define	AR40XX_NUM_PORTS		6
54#define	AR40XX_NUM_PHYS			5
55/* Size of the ATU table in hardware */
56#define	AR40XX_NUM_ATU_ENTRIES		2048
57
58struct ar40xx_softc {
59	struct mtx	sc_mtx;		/* serialize access to softc */
60	device_t	sc_dev;
61	uint32_t	sc_debug;
62
63	/* ess-switch memory resource */
64	struct resource	*sc_ess_mem_res;
65	int		sc_ess_mem_rid;
66	size_t		sc_ess_mem_size;
67
68	/* ess-switch clock resource */
69	clk_t		sc_ess_clk;
70
71	/* ess-switch reset resource */
72	hwreset_t	sc_ess_rst;
73
74	/* phy update callout timer */
75	struct callout	sc_phy_callout;
76
77	/* memory for the ess-psgmii config interface */
78	bus_space_tag_t		sc_psgmii_mem_tag;
79	bus_space_handle_t	sc_psgmii_mem_handle;
80	bus_size_t		sc_psgmii_mem_size;
81
82	/* reference to the ipq4019-mdio interface */
83	phandle_t		sc_mdio_phandle;
84	device_t		sc_mdio_dev;
85
86	etherswitch_info_t	sc_info;
87
88	struct {
89		uint32_t	phy_t_status;
90	} sc_psgmii;
91
92	struct {
93		uint32_t switch_mac_mode;
94		uint32_t switch_cpu_bmp;
95		uint32_t switch_lan_bmp;
96		uint32_t switch_wan_bmp;
97	} sc_config;
98
99	/* VLAN table configuration */
100	struct {
101		/* Whether 802.1q VLANs are enabled or not */
102		bool vlan;
103		/* Map etherswitch vgroup to 802.1q vlan */
104		uint16_t vlan_id[AR40XX_NUM_VTU_ENTRIES];
105		/* VLAN port membership */
106		uint8_t vlan_ports[AR40XX_NUM_VTU_ENTRIES];
107		/* VLAN port membership - untagged ports */
108		uint16_t vlan_untagged[AR40XX_NUM_VTU_ENTRIES];
109		/* PVID for each port - index into vlan_id[] */
110		uint16_t pvid[AR40XX_NUM_PORTS];
111	} sc_vlan;
112
113	struct {
114		bool mirror_rx;
115		bool mirror_tx;
116		int source_port;
117		int monitor_port;
118	} sc_monitor;
119
120	struct {
121		char *ifname[AR40XX_NUM_PHYS];
122		device_t miibus[AR40XX_NUM_PHYS];
123		if_t ifp[AR40XX_NUM_PHYS];
124	} sc_phys;
125
126	/* ATU (address table unit) support */
127	struct {
128		int count;
129		int size;
130		etherswitch_atu_entry_t entries[AR40XX_NUM_ATU_ENTRIES];
131	} atu;
132};
133
134#endif	/* __AR40XX_VAR_H__ */
135
136