1/*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2022 Adrian Chadd <adrian@FreeBSD.org>. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28#include <sys/param.h> 29#include <sys/bus.h> 30#include <sys/errno.h> 31#include <sys/kernel.h> 32#include <sys/malloc.h> 33#include <sys/module.h> 34#include <sys/socket.h> 35#include <sys/sockio.h> 36#include <sys/sysctl.h> 37#include <sys/systm.h> 38 39#include <net/if.h> 40#include <net/if_var.h> 41#include <net/if_arp.h> 42#include <net/ethernet.h> 43#include <net/if_dl.h> 44#include <net/if_media.h> 45#include <net/if_types.h> 46 47#include <machine/bus.h> 48#include <dev/iicbus/iic.h> 49#include <dev/iicbus/iiconf.h> 50#include <dev/iicbus/iicbus.h> 51#include <dev/mii/mii.h> 52#include <dev/mii/miivar.h> 53#include <dev/mdio/mdio.h> 54#include <dev/clk/clk.h> 55#include <dev/hwreset/hwreset.h> 56 57#include <dev/fdt/fdt_common.h> 58#include <dev/ofw/ofw_bus.h> 59#include <dev/ofw/ofw_bus_subr.h> 60 61#include <dev/etherswitch/etherswitch.h> 62 63#include <dev/etherswitch/ar40xx/ar40xx_var.h> 64#include <dev/etherswitch/ar40xx/ar40xx_reg.h> 65#include <dev/etherswitch/ar40xx/ar40xx_hw.h> 66#include <dev/etherswitch/ar40xx/ar40xx_hw_mirror.h> 67 68#include "mdio_if.h" 69#include "miibus_if.h" 70#include "etherswitch_if.h" 71 72 73int 74ar40xx_hw_mirror_set_registers(struct ar40xx_softc *sc) 75{ 76 uint32_t reg; 77 int port; 78 79 /* Reset the mirror registers before configuring */ 80 reg = AR40XX_REG_READ(sc, AR40XX_REG_FWD_CTRL0); 81 reg &= ~(AR40XX_FWD_CTRL0_MIRROR_PORT); 82 reg |= (0xF << AR40XX_FWD_CTRL0_MIRROR_PORT_S); 83 AR40XX_REG_WRITE(sc, AR40XX_REG_FWD_CTRL0, reg); 84 AR40XX_REG_BARRIER_WRITE(sc); 85 86 for (port = 0; port < AR40XX_NUM_PORTS; port++) { 87 reg = AR40XX_REG_READ(sc, AR40XX_REG_PORT_LOOKUP(port)); 88 reg &= ~AR40XX_PORT_LOOKUP_ING_MIRROR_EN; 89 AR40XX_REG_WRITE(sc, AR40XX_REG_PORT_LOOKUP(port), reg); 90 91 reg = AR40XX_REG_READ(sc, AR40XX_REG_PORT_HOL_CTRL1(port)); 92 reg &= ~AR40XX_PORT_HOL_CTRL1_EG_MIRROR_EN; 93 AR40XX_REG_WRITE(sc, AR40XX_REG_PORT_HOL_CTRL1(port), reg); 94 95 AR40XX_REG_BARRIER_WRITE(sc); 96 } 97 98 /* Now, enable mirroring if requested */ 99 if (sc->sc_monitor.source_port >= AR40XX_NUM_PORTS 100 || sc->sc_monitor.monitor_port >= AR40XX_NUM_PORTS 101 || sc->sc_monitor.source_port == sc->sc_monitor.monitor_port) { 102 return (0); 103 } 104 105 reg = AR40XX_REG_READ(sc, AR40XX_REG_FWD_CTRL0); 106 reg &= ~AR40XX_FWD_CTRL0_MIRROR_PORT; 107 reg |= 108 (sc->sc_monitor.monitor_port << AR40XX_FWD_CTRL0_MIRROR_PORT_S); 109 AR40XX_REG_WRITE(sc, AR40XX_REG_FWD_CTRL0, reg); 110 111 if (sc->sc_monitor.mirror_rx) { 112 reg = AR40XX_REG_READ(sc, 113 AR40XX_REG_PORT_LOOKUP(sc->sc_monitor.source_port)); 114 reg |= AR40XX_PORT_LOOKUP_ING_MIRROR_EN; 115 AR40XX_REG_WRITE(sc, 116 AR40XX_REG_PORT_LOOKUP(sc->sc_monitor.source_port), 117 reg); 118 AR40XX_REG_BARRIER_WRITE(sc); 119 } 120 121 if (sc->sc_monitor.mirror_tx) { 122 reg = AR40XX_REG_READ(sc, 123 AR40XX_REG_PORT_HOL_CTRL1(sc->sc_monitor.source_port)); 124 reg |= AR40XX_PORT_HOL_CTRL1_EG_MIRROR_EN; 125 AR40XX_REG_WRITE(sc, 126 AR40XX_REG_PORT_HOL_CTRL1(sc->sc_monitor.source_port), 127 reg); 128 AR40XX_REG_BARRIER_WRITE(sc); 129 } 130 131 return (0); 132} 133