1/*-
2 * Copyright (c) 2015-2016 Chelsio Communications, Inc.
3 * All rights reserved.
4 * Written by: John Baldwin <jhb@FreeBSD.org>
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28#include <sys/param.h>
29#include <sys/bus.h>
30#include <sys/kernel.h>
31#include <sys/module.h>
32#include <sys/systm.h>
33#include <dev/pci/pcivar.h>
34
35#ifdef PCI_IOV
36#include <sys/nv.h>
37#include <sys/iov_schema.h>
38#include <dev/pci/pci_iov.h>
39#endif
40
41#include "common/common.h"
42#include "common/t4_regs.h"
43#include "t4_if.h"
44
45struct t4iov_softc {
46	device_t sc_dev;
47	device_t sc_main;
48	bool sc_attached;
49
50	int pf;
51	int regs_rid;
52	struct resource *regs_res;
53	bus_space_handle_t bh;
54	bus_space_tag_t bt;
55};
56
57struct {
58	uint16_t device;
59	char *desc;
60} t4iov_pciids[] = {
61	{0x4000, "Chelsio T440-dbg"},
62	{0x4001, "Chelsio T420-CR"},
63	{0x4002, "Chelsio T422-CR"},
64	{0x4003, "Chelsio T440-CR"},
65	{0x4004, "Chelsio T420-BCH"},
66	{0x4005, "Chelsio T440-BCH"},
67	{0x4006, "Chelsio T440-CH"},
68	{0x4007, "Chelsio T420-SO"},
69	{0x4008, "Chelsio T420-CX"},
70	{0x4009, "Chelsio T420-BT"},
71	{0x400a, "Chelsio T404-BT"},
72	{0x400e, "Chelsio T440-LP-CR"},
73}, t5iov_pciids[] = {
74	{0x5000, "Chelsio T580-dbg"},
75	{0x5001,  "Chelsio T520-CR"},		/* 2 x 10G */
76	{0x5002,  "Chelsio T522-CR"},		/* 2 x 10G, 2 X 1G */
77	{0x5003,  "Chelsio T540-CR"},		/* 4 x 10G */
78	{0x5007,  "Chelsio T520-SO"},		/* 2 x 10G, nomem */
79	{0x5009,  "Chelsio T520-BT"},		/* 2 x 10GBaseT */
80	{0x500a,  "Chelsio T504-BT"},		/* 4 x 1G */
81	{0x500d,  "Chelsio T580-CR"},		/* 2 x 40G */
82	{0x500e,  "Chelsio T540-LP-CR"},	/* 4 x 10G */
83	{0x5010,  "Chelsio T580-LP-CR"},	/* 2 x 40G */
84	{0x5011,  "Chelsio T520-LL-CR"},	/* 2 x 10G */
85	{0x5012,  "Chelsio T560-CR"},		/* 1 x 40G, 2 x 10G */
86	{0x5014,  "Chelsio T580-LP-SO-CR"},	/* 2 x 40G, nomem */
87	{0x5015,  "Chelsio T502-BT"},		/* 2 x 1G */
88	{0x5018,  "Chelsio T540-BT"},		/* 4 x 10GBaseT */
89	{0x5019,  "Chelsio T540-LP-BT"},	/* 4 x 10GBaseT */
90	{0x501a,  "Chelsio T540-SO-BT"},	/* 4 x 10GBaseT, nomem */
91	{0x501b,  "Chelsio T540-SO-CR"},	/* 4 x 10G, nomem */
92}, t6iov_pciids[] = {
93	{0x6000, "Chelsio T6-DBG-25"},		/* 2 x 10/25G, debug */
94	{0x6001, "Chelsio T6225-CR"},		/* 2 x 10/25G */
95	{0x6002, "Chelsio T6225-SO-CR"},	/* 2 x 10/25G, nomem */
96	{0x6003, "Chelsio T6425-CR"},		/* 4 x 10/25G */
97	{0x6004, "Chelsio T6425-SO-CR"},	/* 4 x 10/25G, nomem */
98	{0x6005, "Chelsio T6225-OCP-SO"},	/* 2 x 10/25G, nomem */
99	{0x6006, "Chelsio T62100-OCP-SO"},	/* 2 x 40/50/100G, nomem */
100	{0x6007, "Chelsio T62100-LP-CR"},	/* 2 x 40/50/100G */
101	{0x6008, "Chelsio T62100-SO-CR"},	/* 2 x 40/50/100G, nomem */
102	{0x6009, "Chelsio T6210-BT"},		/* 2 x 10GBASE-T */
103	{0x600d, "Chelsio T62100-CR"},		/* 2 x 40/50/100G */
104	{0x6010, "Chelsio T6-DBG-100"},		/* 2 x 40/50/100G, debug */
105	{0x6011, "Chelsio T6225-LL-CR"},	/* 2 x 10/25G */
106	{0x6014, "Chelsio T61100-OCP-SO"},	/* 1 x 40/50/100G, nomem */
107	{0x6015, "Chelsio T6201-BT"},		/* 2 x 1000BASE-T */
108
109	/* Custom */
110	{0x6080, "Chelsio T6225 80"},
111	{0x6081, "Chelsio T62100 81"},
112	{0x6082, "Chelsio T6225-CR 82"},
113	{0x6083, "Chelsio T62100-CR 83"},
114	{0x6084, "Chelsio T64100-CR 84"},
115	{0x6085, "Chelsio T6240-SO 85"},
116	{0x6086, "Chelsio T6225-SO-CR 86"},
117	{0x6087, "Chelsio T6225-CR 87"},
118};
119
120static inline uint32_t
121t4iov_read_reg(struct t4iov_softc *sc, uint32_t reg)
122{
123
124	return bus_space_read_4(sc->bt, sc->bh, reg);
125}
126
127static int	t4iov_attach_child(device_t dev);
128
129static int
130t4iov_probe(device_t dev)
131{
132	uint16_t d;
133	size_t i;
134
135	if (pci_get_vendor(dev) != PCI_VENDOR_ID_CHELSIO)
136		return (ENXIO);
137
138	d = pci_get_device(dev);
139	for (i = 0; i < nitems(t4iov_pciids); i++) {
140		if (d == t4iov_pciids[i].device) {
141			device_set_desc(dev, t4iov_pciids[i].desc);
142			device_quiet(dev);
143			return (BUS_PROBE_DEFAULT);
144		}
145	}
146	return (ENXIO);
147}
148
149static int
150t5iov_probe(device_t dev)
151{
152	uint16_t d;
153	size_t i;
154
155	if (pci_get_vendor(dev) != PCI_VENDOR_ID_CHELSIO)
156		return (ENXIO);
157
158	d = pci_get_device(dev);
159	for (i = 0; i < nitems(t5iov_pciids); i++) {
160		if (d == t5iov_pciids[i].device) {
161			device_set_desc(dev, t5iov_pciids[i].desc);
162			device_quiet(dev);
163			return (BUS_PROBE_DEFAULT);
164		}
165	}
166	return (ENXIO);
167}
168
169static int
170t6iov_probe(device_t dev)
171{
172	uint16_t d;
173	size_t i;
174
175	if (pci_get_vendor(dev) != PCI_VENDOR_ID_CHELSIO)
176		return (ENXIO);
177
178	d = pci_get_device(dev);
179	for (i = 0; i < nitems(t6iov_pciids); i++) {
180		if (d == t6iov_pciids[i].device) {
181			device_set_desc(dev, t6iov_pciids[i].desc);
182			device_quiet(dev);
183			return (BUS_PROBE_DEFAULT);
184		}
185	}
186	return (ENXIO);
187}
188
189static int
190t4iov_attach(device_t dev)
191{
192	struct t4iov_softc *sc;
193	uint32_t pl_rev, whoami;
194	int error;
195
196	sc = device_get_softc(dev);
197	sc->sc_dev = dev;
198
199	sc->regs_rid = PCIR_BAR(0);
200	sc->regs_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
201	    &sc->regs_rid, RF_ACTIVE);
202	if (sc->regs_res == NULL) {
203		device_printf(dev, "cannot map registers.\n");
204		return (ENXIO);
205	}
206	sc->bt = rman_get_bustag(sc->regs_res);
207	sc->bh = rman_get_bushandle(sc->regs_res);
208
209	pl_rev = t4iov_read_reg(sc, A_PL_REV);
210	whoami = t4iov_read_reg(sc, A_PL_WHOAMI);
211	if (G_CHIPID(pl_rev) <= CHELSIO_T5)
212		sc->pf = G_SOURCEPF(whoami);
213	else
214		sc->pf = G_T6_SOURCEPF(whoami);
215
216	sc->sc_main = pci_find_dbsf(pci_get_domain(dev), pci_get_bus(dev),
217	    pci_get_slot(dev), 4);
218	if (sc->sc_main == NULL) {
219		bus_release_resource(dev, SYS_RES_MEMORY, sc->regs_rid,
220		    sc->regs_res);
221		return (ENXIO);
222	}
223	if (T4_IS_MAIN_READY(sc->sc_main) == 0) {
224		error = t4iov_attach_child(dev);
225		if (error != 0)
226			bus_release_resource(dev, SYS_RES_MEMORY, sc->regs_rid,
227			    sc->regs_res);
228		return (error);
229	}
230	return (0);
231}
232
233static int
234t4iov_attach_child(device_t dev)
235{
236	struct t4iov_softc *sc;
237#ifdef PCI_IOV
238	nvlist_t *pf_schema, *vf_schema;
239#endif
240	device_t pdev;
241	int error;
242
243	sc = device_get_softc(dev);
244	MPASS(!sc->sc_attached);
245
246	/*
247	 * PF0-3 are associated with a specific port on the NIC (PF0
248	 * with port 0, etc.).  Ask the PF4 driver for the device for
249	 * this function's associated port to determine if the port is
250	 * present.
251	 */
252	error = T4_READ_PORT_DEVICE(sc->sc_main, pci_get_function(dev), &pdev);
253	if (error)
254		return (0);
255
256#ifdef PCI_IOV
257	pf_schema = pci_iov_schema_alloc_node();
258	vf_schema = pci_iov_schema_alloc_node();
259	pci_iov_schema_add_unicast_mac(vf_schema, "mac-addr", 0, NULL);
260	error = pci_iov_attach_name(dev, pf_schema, vf_schema, "%s",
261	    device_get_nameunit(pdev));
262	if (error) {
263		device_printf(dev, "Failed to initialize SR-IOV: %d\n", error);
264		return (0);
265	}
266#endif
267
268	sc->sc_attached = true;
269	return (0);
270}
271
272static int
273t4iov_detach_child(device_t dev)
274{
275	struct t4iov_softc *sc;
276#ifdef PCI_IOV
277	int error;
278#endif
279
280	sc = device_get_softc(dev);
281	if (!sc->sc_attached)
282		return (0);
283
284#ifdef PCI_IOV
285	error = pci_iov_detach(dev);
286	if (error != 0) {
287		device_printf(dev, "Failed to disable SR-IOV\n");
288		return (error);
289	}
290#endif
291
292	sc->sc_attached = false;
293	return (0);
294}
295
296static int
297t4iov_detach(device_t dev)
298{
299	struct t4iov_softc *sc;
300	int error;
301
302	sc = device_get_softc(dev);
303	if (sc->sc_attached) {
304		error = t4iov_detach_child(dev);
305		if (error)
306			return (error);
307	}
308	if (sc->regs_res) {
309		bus_release_resource(dev, SYS_RES_MEMORY, sc->regs_rid,
310		    sc->regs_res);
311	}
312	return (0);
313}
314
315#ifdef PCI_IOV
316static int
317t4iov_iov_init(device_t dev, uint16_t num_vfs, const struct nvlist *config)
318{
319
320	/* XXX: The Linux driver sets up a vf_monitor task on T4 adapters. */
321	return (0);
322}
323
324static void
325t4iov_iov_uninit(device_t dev)
326{
327}
328
329static int
330t4iov_add_vf(device_t dev, uint16_t vfnum, const struct nvlist *config)
331{
332	const void *mac;
333	struct t4iov_softc *sc;
334	struct adapter *adap;
335	uint8_t ma[ETHER_ADDR_LEN];
336	size_t size;
337	int rc;
338
339	if (nvlist_exists_binary(config, "mac-addr")) {
340		mac = nvlist_get_binary(config, "mac-addr", &size);
341		bcopy(mac, ma, ETHER_ADDR_LEN);
342
343		sc = device_get_softc(dev);
344		MPASS(sc->sc_attached);
345		MPASS(sc->sc_main != NULL);
346		adap = device_get_softc(sc->sc_main);
347		if (begin_synchronized_op(adap, NULL, SLEEP_OK | INTR_OK,
348		    "t4vfma") != 0)
349			return (ENXIO);
350		rc = -t4_set_vf_mac(adap, sc->pf, vfnum + 1, 1, ma);
351		end_synchronized_op(adap, 0);
352		if (rc != 0) {
353			device_printf(dev,
354			    "Failed to set VF%d MAC address to "
355			    "%02x:%02x:%02x:%02x:%02x:%02x, rc = %d\n", vfnum,
356			    ma[0], ma[1], ma[2], ma[3], ma[4], ma[5], rc);
357			return (rc);
358		}
359	}
360
361	return (0);
362}
363#endif
364
365static device_method_t t4iov_methods[] = {
366	DEVMETHOD(device_probe,		t4iov_probe),
367	DEVMETHOD(device_attach,	t4iov_attach),
368	DEVMETHOD(device_detach,	t4iov_detach),
369
370#ifdef PCI_IOV
371	DEVMETHOD(pci_iov_init,		t4iov_iov_init),
372	DEVMETHOD(pci_iov_uninit,	t4iov_iov_uninit),
373	DEVMETHOD(pci_iov_add_vf,	t4iov_add_vf),
374#endif
375
376	DEVMETHOD(t4_attach_child,	t4iov_attach_child),
377	DEVMETHOD(t4_detach_child,	t4iov_detach_child),
378
379	DEVMETHOD_END
380};
381
382static driver_t t4iov_driver = {
383	"t4iov",
384	t4iov_methods,
385	sizeof(struct t4iov_softc)
386};
387
388static device_method_t t5iov_methods[] = {
389	DEVMETHOD(device_probe,		t5iov_probe),
390	DEVMETHOD(device_attach,	t4iov_attach),
391	DEVMETHOD(device_detach,	t4iov_detach),
392
393#ifdef PCI_IOV
394	DEVMETHOD(pci_iov_init,		t4iov_iov_init),
395	DEVMETHOD(pci_iov_uninit,	t4iov_iov_uninit),
396	DEVMETHOD(pci_iov_add_vf,	t4iov_add_vf),
397#endif
398
399	DEVMETHOD(t4_attach_child,	t4iov_attach_child),
400	DEVMETHOD(t4_detach_child,	t4iov_detach_child),
401
402	DEVMETHOD_END
403};
404
405static driver_t t5iov_driver = {
406	"t5iov",
407	t5iov_methods,
408	sizeof(struct t4iov_softc)
409};
410
411static device_method_t t6iov_methods[] = {
412	DEVMETHOD(device_probe,		t6iov_probe),
413	DEVMETHOD(device_attach,	t4iov_attach),
414	DEVMETHOD(device_detach,	t4iov_detach),
415
416#ifdef PCI_IOV
417	DEVMETHOD(pci_iov_init,		t4iov_iov_init),
418	DEVMETHOD(pci_iov_uninit,	t4iov_iov_uninit),
419	DEVMETHOD(pci_iov_add_vf,	t4iov_add_vf),
420#endif
421
422	DEVMETHOD(t4_attach_child,	t4iov_attach_child),
423	DEVMETHOD(t4_detach_child,	t4iov_detach_child),
424
425	DEVMETHOD_END
426};
427
428static driver_t t6iov_driver = {
429	"t6iov",
430	t6iov_methods,
431	sizeof(struct t4iov_softc)
432};
433
434DRIVER_MODULE(t4iov, pci, t4iov_driver, 0, 0);
435MODULE_VERSION(t4iov, 1);
436
437DRIVER_MODULE(t5iov, pci, t5iov_driver, 0, 0);
438MODULE_VERSION(t5iov, 1);
439
440DRIVER_MODULE(t6iov, pci, t6iov_driver, 0, 0);
441MODULE_VERSION(t6iov, 1);
442