1/*- 2 * Copyright (c) 2015 Landon Fuller <landon@landonf.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 16 * NO WARRANTY 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 */ 29 30#include <sys/param.h> 31 32#include <dev/bhnd/bhnd_ids.h> 33#include <dev/bhnd/bhndreg.h> 34#include <dev/bhnd/bhnd.h> 35 36#include "bhndb_hwdata.h" 37 38/* 39 * Resource priority specifications shared by all bhndb(4) bridge 40 * implementations. 41 */ 42 43/* 44 * Define a bhndb_port_priority table. 45 */ 46#define BHNDB_PORTS(...) \ 47 .ports = _BHNDB_PORT_ARRAY(__VA_ARGS__), \ 48 .num_ports = nitems(_BHNDB_PORT_ARRAY(__VA_ARGS__)) 49 50#define _BHNDB_PORT_ARRAY(...) (const struct bhndb_port_priority[]) { \ 51 __VA_ARGS__ \ 52} 53 54/* 55 * Define a core priority record for all cores matching @p devclass 56 */ 57#define BHNDB_CLASS_PRIO(_devclass, _priority, ...) { \ 58 .match = { \ 59 BHND_MATCH_CORE_CLASS(BHND_DEVCLASS_ ## _devclass), \ 60 }, \ 61 .priority = (BHNDB_PRIORITY_ ## _priority), \ 62 BHNDB_PORTS(__VA_ARGS__) \ 63} 64 65/* 66 * Define a default core priority record 67 */ 68#define BHNDB_DEFAULT_PRIO(...) { \ 69 .match = { \ 70 BHND_MATCH_ANY , \ 71 }, \ 72 .priority = (BHNDB_PRIORITY_DEFAULT), \ 73 BHNDB_PORTS(__VA_ARGS__) \ 74} 75 76/* Define a port priority record for the type/port/region triplet, optionally 77 * specifying port allocation flags as the final argument */ 78#define BHNDB_PORT_PRIO(_type, _port, _region, _priority, ...) \ 79 _BHNDB_PORT_PRIO(_type, _port, _region, _priority, ## __VA_ARGS__, 0) 80 81#define _BHNDB_PORT_PRIO(_type, _port, _region, _priority, _flags, ...) \ 82{ \ 83 .type = (BHND_PORT_ ## _type), \ 84 .port = _port, \ 85 .region = _region, \ 86 .priority = (BHNDB_PRIORITY_ ## _priority), \ 87 .alloc_flags = (_flags) \ 88} 89 90/* Define a port priority record for the default (_type, 0, 0) type/port/region 91 * triplet. */ 92#define BHNDB_PORT0_PRIO(_type, _priority, ...) \ 93 BHNDB_PORT_PRIO(_type, 0, 0, _priority, ## __VA_ARGS__, 0) 94 95/** 96 * Generic resource priority configuration usable with all currently supported 97 * bcma(4)-based PCI devices. 98 */ 99const struct bhndb_hw_priority bhndb_bcma_priority_table[] = { 100 /* 101 * Ignorable device classes. 102 * 103 * Runtime access to these cores is not required, and no register 104 * windows should be reserved for these device types. 105 */ 106 BHNDB_CLASS_PRIO(SOC_ROUTER, NONE), 107 BHNDB_CLASS_PRIO(SOC_BRIDGE, NONE), 108 BHNDB_CLASS_PRIO(EROM, NONE), 109 BHNDB_CLASS_PRIO(OTHER, NONE), 110 111 /* 112 * Low priority device classes. 113 * 114 * These devices do not sit in a performance-critical path and can be 115 * treated as a low allocation priority. 116 */ 117 BHNDB_CLASS_PRIO(CC, LOW, 118 /* Device Block */ 119 BHNDB_PORT0_PRIO(DEVICE, LOW), 120 121 /* CC agent registers are not accessed via the bridge. */ 122 BHNDB_PORT0_PRIO(AGENT, NONE) 123 ), 124 125 BHNDB_CLASS_PRIO(PMU, LOW, 126 /* Device Block */ 127 BHNDB_PORT0_PRIO(DEVICE, LOW), 128 129 /* PMU agent registers are not accessed via the bridge. */ 130 BHNDB_PORT0_PRIO(AGENT, NONE) 131 ), 132 133 /* 134 * Default Core Behavior 135 * 136 * All other cores are assumed to require efficient runtime access to 137 * the default device port, and if supported by the bus, an agent port. 138 */ 139 BHNDB_DEFAULT_PRIO( 140 /* Device Block */ 141 BHNDB_PORT0_PRIO(DEVICE, HIGH), 142 143 /* Agent Block */ 144 BHNDB_PORT0_PRIO(AGENT, DEFAULT) 145 ), 146 147 BHNDB_HW_PRIORITY_TABLE_END 148}; 149 150/** 151 * Generic resource priority configuration usable with all currently supported 152 * siba(4)-based PCI devices. 153 */ 154const struct bhndb_hw_priority bhndb_siba_priority_table[] = { 155 /* 156 * Ignorable device classes. 157 * 158 * Runtime access to these cores is not required, and no register 159 * windows should be reserved for these device types. 160 */ 161 BHNDB_CLASS_PRIO(SOC_ROUTER, NONE), 162 BHNDB_CLASS_PRIO(SOC_BRIDGE, NONE), 163 BHNDB_CLASS_PRIO(EROM, NONE), 164 BHNDB_CLASS_PRIO(OTHER, NONE), 165 166 /* 167 * Low priority device classes. 168 * 169 * These devices do not sit in a performance-critical path and can be 170 * treated as a low allocation priority. 171 * 172 * Agent ports are marked as 'NONE' on siba(4) devices, as they 173 * will be fully mappable via register windows shared with the 174 * device0.0 port. 175 * 176 * To support early PCI_V0 devices, we enable FULFILL_ON_OVERCOMMIT for 177 * ChipCommon. 178 */ 179 BHNDB_CLASS_PRIO(CC, LOW, 180 /* Device Block */ 181 BHNDB_PORT_PRIO(DEVICE, 0, 0, LOW, 182 BHNDB_ALLOC_FULFILL_ON_OVERCOMMIT) 183 ), 184 185 BHNDB_CLASS_PRIO(PMU, LOW, 186 /* Device Block */ 187 BHNDB_PORT_PRIO(DEVICE, 0, 0, LOW) 188 ), 189 190 /* 191 * Default Core Behavior 192 * 193 * All other cores are assumed to require efficient runtime access to 194 * the device port. 195 */ 196 BHNDB_DEFAULT_PRIO( 197 /* Device Block */ 198 BHNDB_PORT_PRIO(DEVICE, 0, 0, HIGH) 199 ), 200 201 BHNDB_HW_PRIORITY_TABLE_END 202}; 203